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authorDan Carpenter <dan.carpenter@oracle.com>2019-08-21 10:14:03 +0300
committerAndy Shevchenko <andriy.shevchenko@linux.intel.com>2019-09-07 21:19:05 +0300
commit010764b8856e5ee5056113704dc4b914ebc88f1d (patch)
treea349a81085e91b139ed3a7a54f4f6990c82b36a5 /tools/power
parent0ecee9e3d42231e5641671c5b6b1127d3efff1d4 (diff)
tools/power/x86/intel-speed-select: Fix a read overflow in isst_set_tdp_level_msr()
The isst_send_msr_command() function will read 8 bytes but we are passing an address to an int (4 bytes) so it results in a read overflow. Fixes: 3fb4f7cd472c ("tools/power/x86: A tool to validate Intel Speed Select commands") Signed-off-by: Dan Carpenter <dan.carpenter@oracle.com> Acked-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Diffstat (limited to 'tools/power')
-rw-r--r--tools/power/x86/intel-speed-select/isst-core.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/tools/power/x86/intel-speed-select/isst-core.c b/tools/power/x86/intel-speed-select/isst-core.c
index 8de4ac39a008..f724322856ed 100644
--- a/tools/power/x86/intel-speed-select/isst-core.c
+++ b/tools/power/x86/intel-speed-select/isst-core.c
@@ -190,6 +190,7 @@ int isst_get_get_trl(int cpu, int level, int avx_level, int *trl)
int isst_set_tdp_level_msr(int cpu, int tdp_level)
{
+ unsigned long long level = tdp_level;
int ret;
debug_printf("cpu: tdp_level via MSR %d\n", cpu, tdp_level);
@@ -202,8 +203,7 @@ int isst_set_tdp_level_msr(int cpu, int tdp_level)
if (tdp_level > 2)
return -1; /* invalid value */
- ret = isst_send_msr_command(cpu, 0x64b, 1,
- (unsigned long long *)&tdp_level);
+ ret = isst_send_msr_command(cpu, 0x64b, 1, &level);
if (ret)
return ret;