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authorDan Williams <dan.j.williams@intel.com>2023-10-31 10:59:00 -0700
committerDan Williams <dan.j.williams@intel.com>2023-10-31 10:59:00 -0700
commit7f946e6d830fbdf411cd0641314edf11831efc88 (patch)
tree4e3cfe2157e52e0d5aba6c548cd643f297a393c7 /tools/testing/cxl
parent8f61d48c83f6e3525a770e44692604595693f787 (diff)
parente8db0701605bccbeb8d7907ecd2e50f346a725bd (diff)
Merge branch 'for-6.7/cxl-rch-eh' into cxl/next
Restricted CXL Host (RCH) Error Handling undoes the topology munging of CXL 1.1 to enabled some AER recovery, and lands some base infrastructure for handling Root-Complex-Event-Collectors (RCECs) with CXL. Include this long running series finally for v6.7.
Diffstat (limited to 'tools/testing/cxl')
-rw-r--r--tools/testing/cxl/test/mem.c4
1 files changed, 1 insertions, 3 deletions
diff --git a/tools/testing/cxl/test/mem.c b/tools/testing/cxl/test/mem.c
index 75acc721c763..ee61fa3a2411 100644
--- a/tools/testing/cxl/test/mem.c
+++ b/tools/testing/cxl/test/mem.c
@@ -1457,10 +1457,8 @@ static int cxl_mock_mem_probe(struct platform_device *pdev)
cxlds = &mds->cxlds;
cxlds->serial = pdev->id;
- if (is_rcd(pdev)) {
+ if (is_rcd(pdev))
cxlds->rcd = true;
- cxlds->component_reg_phys = CXL_RESOURCE_NONE;
- }
rc = cxl_enumerate_cmds(mds);
if (rc)