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| author | Marc Zyngier <maz@kernel.org> | 2021-10-17 11:19:42 +0100 |
|---|---|---|
| committer | Marc Zyngier <maz@kernel.org> | 2021-10-17 11:19:42 +0100 |
| commit | 551a13346e590b8521f025fcd4a3094d561214a7 (patch) | |
| tree | 5186c469ff37fdd51254cf9dcf5e451f4a999675 /tools/testing/selftests/kvm/aarch64/vgic_init.c | |
| parent | 20a304307596b0b246424c9994021445797af8ba (diff) | |
| parent | 61f6fadbf9bd6694c72e40d9fa186ceff730ef33 (diff) | |
Merge branch kvm-arm64/selftest/timer into kvmarm-master/next
* kvm-arm64/selftest/timer:
: .
: Add a set of selftests for the KVM/arm64 timer emulation.
: Comes with a minimal GICv3 infrastructure.
: .
KVM: arm64: selftests: arch_timer: Support vCPU migration
KVM: arm64: selftests: Add arch_timer test
KVM: arm64: selftests: Add host support for vGIC
KVM: arm64: selftests: Add basic GICv3 support
KVM: arm64: selftests: Add light-weight spinlock support
KVM: arm64: selftests: Add guest support to get the vcpuid
KVM: arm64: selftests: Maintain consistency for vcpuid type
KVM: arm64: selftests: Add support to disable and enable local IRQs
KVM: arm64: selftests: Add basic support to generate delays
KVM: arm64: selftests: Add basic support for arch_timers
KVM: arm64: selftests: Add support for cpu_relax
KVM: arm64: selftests: Introduce ARM64_SYS_KVM_REG
tools: arm64: Import sysreg.h
KVM: arm64: selftests: Add MMIO readl/writel support
Signed-off-by: Marc Zyngier <maz@kernel.org>
Diffstat (limited to 'tools/testing/selftests/kvm/aarch64/vgic_init.c')
| -rw-r--r-- | tools/testing/selftests/kvm/aarch64/vgic_init.c | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/tools/testing/selftests/kvm/aarch64/vgic_init.c b/tools/testing/selftests/kvm/aarch64/vgic_init.c index c563489ff760..34379c98d2f4 100644 --- a/tools/testing/selftests/kvm/aarch64/vgic_init.c +++ b/tools/testing/selftests/kvm/aarch64/vgic_init.c @@ -13,11 +13,10 @@ #include "test_util.h" #include "kvm_util.h" #include "processor.h" +#include "vgic.h" #define NR_VCPUS 4 -#define REDIST_REGION_ATTR_ADDR(count, base, flags, index) (((uint64_t)(count) << 52) | \ - ((uint64_t)((base) >> 16) << 16) | ((uint64_t)(flags) << 12) | index) #define REG_OFFSET(vcpu, offset) (((uint64_t)vcpu << 32) | offset) #define GICR_TYPER 0x8 |