diff options
| -rw-r--r-- | drivers/mfd/intel_soc_pmic_crc.c | 28 |
1 files changed, 7 insertions, 21 deletions
diff --git a/drivers/mfd/intel_soc_pmic_crc.c b/drivers/mfd/intel_soc_pmic_crc.c index de3f31266c57..d33a0cff8cbd 100644 --- a/drivers/mfd/intel_soc_pmic_crc.c +++ b/drivers/mfd/intel_soc_pmic_crc.c @@ -109,27 +109,13 @@ static const struct regmap_config crystal_cove_regmap_config = { }; static const struct regmap_irq crystal_cove_irqs[] = { - [CRYSTAL_COVE_IRQ_PWRSRC] = { - .mask = BIT(CRYSTAL_COVE_IRQ_PWRSRC), - }, - [CRYSTAL_COVE_IRQ_THRM] = { - .mask = BIT(CRYSTAL_COVE_IRQ_THRM), - }, - [CRYSTAL_COVE_IRQ_BCU] = { - .mask = BIT(CRYSTAL_COVE_IRQ_BCU), - }, - [CRYSTAL_COVE_IRQ_ADC] = { - .mask = BIT(CRYSTAL_COVE_IRQ_ADC), - }, - [CRYSTAL_COVE_IRQ_CHGR] = { - .mask = BIT(CRYSTAL_COVE_IRQ_CHGR), - }, - [CRYSTAL_COVE_IRQ_GPIO] = { - .mask = BIT(CRYSTAL_COVE_IRQ_GPIO), - }, - [CRYSTAL_COVE_IRQ_VHDMIOCP] = { - .mask = BIT(CRYSTAL_COVE_IRQ_VHDMIOCP), - }, + REGMAP_IRQ_REG(CRYSTAL_COVE_IRQ_PWRSRC, 0, BIT(CRYSTAL_COVE_IRQ_PWRSRC)), + REGMAP_IRQ_REG(CRYSTAL_COVE_IRQ_THRM, 0, BIT(CRYSTAL_COVE_IRQ_THRM)), + REGMAP_IRQ_REG(CRYSTAL_COVE_IRQ_BCU, 0, BIT(CRYSTAL_COVE_IRQ_BCU)), + REGMAP_IRQ_REG(CRYSTAL_COVE_IRQ_ADC, 0, BIT(CRYSTAL_COVE_IRQ_ADC)), + REGMAP_IRQ_REG(CRYSTAL_COVE_IRQ_CHGR, 0, BIT(CRYSTAL_COVE_IRQ_CHGR)), + REGMAP_IRQ_REG(CRYSTAL_COVE_IRQ_GPIO, 0, BIT(CRYSTAL_COVE_IRQ_GPIO)), + REGMAP_IRQ_REG(CRYSTAL_COVE_IRQ_VHDMIOCP, 0, BIT(CRYSTAL_COVE_IRQ_VHDMIOCP)), }; static const struct regmap_irq_chip crystal_cove_irq_chip = { |