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Diffstat (limited to 'Documentation/devicetree/bindings/dma/stm32/st,stm32-dmamux.yaml')
-rw-r--r-- | Documentation/devicetree/bindings/dma/stm32/st,stm32-dmamux.yaml | 67 |
1 files changed, 67 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/dma/stm32/st,stm32-dmamux.yaml b/Documentation/devicetree/bindings/dma/stm32/st,stm32-dmamux.yaml new file mode 100644 index 000000000000..b7bca1a83769 --- /dev/null +++ b/Documentation/devicetree/bindings/dma/stm32/st,stm32-dmamux.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/dma/stm32/st,stm32-dmamux.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: STMicroelectronics STM32 DMA MUX (DMA request router) + +maintainers: + - Amelie Delaunay <amelie.delaunay@foss.st.com> + +allOf: + - $ref: /schemas/dma/dma-router.yaml# + +properties: + "#dma-cells": + const: 3 + description: | + Each cell represents the following: + 1. The mux input number/line for the request + 2. Bitfield representing DMA channel configuration that is passed + to the real DMA controller + 3. Bitfield representing device dependent DMA features passed to + the real DMA controller + + For bitfield definitions of cells 2 and 3, see the associated + bindings doc for the actual DMA controller in st,stm32-dma.yaml. + + compatible: + const: st,stm32h7-dmamux + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + resets: + maxItems: 1 + + access-controllers: + minItems: 1 + maxItems: 2 + +required: + - compatible + - reg + - dma-masters + +unevaluatedProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/clock/stm32mp1-clks.h> + #include <dt-bindings/reset/stm32mp1-resets.h> + dma-router@40020800 { + compatible = "st,stm32h7-dmamux"; + reg = <0x40020800 0x3c>; + #dma-cells = <3>; + dma-requests = <128>; + dma-channels = <16>; + dma-masters = <&dma1>, <&dma2>; + clocks = <&timer_clk>; + }; + +... |