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Diffstat (limited to 'Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml')
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diff --git a/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml b/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml new file mode 100644 index 000000000000..99fcf970773a --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/sprd,gpio-eic.yaml @@ -0,0 +1,124 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +# Copyright 2022 Unisoc Inc. +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/sprd,gpio-eic.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Unisoc EIC controller + +maintainers: + - Orson Zhai <orsonzhai@gmail.com> + - Baolin Wang <baolin.wang7@gmail.com> + - Chunyan Zhang <zhang.lyra@gmail.com> + +description: | + The EIC is the abbreviation of external interrupt controller, which can + be used only in input mode. The Spreadtrum platform has 2 EIC controllers, + one is in digital chip, and another one is in PMIC. The digital chip EIC + controller contains 4 sub-modules, i.e. EIC-debounce, EIC-latch, EIC-async and + EIC-sync. But the PMIC EIC controller contains only one EIC-debounce sub- + module. + + The EIC-debounce sub-module provides up to 8 source input signal + connections. A debounce mechanism is used to capture the input signals' + stable status (millisecond resolution) and a single-trigger mechanism + is introduced into this sub-module to enhance the input event detection + reliability. In addition, this sub-module's clock can be shut off + automatically to reduce power dissipation. Moreover the debounce range + is from 1ms to 4s with a step size of 1ms. The input signal will be + ignored if it is asserted for less than 1 ms. + + The EIC-latch sub-module is used to latch some special power down signals + and generate interrupts, since the EIC-latch does not depend on the APB + clock to capture signals. + + The EIC-async sub-module uses a 32kHz clock to capture the short signals + (microsecond resolution) to generate interrupts by level or edge trigger. + + The EIC-sync is similar with GPIO's input function, which is a synchronized + signal input register. It can generate interrupts by level or edge trigger + when detecting input signals. + +properties: + compatible: + oneOf: + - enum: + - sprd,sc9860-eic-debounce + - sprd,sc9860-eic-latch + - sprd,sc9860-eic-async + - sprd,sc9860-eic-sync + - sprd,sc2731-eic + - items: + - enum: + - sprd,ums512-eic-debounce + - const: sprd,sc9860-eic-debounce + - items: + - enum: + - sprd,ums512-eic-latch + - const: sprd,sc9860-eic-latch + - items: + - enum: + - sprd,ums512-eic-async + - const: sprd,sc9860-eic-async + - items: + - enum: + - sprd,ums512-eic-sync + - const: sprd,sc9860-eic-sync + - items: + - enum: + - sprd,sc2730-eic + - const: sprd,sc2731-eic + + reg: + minItems: 1 + maxItems: 3 + description: + EIC controller can support maximum 3 banks which has its own + address base. + + gpio-controller: true + + "#gpio-cells": + const: 2 + + interrupt-controller: true + + "#interrupt-cells": + const: 2 + + interrupts: + maxItems: 1 + description: + The interrupt shared by all GPIO lines for this controller. + +required: + - compatible + - reg + - gpio-controller + - "#gpio-cells" + - interrupt-controller + - "#interrupt-cells" + - interrupts + +additionalProperties: false + +examples: + - | + #include <dt-bindings/interrupt-controller/arm-gic.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + + eic_debounce: gpio@40210000 { + compatible = "sprd,sc9860-eic-debounce"; + reg = <0 0x40210000 0 0x80>; + gpio-controller; + #gpio-cells = <2>; + interrupt-controller; + #interrupt-cells = <2>; + interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>; + }; + }; +... |