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-rw-r--r--Documentation/devicetree/bindings/mfd/ab8500.txt119
-rw-r--r--Documentation/devicetree/bindings/mfd/da9062.txt4
-rw-r--r--Documentation/devicetree/bindings/mfd/madera.txt8
-rw-r--r--Documentation/devicetree/bindings/mfd/max77650.txt46
-rw-r--r--Documentation/devicetree/bindings/mfd/max77650.yaml149
-rw-r--r--Documentation/devicetree/bindings/mfd/max77693.txt1
-rw-r--r--Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt2
-rw-r--r--Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.txt2
-rw-r--r--Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml120
-rw-r--r--Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml162
-rw-r--r--Documentation/devicetree/bindings/mfd/stm32-lptimer.txt48
-rw-r--r--Documentation/devicetree/bindings/mfd/stm32-timers.txt73
-rw-r--r--Documentation/devicetree/bindings/mfd/syscon.txt32
-rw-r--r--Documentation/devicetree/bindings/mfd/syscon.yaml84
14 files changed, 650 insertions, 200 deletions
diff --git a/Documentation/devicetree/bindings/mfd/ab8500.txt b/Documentation/devicetree/bindings/mfd/ab8500.txt
index cd9e90c5d171..b6bc30d7777e 100644
--- a/Documentation/devicetree/bindings/mfd/ab8500.txt
+++ b/Documentation/devicetree/bindings/mfd/ab8500.txt
@@ -69,6 +69,18 @@ Required child device properties:
- compatible : "stericsson,ab8500-[bm|btemp|charger|fg|gpadc|gpio|ponkey|
pwm|regulator|rtc|sysctrl|usb]";
+ A few child devices require ADC channels from the GPADC node. Those follow the
+ standard bindings from iio/iio-bindings.txt and iio/adc/adc.txt
+
+ abx500-temp : io-channels "aux1" and "aux2" for measuring external
+ temperatures.
+ ab8500-fg : io-channel "main_bat_v" for measuring main battery voltage,
+ ab8500-btemp : io-channels "btemp_ball" and "bat_ctrl" for measuring the
+ battery voltage.
+ ab8500-charger : io-channels "main_charger_v", "main_charger_c", "vbus_v",
+ "usb_charger_c" for measuring voltage and current of the
+ different charging supplies.
+
Optional child device properties:
- interrupts : contains the device IRQ(s) using the 2-cell format (see above)
- interrupt-names : contains names of IRQ resource in the order in which they were
@@ -102,8 +114,115 @@ ab8500 {
39 0x4>;
interrupt-names = "HW_CONV_END", "SW_CONV_END";
vddadc-supply = <&ab8500_ldo_tvout_reg>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ #io-channel-cells = <1>;
+
+ /* GPADC channels */
+ bat_ctrl: channel@1 {
+ reg = <0x01>;
+ };
+ btemp_ball: channel@2 {
+ reg = <0x02>;
+ };
+ main_charger_v: channel@3 {
+ reg = <0x03>;
+ };
+ acc_detect1: channel@4 {
+ reg = <0x04>;
+ };
+ acc_detect2: channel@5 {
+ reg = <0x05>;
+ };
+ adc_aux1: channel@6 {
+ reg = <0x06>;
+ };
+ adc_aux2: channel@7 {
+ reg = <0x07>;
+ };
+ main_batt_v: channel@8 {
+ reg = <0x08>;
+ };
+ vbus_v: channel@9 {
+ reg = <0x09>;
+ };
+ main_charger_c: channel@a {
+ reg = <0x0a>;
+ };
+ usb_charger_c: channel@b {
+ reg = <0x0b>;
+ };
+ bk_bat_v: channel@c {
+ reg = <0x0c>;
+ };
+ die_temp: channel@d {
+ reg = <0x0d>;
+ };
+ usb_id: channel@e {
+ reg = <0x0e>;
+ };
+ xtal_temp: channel@12 {
+ reg = <0x12>;
+ };
+ vbat_true_meas: channel@13 {
+ reg = <0x13>;
+ };
+ bat_ctrl_and_ibat: channel@1c {
+ reg = <0x1c>;
+ };
+ vbat_meas_and_ibat: channel@1d {
+ reg = <0x1d>;
+ };
+ vbat_true_meas_and_ibat: channel@1e {
+ reg = <0x1e>;
+ };
+ bat_temp_and_ibat: channel@1f {
+ reg = <0x1f>;
+ };
};
+ ab8500_temp {
+ compatible = "stericsson,abx500-temp";
+ io-channels = <&gpadc 0x06>,
+ <&gpadc 0x07>;
+ io-channel-name = "aux1", "aux2";
+ };
+
+ ab8500_battery: ab8500_battery {
+ stericsson,battery-type = "LIPO";
+ thermistor-on-batctrl;
+ };
+
+ ab8500_fg {
+ compatible = "stericsson,ab8500-fg";
+ battery = <&ab8500_battery>;
+ io-channels = <&gpadc 0x08>;
+ io-channel-name = "main_bat_v";
+ };
+
+ ab8500_btemp {
+ compatible = "stericsson,ab8500-btemp";
+ battery = <&ab8500_battery>;
+ io-channels = <&gpadc 0x02>,
+ <&gpadc 0x01>;
+ io-channel-name = "btemp_ball",
+ "bat_ctrl";
+ };
+
+ ab8500_charger {
+ compatible = "stericsson,ab8500-charger";
+ battery = <&ab8500_battery>;
+ vddadc-supply = <&ab8500_ldo_tvout_reg>;
+ io-channels = <&gpadc 0x03>,
+ <&gpadc 0x0a>,
+ <&gpadc 0x09>,
+ <&gpadc 0x0b>;
+ io-channel-name = "main_charger_v",
+ "main_charger_c",
+ "vbus_v",
+ "usb_charger_c";
+ };
+
ab8500-usb {
compatible = "stericsson,ab8500-usb";
interrupts = < 90 0x4
diff --git a/Documentation/devicetree/bindings/mfd/da9062.txt b/Documentation/devicetree/bindings/mfd/da9062.txt
index edca653a5777..bc4b59de6a55 100644
--- a/Documentation/devicetree/bindings/mfd/da9062.txt
+++ b/Documentation/devicetree/bindings/mfd/da9062.txt
@@ -66,6 +66,9 @@ Sub-nodes:
details of individual regulator device can be found in:
Documentation/devicetree/bindings/regulator/regulator.txt
+ regulator-initial-mode may be specified for buck regulators using mode values
+ from include/dt-bindings/regulator/dlg,da9063-regulator.h.
+
- rtc : This node defines settings required for the Real-Time Clock associated
with the DA9062. There are currently no entries in this binding, however
compatible = "dlg,da9062-rtc" should be added if a node is created.
@@ -96,6 +99,7 @@ Example:
regulator-max-microvolt = <1570000>;
regulator-min-microamp = <500000>;
regulator-max-microamp = <2000000>;
+ regulator-initial-mode = <DA9063_BUCK_MODE_SYNC>;
regulator-boot-on;
};
DA9062_LDO1: ldo1 {
diff --git a/Documentation/devicetree/bindings/mfd/madera.txt b/Documentation/devicetree/bindings/mfd/madera.txt
index cad0f2800502..47e2b8bc6051 100644
--- a/Documentation/devicetree/bindings/mfd/madera.txt
+++ b/Documentation/devicetree/bindings/mfd/madera.txt
@@ -67,6 +67,14 @@ Optional properties:
As defined in bindings/gpio.txt.
Although optional, it is strongly recommended to use a hardware reset
+ - clocks: Should reference the clocks supplied on MCLK1, MCLK2 and MCLK3
+ - clock-names: May contain up to three strings:
+ "mclk1" for the clock supplied on MCLK1, recommended to be a high
+ quality audio reference clock
+ "mclk2" for the clock supplied on MCLK2, required to be an always on
+ 32k clock
+ "mclk3" for the clock supplied on MCLK3
+
- MICBIASx : Initial data for the MICBIAS regulators, as covered in
Documentation/devicetree/bindings/regulator/regulator.txt.
One for each MICBIAS generator (MICBIAS1, MICBIAS2, ...)
diff --git a/Documentation/devicetree/bindings/mfd/max77650.txt b/Documentation/devicetree/bindings/mfd/max77650.txt
deleted file mode 100644
index b529d8d19335..000000000000
--- a/Documentation/devicetree/bindings/mfd/max77650.txt
+++ /dev/null
@@ -1,46 +0,0 @@
-MAX77650 ultra low-power PMIC from Maxim Integrated.
-
-Required properties:
--------------------
-- compatible: Must be "maxim,max77650"
-- reg: I2C device address.
-- interrupts: The interrupt on the parent the controller is
- connected to.
-- interrupt-controller: Marks the device node as an interrupt controller.
-- #interrupt-cells: Must be <2>.
-
-- gpio-controller: Marks the device node as a gpio controller.
-- #gpio-cells: Must be <2>. The first cell is the pin number and
- the second cell is used to specify the gpio active
- state.
-
-Optional properties:
---------------------
-gpio-line-names: Single string containing the name of the GPIO line.
-
-The GPIO-controller module is represented as part of the top-level PMIC
-node. The device exposes a single GPIO line.
-
-For device-tree bindings of other sub-modules (regulator, power supply,
-LEDs and onkey) refer to the binding documents under the respective
-sub-system directories.
-
-For more details on GPIO bindings, please refer to the generic GPIO DT
-binding document <devicetree/bindings/gpio/gpio.txt>.
-
-Example:
---------
-
- pmic@48 {
- compatible = "maxim,max77650";
- reg = <0x48>;
-
- interrupt-controller;
- interrupt-parent = <&gpio2>;
- #interrupt-cells = <2>;
- interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
-
- gpio-controller;
- #gpio-cells = <2>;
- gpio-line-names = "max77650-charger";
- };
diff --git a/Documentation/devicetree/bindings/mfd/max77650.yaml b/Documentation/devicetree/bindings/mfd/max77650.yaml
new file mode 100644
index 000000000000..4a70f875a6eb
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/max77650.yaml
@@ -0,0 +1,149 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/max77650.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: MAX77650 ultra low-power PMIC from Maxim Integrated.
+
+maintainers:
+ - Bartosz Golaszewski <bgolaszewski@baylibre.com>
+
+description: |
+ MAX77650 is an ultra-low power PMIC providing battery charging and power
+ supply for low-power IoT and wearable applications.
+
+ The GPIO-controller module is represented as part of the top-level PMIC
+ node. The device exposes a single GPIO line.
+
+ For device-tree bindings of other sub-modules (regulator, power supply,
+ LEDs and onkey) refer to the binding documents under the respective
+ sub-system directories.
+
+properties:
+ compatible:
+ const: maxim,max77650
+
+ reg:
+ description:
+ I2C device address.
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ interrupt-controller: true
+
+ "#interrupt-cells":
+ const: 2
+ description:
+ The first cell is the IRQ number, the second cell is the trigger type.
+
+ gpio-controller: true
+
+ "#gpio-cells":
+ const: 2
+ description:
+ The first cell is the pin number and the second cell is used to specify
+ the gpio active state.
+
+ gpio-line-names:
+ maxItems: 1
+ description:
+ Single string containing the name of the GPIO line.
+
+ regulators:
+ $ref: ../regulator/max77650-regulator.yaml
+
+ charger:
+ $ref: ../power/supply/max77650-charger.yaml
+
+ leds:
+ $ref: ../leds/leds-max77650.yaml
+
+ onkey:
+ $ref: ../input/max77650-onkey.yaml
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - interrupt-controller
+ - "#interrupt-cells"
+ - gpio-controller
+ - "#gpio-cells"
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/irq.h>
+ #include <dt-bindings/input/linux-event-codes.h>
+ i2c {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pmic@48 {
+ compatible = "maxim,max77650";
+ reg = <0x48>;
+
+ interrupt-controller;
+ interrupt-parent = <&gpio2>;
+ #interrupt-cells = <2>;
+ interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ gpio-line-names = "max77650-charger";
+
+ regulators {
+ compatible = "maxim,max77650-regulator";
+
+ max77650_ldo: regulator@0 {
+ regulator-compatible = "ldo";
+ regulator-name = "max77650-ldo";
+ regulator-min-microvolt = <1350000>;
+ regulator-max-microvolt = <2937500>;
+ };
+
+ max77650_sbb0: regulator@1 {
+ regulator-compatible = "sbb0";
+ regulator-name = "max77650-sbb0";
+ regulator-min-microvolt = <800000>;
+ regulator-max-microvolt = <1587500>;
+ };
+ };
+
+ charger {
+ compatible = "maxim,max77650-charger";
+ input-voltage-min-microvolt = <4200000>;
+ input-current-limit-microamp = <285000>;
+ };
+
+ leds {
+ compatible = "maxim,max77650-led";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ led@0 {
+ reg = <0>;
+ label = "blue:usr0";
+ };
+
+ led@1 {
+ reg = <1>;
+ label = "red:usr1";
+ linux,default-trigger = "heartbeat";
+ };
+
+ led@2 {
+ reg = <2>;
+ label = "green:usr2";
+ };
+ };
+
+ onkey {
+ compatible = "maxim,max77650-onkey";
+ linux,code = <KEY_END>;
+ maxim,onkey-slide;
+ };
+ };
+ };
diff --git a/Documentation/devicetree/bindings/mfd/max77693.txt b/Documentation/devicetree/bindings/mfd/max77693.txt
index a3c60a7a3be1..0ced96e16c16 100644
--- a/Documentation/devicetree/bindings/mfd/max77693.txt
+++ b/Documentation/devicetree/bindings/mfd/max77693.txt
@@ -175,6 +175,7 @@ Example:
maxim,thermal-regulation-celsius = <75>;
maxim,battery-overcurrent-microamp = <3000000>;
maxim,charge-input-threshold-microvolt = <4300000>;
+ };
led {
compatible = "maxim,max77693-led";
diff --git a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt
index 143706222a51..fffc8fde3302 100644
--- a/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt
+++ b/Documentation/devicetree/bindings/mfd/qcom,spmi-pmic.txt
@@ -29,6 +29,8 @@ Required properties:
"qcom,pm8916",
"qcom,pm8004",
"qcom,pm8909",
+ "qcom,pm8950",
+ "qcom,pmi8950",
"qcom,pm8998",
"qcom,pmi8998",
"qcom,pm8005",
diff --git a/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.txt b/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.txt
index d759da606f75..30ea27c3936d 100644
--- a/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.txt
+++ b/Documentation/devicetree/bindings/mfd/samsung,exynos5433-lpass.txt
@@ -18,7 +18,7 @@ an optional sub-node. For "samsung,exynos5433-lpass" compatible this includes:
UART, SLIMBUS, PCM, I2S, DMAC, Timers 0...4, VIC, WDT 0...1 devices.
Bindings of the sub-nodes are described in:
- ../serial/samsung_uart.txt
+ ../serial/samsung_uart.yaml
../sound/samsung-i2s.txt
../dma/arm-pl330.txt
diff --git a/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml b/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml
new file mode 100644
index 000000000000..1a4cc5f3fb33
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/st,stm32-lptimer.yaml
@@ -0,0 +1,120 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/st,stm32-lptimer.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: STMicroelectronics STM32 Low-Power Timers bindings
+
+description: |
+ The STM32 Low-Power Timer (LPTIM) is a 16-bit timer that provides several
+ functions
+ - PWM output (with programmable prescaler, configurable polarity)
+ - Trigger source for STM32 ADC/DAC (LPTIM_OUT)
+ - Several counter modes:
+ - quadrature encoder to detect angular position and direction of rotary
+ elements, from IN1 and IN2 input signals.
+ - simple counter from IN1 input signal.
+
+maintainers:
+ - Fabrice Gasnier <fabrice.gasnier@st.com>
+
+properties:
+ compatible:
+ const: st,stm32-lptimer
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: mux
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+ pwm:
+ type: object
+
+ properties:
+ compatible:
+ const: st,stm32-pwm-lp
+
+ "#pwm-cells":
+ const: 3
+
+ required:
+ - "#pwm-cells"
+ - compatible
+
+patternProperties:
+ "^trigger@[0-9]+$":
+ type: object
+
+ properties:
+ compatible:
+ const: st,stm32-lptimer-trigger
+
+ reg:
+ description: Identify trigger hardware block.
+ items:
+ minimum: 0
+ maximum: 2
+
+ required:
+ - compatible
+ - reg
+
+ counter:
+ type: object
+
+ properties:
+ compatible:
+ const: st,stm32-lptimer-counter
+
+ required:
+ - compatible
+
+required:
+ - "#address-cells"
+ - "#size-cells"
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/stm32mp1-clks.h>
+ timer@40002400 {
+ compatible = "st,stm32-lptimer";
+ reg = <0x40002400 0x400>;
+ clocks = <&timer_clk>;
+ clock-names = "mux";
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ pwm {
+ compatible = "st,stm32-pwm-lp";
+ #pwm-cells = <3>;
+ };
+
+ trigger@0 {
+ compatible = "st,stm32-lptimer-trigger";
+ reg = <0>;
+ };
+
+ counter {
+ compatible = "st,stm32-lptimer-counter";
+ };
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml b/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml
new file mode 100644
index 000000000000..590849ee9f32
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/st,stm32-timers.yaml
@@ -0,0 +1,162 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/st,stm32-timers.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: STMicroelectronics STM32 Timers bindings
+
+description: |
+ This hardware block provides 3 types of timer along with PWM functionality:
+ - advanced-control timers consist of a 16-bit auto-reload counter driven
+ by a programmable prescaler, break input feature, PWM outputs and
+ complementary PWM outputs channels.
+ - general-purpose timers consist of a 16-bit or 32-bit auto-reload counter
+ driven by a programmable prescaler and PWM outputs.
+ - basic timers consist of a 16-bit auto-reload counter driven by a
+ programmable prescaler.
+
+maintainers:
+ - Benjamin Gaignard <benjamin.gaignard@st.com>
+ - Fabrice Gasnier <fabrice.gasnier@st.com>
+
+properties:
+ compatible:
+ const: st,stm32-timers
+
+ reg:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+ clock-names:
+ items:
+ - const: int
+
+ reset:
+ maxItems: 1
+
+ dmas:
+ minItems: 1
+ maxItems: 7
+
+ dma-names:
+ items:
+ enum: [ ch1, ch2, ch3, ch4, up, trig, com ]
+ minItems: 1
+ maxItems: 7
+
+ "#address-cells":
+ const: 1
+
+ "#size-cells":
+ const: 0
+
+ pwm:
+ type: object
+
+ properties:
+ compatible:
+ const: st,stm32-pwm
+
+ "#pwm-cells":
+ const: 3
+
+ st,breakinput:
+ description:
+ One or two <index level filter> to describe break input
+ configurations.
+ allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint32-matrix
+ - items:
+ items:
+ - description: |
+ "index" indicates on which break input (0 or 1) the
+ configuration should be applied.
+ enum: [ 0 , 1]
+ - description: |
+ "level" gives the active level (0=low or 1=high) of the
+ input signal for this configuration
+ enum: [ 0, 1 ]
+ - description: |
+ "filter" gives the filtering value (up to 15) to be applied.
+ maximum: 15
+ minItems: 1
+ maxItems: 2
+
+ required:
+ - "#pwm-cells"
+ - compatible
+
+patternProperties:
+ "^timer@[0-9]+$":
+ type: object
+
+ properties:
+ compatible:
+ enum:
+ - st,stm32-timer-trigger
+ - st,stm32h7-timer-trigger
+
+ reg:
+ description: Identify trigger hardware block.
+ items:
+ minimum: 0
+ maximum: 16
+
+ required:
+ - compatible
+ - reg
+
+ counter:
+ type: object
+
+ properties:
+ compatible:
+ const: st,stm32-timer-counter
+
+ required:
+ - compatible
+
+required:
+ - "#address-cells"
+ - "#size-cells"
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/stm32mp1-clks.h>
+ timers2: timers@40000000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "st,stm32-timers";
+ reg = <0x40000000 0x400>;
+ clocks = <&rcc TIM2_K>;
+ clock-names = "int";
+ dmas = <&dmamux1 18 0x400 0x1>,
+ <&dmamux1 19 0x400 0x1>,
+ <&dmamux1 20 0x400 0x1>,
+ <&dmamux1 21 0x400 0x1>,
+ <&dmamux1 22 0x400 0x1>;
+ dma-names = "ch1", "ch2", "ch3", "ch4", "up";
+ pwm {
+ compatible = "st,stm32-pwm";
+ #pwm-cells = <3>;
+ st,breakinput = <0 1 5>;
+ };
+ timer@0 {
+ compatible = "st,stm32-timer-trigger";
+ reg = <0>;
+ };
+ counter {
+ compatible = "st,stm32-timer-counter";
+ };
+ };
+
+...
diff --git a/Documentation/devicetree/bindings/mfd/stm32-lptimer.txt b/Documentation/devicetree/bindings/mfd/stm32-lptimer.txt
deleted file mode 100644
index fb54e4dad5b3..000000000000
--- a/Documentation/devicetree/bindings/mfd/stm32-lptimer.txt
+++ /dev/null
@@ -1,48 +0,0 @@
-STMicroelectronics STM32 Low-Power Timer
-
-The STM32 Low-Power Timer (LPTIM) is a 16-bit timer that provides several
-functions:
-- PWM output (with programmable prescaler, configurable polarity)
-- Quadrature encoder, counter
-- Trigger source for STM32 ADC/DAC (LPTIM_OUT)
-
-Required properties:
-- compatible: Must be "st,stm32-lptimer".
-- reg: Offset and length of the device's register set.
-- clocks: Phandle to the clock used by the LP Timer module.
-- clock-names: Must be "mux".
-- #address-cells: Should be '<1>'.
-- #size-cells: Should be '<0>'.
-
-Optional subnodes:
-- pwm: See ../pwm/pwm-stm32-lp.txt
-- counter: See ../counter/stm32-lptimer-cnt.txt
-- trigger: See ../iio/timer/stm32-lptimer-trigger.txt
-
-Example:
-
- timer@40002400 {
- compatible = "st,stm32-lptimer";
- reg = <0x40002400 0x400>;
- clocks = <&timer_clk>;
- clock-names = "mux";
- #address-cells = <1>;
- #size-cells = <0>;
-
- pwm {
- compatible = "st,stm32-pwm-lp";
- pinctrl-names = "default";
- pinctrl-0 = <&lppwm1_pins>;
- };
-
- trigger@0 {
- compatible = "st,stm32-lptimer-trigger";
- reg = <0>;
- };
-
- counter {
- compatible = "st,stm32-lptimer-counter";
- pinctrl-names = "default";
- pinctrl-0 = <&lptim1_in_pins>;
- };
- };
diff --git a/Documentation/devicetree/bindings/mfd/stm32-timers.txt b/Documentation/devicetree/bindings/mfd/stm32-timers.txt
deleted file mode 100644
index 15c3b87f51d9..000000000000
--- a/Documentation/devicetree/bindings/mfd/stm32-timers.txt
+++ /dev/null
@@ -1,73 +0,0 @@
-STM32 Timers driver bindings
-
-This IP provides 3 types of timer along with PWM functionality:
-- advanced-control timers consist of a 16-bit auto-reload counter driven by a programmable
- prescaler, break input feature, PWM outputs and complementary PWM ouputs channels.
-- general-purpose timers consist of a 16-bit or 32-bit auto-reload counter driven by a
- programmable prescaler and PWM outputs.
-- basic timers consist of a 16-bit auto-reload counter driven by a programmable prescaler.
-
-Required parameters:
-- compatible: must be "st,stm32-timers"
-
-- reg: Physical base address and length of the controller's
- registers.
-- clock-names: Set to "int".
-- clocks: Phandle to the clock used by the timer module.
- For Clk properties, please refer to ../clock/clock-bindings.txt
-
-Optional parameters:
-- resets: Phandle to the parent reset controller.
- See ../reset/st,stm32-rcc.txt
-- dmas: List of phandle to dma channels that can be used for
- this timer instance. There may be up to 7 dma channels.
-- dma-names: List of dma names. Must match 'dmas' property. Valid
- names are: "ch1", "ch2", "ch3", "ch4", "up", "trig",
- "com".
-
-Optional subnodes:
-- pwm: See ../pwm/pwm-stm32.txt
-- timer: See ../iio/timer/stm32-timer-trigger.txt
-- counter: See ../counter/stm32-timer-cnt.txt
-
-Example:
- timers@40010000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "st,stm32-timers";
- reg = <0x40010000 0x400>;
- clocks = <&rcc 0 160>;
- clock-names = "int";
-
- pwm {
- compatible = "st,stm32-pwm";
- pinctrl-0 = <&pwm1_pins>;
- pinctrl-names = "default";
- };
-
- timer@0 {
- compatible = "st,stm32-timer-trigger";
- reg = <0>;
- };
-
- counter {
- compatible = "st,stm32-timer-counter";
- pinctrl-names = "default";
- pinctrl-0 = <&tim1_in_pins>;
- };
- };
-
-Example with all dmas:
- timer@40010000 {
- ...
- dmas = <&dmamux1 11 0x400 0x0>,
- <&dmamux1 12 0x400 0x0>,
- <&dmamux1 13 0x400 0x0>,
- <&dmamux1 14 0x400 0x0>,
- <&dmamux1 15 0x400 0x0>,
- <&dmamux1 16 0x400 0x0>,
- <&dmamux1 17 0x400 0x0>;
- dma-names = "ch1", "ch2", "ch3", "ch4", "up", "trig", "com";
- ...
- child nodes...
- };
diff --git a/Documentation/devicetree/bindings/mfd/syscon.txt b/Documentation/devicetree/bindings/mfd/syscon.txt
deleted file mode 100644
index 25d9e9c2fd53..000000000000
--- a/Documentation/devicetree/bindings/mfd/syscon.txt
+++ /dev/null
@@ -1,32 +0,0 @@
-* System Controller Registers R/W driver
-
-System controller node represents a register region containing a set
-of miscellaneous registers. The registers are not cohesive enough to
-represent as any specific type of device. The typical use-case is for
-some other node's driver, or platform-specific code, to acquire a
-reference to the syscon node (e.g. by phandle, node path, or search
-using a specific compatible value), interrogate the node (or associated
-OS driver) to determine the location of the registers, and access the
-registers directly.
-
-Required properties:
-- compatible: Should contain "syscon".
-- reg: the register region can be accessed from syscon
-
-Optional property:
-- reg-io-width: the size (in bytes) of the IO accesses that should be
- performed on the device.
-- hwlocks: reference to a phandle of a hardware spinlock provider node.
-
-Examples:
-gpr: iomuxc-gpr@20e0000 {
- compatible = "fsl,imx6q-iomuxc-gpr", "syscon";
- reg = <0x020e0000 0x38>;
- hwlocks = <&hwlock1 1>;
-};
-
-hwlock1: hwspinlock@40500000 {
- ...
- reg = <0x40500000 0x1000>;
- #hwlock-cells = <1>;
-};
diff --git a/Documentation/devicetree/bindings/mfd/syscon.yaml b/Documentation/devicetree/bindings/mfd/syscon.yaml
new file mode 100644
index 000000000000..39375e4313d2
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/syscon.yaml
@@ -0,0 +1,84 @@
+# SPDX-License-Identifier: GPL-2.0
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/mfd/syscon.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: System Controller Registers R/W Device Tree Bindings
+
+description: |
+ System controller node represents a register region containing a set
+ of miscellaneous registers. The registers are not cohesive enough to
+ represent as any specific type of device. The typical use-case is
+ for some other node's driver, or platform-specific code, to acquire
+ a reference to the syscon node (e.g. by phandle, node path, or
+ search using a specific compatible value), interrogate the node (or
+ associated OS driver) to determine the location of the registers,
+ and access the registers directly.
+
+maintainers:
+ - Lee Jones <lee.jones@linaro.org>
+
+select:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - syscon
+
+ required:
+ - compatible
+
+properties:
+ compatible:
+ anyOf:
+ - items:
+ - enum:
+ - allwinner,sun8i-a83t-system-controller
+ - allwinner,sun8i-h3-system-controller
+ - allwinner,sun8i-v3s-system-controller
+ - allwinner,sun50i-a64-system-controller
+
+ - const: syscon
+
+ - contains:
+ const: syscon
+ additionalItems: true
+
+ reg:
+ maxItems: 1
+
+ reg-io-width:
+ description: |
+ The size (in bytes) of the IO accesses that should be performed
+ on the device.
+ allOf:
+ - $ref: /schemas/types.yaml#/definitions/uint32
+ - enum: [ 1, 2, 4, 8 ]
+
+ hwlocks:
+ maxItems: 1
+ description:
+ Reference to a phandle of a hardware spinlock provider node.
+
+required:
+ - compatible
+ - reg
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ syscon: syscon@1c00000 {
+ compatible = "allwinner,sun8i-h3-system-controller", "syscon";
+ reg = <0x01c00000 0x1000>;
+ };
+
+ - |
+ gpr: iomuxc-gpr@20e0000 {
+ compatible = "fsl,imx6q-iomuxc-gpr", "syscon";
+ reg = <0x020e0000 0x38>;
+ hwlocks = <&hwlock1 1>;
+ };
+
+...