summaryrefslogtreecommitdiff
path: root/Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml
diff options
context:
space:
mode:
Diffstat (limited to 'Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml')
-rw-r--r--Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml130
1 files changed, 66 insertions, 64 deletions
diff --git a/Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml b/Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml
index 81ae8cafabc1..f07ae3173b03 100644
--- a/Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml
+++ b/Documentation/devicetree/bindings/net/ti,cpsw-switch.yaml
@@ -1,10 +1,10 @@
-# SPDX-License-Identifier: GPL-2.0
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/net/ti,cpsw-switch.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
-title: TI SoC Ethernet Switch Controller (CPSW) Device Tree Bindings
+title: TI SoC Ethernet Switch Controller (CPSW)
maintainers:
- Grygorii Strashko <grygorii.strashko@ti.com>
@@ -23,19 +23,25 @@ properties:
oneOf:
- const: ti,cpsw-switch
- items:
- - const: ti,am335x-cpsw-switch
- - const: ti,cpsw-switch
+ - const: ti,am335x-cpsw-switch
+ - const: ti,cpsw-switch
- items:
- - const: ti,am4372-cpsw-switch
- - const: ti,cpsw-switch
+ - const: ti,am4372-cpsw-switch
+ - const: ti,cpsw-switch
- items:
- - const: ti,dra7-cpsw-switch
- - const: ti,cpsw-switch
+ - const: ti,dra7-cpsw-switch
+ - const: ti,cpsw-switch
reg:
maxItems: 1
description:
- The physical base address and size of full the CPSW module IO range
+ The physical base address and size of full the CPSW module IO range
+
+ '#address-cells':
+ const: 1
+
+ '#size-cells':
+ const: 1
ranges: true
@@ -44,7 +50,6 @@ properties:
description: CPSW functional clock
clock-names:
- maxItems: 1
items:
- const: fck
@@ -57,22 +62,23 @@ properties:
interrupt-names:
items:
- - const: "rx_thresh"
- - const: "rx"
- - const: "tx"
- - const: "misc"
+ - const: rx_thresh
+ - const: rx
+ - const: tx
+ - const: misc
pinctrl-names: true
syscon:
- $ref: /schemas/types.yaml#definitions/phandle
+ $ref: /schemas/types.yaml#/definitions/phandle
description:
Phandle to the system control device node which provides access to
efuse IO range with MAC addresses
-
ethernet-ports:
type: object
+ additionalProperties: false
+
properties:
'#address-cells':
const: 1
@@ -80,53 +86,41 @@ properties:
const: 0
patternProperties:
- "^port@[0-9]+$":
- type: object
- minItems: 1
- maxItems: 2
- description: CPSW external ports
-
- allOf:
- - $ref: ethernet-controller.yaml#
-
- properties:
- reg:
- maxItems: 1
- enum: [1, 2]
- description: CPSW port number
-
- phys:
- $ref: /schemas/types.yaml#definitions/phandle-array
- maxItems: 1
- description: phandle on phy-gmii-sel PHY
-
- label:
- $ref: /schemas/types.yaml#/definitions/string-array
- maxItems: 1
- description: label associated with this port
-
- ti,dual-emac-pvid:
- $ref: /schemas/types.yaml#/definitions/uint32
- maxItems: 1
- minimum: 1
- maximum: 1024
- description:
- Specifies default PORT VID to be used to segregate
- ports. Default value - CPSW port number.
-
- required:
- - reg
- - phys
-
- mdio:
- type: object
- allOf:
- - $ref: "ti,davinci-mdio.yaml#"
- description:
- CPSW MDIO bus.
+ "^port@[12]$":
+ type: object
+ description: CPSW external ports
+
+ $ref: ethernet-controller.yaml#
+ unevaluatedProperties: false
+
+ properties:
+ reg:
+ items:
+ - enum: [1, 2]
+ description: CPSW port number
+
+ phys:
+ maxItems: 1
+ description: phandle on phy-gmii-sel PHY
+
+ label:
+ description: label associated with this port
+
+ ti,dual-emac-pvid:
+ $ref: /schemas/types.yaml#/definitions/uint32
+ minimum: 1
+ maximum: 1024
+ description:
+ Specifies default PORT VID to be used to segregate
+ ports. Default value - CPSW port number.
+
+ required:
+ - reg
+ - phys
cpts:
type: object
+ unevaluatedProperties: false
description:
The Common Platform Time Sync (CPTS) module
@@ -136,7 +130,6 @@ properties:
description: CPTS reference clock
clock-names:
- maxItems: 1
items:
- const: cpts
@@ -156,6 +149,14 @@ properties:
- clocks
- clock-names
+patternProperties:
+ "^mdio@":
+ type: object
+ description:
+ CPSW MDIO bus.
+ $ref: ti,davinci-mdio.yaml#
+
+
required:
- compatible
- reg
@@ -167,6 +168,8 @@ required:
- '#address-cells'
- '#size-cells'
+additionalProperties: false
+
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
@@ -182,7 +185,6 @@ examples:
#address-cells = <1>;
#size-cells = <1>;
syscon = <&scm_conf>;
- inctrl-names = "default", "sleep";
interrupts = <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>,
@@ -201,7 +203,7 @@ examples:
phys = <&phy_gmii_sel 1>;
phy-handle = <&ethphy0_sw>;
phy-mode = "rgmii";
- ti,dual_emac_pvid = <1>;
+ ti,dual-emac-pvid = <1>;
};
cpsw_port2: port@2 {
@@ -211,7 +213,7 @@ examples:
phys = <&phy_gmii_sel 2>;
phy-handle = <&ethphy1_sw>;
phy-mode = "rgmii";
- ti,dual_emac_pvid = <2>;
+ ti,dual-emac-pvid = <2>;
};
};