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-rw-r--r--Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt12
1 files changed, 6 insertions, 6 deletions
diff --git a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
index 982a74ea6df9..1b4d2803dad1 100644
--- a/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
+++ b/Documentation/devicetree/bindings/pci/nvidia,tegra20-pcie.txt
@@ -255,7 +255,7 @@ Tegra30:
SoC DTSI:
- pcie-controller@00003000 {
+ pcie-controller@3000 {
compatible = "nvidia,tegra30-pcie";
device_type = "pci";
reg = <0x00003000 0x00000800 /* PADS registers */
@@ -334,7 +334,7 @@ SoC DTSI:
Board DTS:
- pcie-controller@00003000 {
+ pcie-controller@3000 {
status = "okay";
avdd-pexa-supply = <&ldo1_reg>;
@@ -360,7 +360,7 @@ Tegra124:
SoC DTSI:
- pcie-controller@01003000 {
+ pcie-controller@1003000 {
compatible = "nvidia,tegra124-pcie";
device_type = "pci";
reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */
@@ -425,7 +425,7 @@ SoC DTSI:
Board DTS:
- pcie-controller@01003000 {
+ pcie-controller@1003000 {
status = "okay";
avddio-pex-supply = <&vdd_1v05_run>;
@@ -456,7 +456,7 @@ Tegra210:
SoC DTSI:
- pcie-controller@01003000 {
+ pcie-controller@1003000 {
compatible = "nvidia,tegra210-pcie";
device_type = "pci";
reg = <0x0 0x01003000 0x0 0x00000800 /* PADS registers */
@@ -521,7 +521,7 @@ SoC DTSI:
Board DTS:
- pcie-controller@01003000 {
+ pcie-controller@1003000 {
status = "okay";
avdd-pll-uerefe-supply = <&avdd_1v05_pll>;