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-rw-r--r--Documentation/devicetree/bindings/phy/rockchip,px30-dsi-dphy.yaml11
1 files changed, 4 insertions, 7 deletions
diff --git a/Documentation/devicetree/bindings/phy/rockchip,px30-dsi-dphy.yaml b/Documentation/devicetree/bindings/phy/rockchip,px30-dsi-dphy.yaml
index bb0da87bcd84..46e64fa293d5 100644
--- a/Documentation/devicetree/bindings/phy/rockchip,px30-dsi-dphy.yaml
+++ b/Documentation/devicetree/bindings/phy/rockchip,px30-dsi-dphy.yaml
@@ -13,14 +13,13 @@ properties:
"#phy-cells":
const: 0
- "#clock-cells":
- const: 0
-
compatible:
enum:
- rockchip,px30-dsi-dphy
- rockchip,rk3128-dsi-dphy
- rockchip,rk3368-dsi-dphy
+ - rockchip,rk3568-dsi-dphy
+ - rockchip,rv1126-dsi-dphy
reg:
maxItems: 1
@@ -49,7 +48,6 @@ properties:
required:
- "#phy-cells"
- - "#clock-cells"
- compatible
- reg
- clocks
@@ -62,11 +60,10 @@ additionalProperties: false
examples:
- |
dsi_dphy: phy@ff2e0000 {
- compatible = "rockchip,px30-video-phy";
- reg = <0x0 0xff2e0000 0x0 0x10000>;
+ compatible = "rockchip,px30-dsi-dphy";
+ reg = <0xff2e0000 0x10000>;
clocks = <&pmucru 13>, <&cru 12>;
clock-names = "ref", "pclk";
- #clock-cells = <0>;
resets = <&cru 12>;
reset-names = "apb";
#phy-cells = <0>;