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-rw-r--r--Documentation/devicetree/bindings/media/i2c/techwell,tw9900.yaml2
-rw-r--r--Documentation/devicetree/bindings/media/rockchip-isp1.yaml37
-rw-r--r--Documentation/devicetree/bindings/media/st,stm32mp25-video-codec.yaml49
3 files changed, 81 insertions, 7 deletions
diff --git a/Documentation/devicetree/bindings/media/i2c/techwell,tw9900.yaml b/Documentation/devicetree/bindings/media/i2c/techwell,tw9900.yaml
index e37317f81072..c9673391afdb 100644
--- a/Documentation/devicetree/bindings/media/i2c/techwell,tw9900.yaml
+++ b/Documentation/devicetree/bindings/media/i2c/techwell,tw9900.yaml
@@ -36,7 +36,7 @@ properties:
properties:
port@0:
- $ref: /schemas/graph.yaml#/$defs/port-base
+ $ref: /schemas/graph.yaml#/properties/port
description: Analog input port
properties:
diff --git a/Documentation/devicetree/bindings/media/rockchip-isp1.yaml b/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
index afcaa427d48b..6be00aca4181 100644
--- a/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
+++ b/Documentation/devicetree/bindings/media/rockchip-isp1.yaml
@@ -16,6 +16,7 @@ description: |
properties:
compatible:
enum:
+ - fsl,imx8mp-isp
- rockchip,px30-cif-isp
- rockchip,rk3399-cif-isp
@@ -36,9 +37,9 @@ properties:
minItems: 3
items:
# isp0 and isp1
- - description: ISP clock
- - description: ISP AXI clock
- - description: ISP AHB clock
+ - description: ISP clock (for imx8mp, clk)
+ - description: ISP AXI clock (for imx8mp, m_hclk)
+ - description: ISP AHB clock (for imx8mp, hclk)
# only for isp1
- description: ISP Pixel clock
@@ -52,6 +53,13 @@ properties:
# only for isp1
- const: pclk
+ fsl,blk-ctrl:
+ $ref: /schemas/types.yaml#/definitions/phandle-array
+ maxItems: 1
+ description:
+ A phandle to the media block control for the ISP, followed by a cell
+ containing the index of the gasket.
+
iommus:
maxItems: 1
@@ -113,9 +121,6 @@ required:
- interrupts
- clocks
- clock-names
- - iommus
- - phys
- - phy-names
- power-domains
- ports
@@ -143,6 +148,26 @@ allOf:
required:
- interrupt-names
+ - if:
+ properties:
+ compatible:
+ contains:
+ const: fsl,imx8mp-isp
+ then:
+ properties:
+ iommus: false
+ phys: false
+ phy-names: false
+ required:
+ - fsl,blk-ctrl
+ else:
+ properties:
+ fsl,blk-ctrl: false
+ required:
+ - iommus
+ - phys
+ - phy-names
+
additionalProperties: false
examples:
diff --git a/Documentation/devicetree/bindings/media/st,stm32mp25-video-codec.yaml b/Documentation/devicetree/bindings/media/st,stm32mp25-video-codec.yaml
new file mode 100644
index 000000000000..b8611bc8756c
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/st,stm32mp25-video-codec.yaml
@@ -0,0 +1,49 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/media/st,stm32mp25-video-codec.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: STMicroelectronics STM32MP25 VDEC video decoder & VENC video encoder
+
+maintainers:
+ - Hugues Fruchet <hugues.fruchet@foss.st.com>
+
+description:
+ The STMicroelectronics STM32MP25 SOCs embeds a VDEC video hardware
+ decoder peripheral based on Verisilicon VC8000NanoD IP (former Hantro G1)
+ and a VENC video hardware encoder peripheral based on Verisilicon
+ VC8000NanoE IP (former Hantro H1).
+
+properties:
+ compatible:
+ enum:
+ - st,stm32mp25-vdec
+ - st,stm32mp25-venc
+
+ reg:
+ maxItems: 1
+
+ interrupts:
+ maxItems: 1
+
+ clocks:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - interrupts
+ - clocks
+
+additionalProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ video-codec@580d0000 {
+ compatible = "st,stm32mp25-vdec";
+ reg = <0x580d0000 0x3c8>;
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ck_icn_p_vdec>;
+ };