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-rw-r--r--Documentation/hwmon/adm1275.rst2
-rw-r--r--Documentation/hwmon/amd_energy.rst7
-rw-r--r--Documentation/hwmon/corsair-psu.rst82
-rw-r--r--Documentation/hwmon/index.rst6
-rw-r--r--Documentation/hwmon/ltc2992.rst56
-rw-r--r--Documentation/hwmon/max127.rst45
-rw-r--r--Documentation/hwmon/nct6683.rst3
-rw-r--r--Documentation/hwmon/pm6764tr.rst32
-rw-r--r--Documentation/hwmon/pmbus-core.rst6
-rw-r--r--Documentation/hwmon/pmbus.rst6
-rw-r--r--Documentation/hwmon/q54sj108a2.rst54
-rw-r--r--Documentation/hwmon/sbtsi_temp.rst42
12 files changed, 326 insertions, 15 deletions
diff --git a/Documentation/hwmon/adm1275.rst b/Documentation/hwmon/adm1275.rst
index ce6528f90e4a..804590eeabdc 100644
--- a/Documentation/hwmon/adm1275.rst
+++ b/Documentation/hwmon/adm1275.rst
@@ -83,7 +83,7 @@ or current scaling. Reported voltages, currents, and power are raw measurements,
and will typically have to be scaled.
The shunt value in micro-ohms can be set via device tree at compile-time. Please
-refer to the Documentation/devicetree/bindings/hwmon/adm1275.txt for bindings
+refer to the Documentation/devicetree/bindings/hwmon/adi,adm1275.yaml for bindings
if the device tree is used.
Platform data support
diff --git a/Documentation/hwmon/amd_energy.rst b/Documentation/hwmon/amd_energy.rst
index 86e4ebc5cbc2..9d58cd5ee3da 100644
--- a/Documentation/hwmon/amd_energy.rst
+++ b/Documentation/hwmon/amd_energy.rst
@@ -5,7 +5,9 @@ Kernel driver amd_energy
Supported chips:
-* AMD Family 17h Processors
+* AMD Family 17h Processors: Model 30h
+
+* AMD Family 19h Processors: Model 01h
Prefix: 'amd_energy'
@@ -112,3 +114,6 @@ energy[N]_input EcoreX Core Energy X = [0] to [nr_cpus - 1]
energy[N]_input EsocketX Socket Energy X = [0] to [nr_socks -1]
Measured input socket energy
=============== ======== ======================================
+
+Note: To address CVE-2020-12912, the visibility of the energy[N]_input
+attributes is restricted to owner and groups only.
diff --git a/Documentation/hwmon/corsair-psu.rst b/Documentation/hwmon/corsair-psu.rst
new file mode 100644
index 000000000000..396b95c9a76a
--- /dev/null
+++ b/Documentation/hwmon/corsair-psu.rst
@@ -0,0 +1,82 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+
+Kernel driver corsair-psu
+=========================
+
+Supported devices:
+
+* Corsair Power Supplies
+
+ Corsair HX550i
+
+ Corsair HX650i
+
+ Corsair HX750i
+
+ Corsair HX850i
+
+ Corsair HX1000i
+
+ Corsair HX1200i
+
+ Corsair RM550i
+
+ Corsair RM650i
+
+ Corsair RM750i
+
+ Corsair RM850i
+
+ Corsair RM1000i
+
+Author: Wilken Gottwalt
+
+Description
+-----------
+
+This driver implements the sysfs interface for the Corsair PSUs with a HID protocol
+interface of the HXi and RMi series.
+These power supplies provide access to a micro-controller with 2 attached
+temperature sensors, 1 fan rpm sensor, 4 sensors for volt levels, 4 sensors for
+power usage and 4 sensors for current levels and addtional non-sensor information
+like uptimes.
+
+Sysfs entries
+-------------
+
+======================= ========================================================
+curr1_input Total current usage
+curr2_input Current on the 12v psu rail
+curr3_input Current on the 5v psu rail
+curr4_input Current on the 3.3v psu rail
+fan1_input RPM of psu fan
+in0_input Voltage of the psu ac input
+in1_input Voltage of the 12v psu rail
+in2_input Voltage of the 5v psu rail
+in3_input Voltage of the 3.3 psu rail
+power1_input Total power usage
+power2_input Power usage of the 12v psu rail
+power3_input Power usage of the 5v psu rail
+power4_input Power usage of the 3.3v psu rail
+temp1_input Temperature of the psu vrm component
+temp2_input Temperature of the psu case
+======================= ========================================================
+
+Usage Notes
+-----------
+
+It is an USB HID device, so it is auto-detected and supports hot-swapping.
+
+Flickering values in the rail voltage levels can be an indicator for a failing
+PSU. The driver also provides some additional useful values via debugfs, which
+do not fit into the hwmon class.
+
+Debugfs entries
+---------------
+
+======================= ========================================================
+uptime Current uptime of the psu
+uptime_total Total uptime of the psu
+vendor Vendor name of the psu
+product Product name of the psu
+======================= ========================================================
diff --git a/Documentation/hwmon/index.rst b/Documentation/hwmon/index.rst
index b797db738225..fcb870ce6286 100644
--- a/Documentation/hwmon/index.rst
+++ b/Documentation/hwmon/index.rst
@@ -49,6 +49,7 @@ Hardware Monitoring Kernel Drivers
bt1-pvt
coretemp
corsair-cpro
+ corsair-psu
da9052
da9055
dell-smm-hwmon
@@ -100,6 +101,7 @@ Hardware Monitoring Kernel Drivers
lm95234
lm95245
lochnagar
+ ltc2992
ltc2945
ltc2947
ltc2978
@@ -110,6 +112,7 @@ Hardware Monitoring Kernel Drivers
ltc4245
ltc4260
ltc4261
+ max127
max16064
max16065
max1619
@@ -144,11 +147,14 @@ Hardware Monitoring Kernel Drivers
pc87360
pc87427
pcf8591
+ pm6764tr
pmbus
powr1220
pxe1610
pwm-fan
+ q54sj108a2
raspberrypi-hwmon
+ sbtsi_temp
sch5627
sch5636
scpi-hwmon
diff --git a/Documentation/hwmon/ltc2992.rst b/Documentation/hwmon/ltc2992.rst
new file mode 100644
index 000000000000..46aa1aa84a1a
--- /dev/null
+++ b/Documentation/hwmon/ltc2992.rst
@@ -0,0 +1,56 @@
+.. SPDX-License-Identifier: GPL-2.0
+
+Kernel driver ltc2992
+=====================
+
+Supported chips:
+ * Linear Technology LTC2992
+ Prefix: 'ltc2992'
+ Datasheet: https://www.analog.com/media/en/technical-documentation/data-sheets/ltc2992.pdf
+
+Author: Alexandru Tachici <alexandru.tachici@analog.com>
+
+
+Description
+-----------
+
+This driver supports hardware monitoring for Linear Technology LTC2992 power monitor.
+
+LTC2992 is a rail-to-rail system monitor that measures current,
+voltage, and power of two supplies.
+
+Two ADCs simultaneously measure each supply’s current. A third ADC monitors
+the input voltages and four auxiliary external voltages.
+
+
+Sysfs entries
+-------------
+
+The following attributes are supported. Limits are read-write,
+all other attributes are read-only.
+
+in_reset_history Reset all highest/lowest values.
+
+inX_input Measured voltage.
+inX_lowest Minimum measured voltage.
+inX_highest Maximum measured voltage.
+inX_min Minimum voltage allowed.
+inX_max Maximum voltage allowed.
+inX_min_alarm An undervoltage occurred. Cleared on read.
+inX_max_alarm An overvoltage occurred. Cleared on read.
+
+currX_input Measured current.
+currX_lowest Minimum measured current.
+currX_highest Maximum measured current.
+currX_min Minimum current allowed.
+currX_max Maximum current allowed.
+currX_min_alarm An undercurrent occurred. Cleared on read.
+currX_max_alarm An overcurrent occurred. Cleared on read.
+
+powerX_input Measured power.
+powerX_input_lowest Minimum measured voltage.
+powerX_input_highest Maximum measured voltage.
+powerX_min Minimum power.
+powerX_max Maximum power.
+powerX_min_alarm An underpower occurred. Cleared on read.
+powerX_max_alarm An overpower occurred. Cleared on read.
diff --git a/Documentation/hwmon/max127.rst b/Documentation/hwmon/max127.rst
new file mode 100644
index 000000000000..dc192dd9c37c
--- /dev/null
+++ b/Documentation/hwmon/max127.rst
@@ -0,0 +1,45 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+
+Kernel driver max127
+====================
+
+Author:
+
+ * Tao Ren <rentao.bupt@gmail.com>
+
+Supported chips:
+
+ * Maxim MAX127
+
+ Prefix: 'max127'
+
+ Datasheet: https://datasheets.maximintegrated.com/en/ds/MAX127-MAX128.pdf
+
+Description
+-----------
+
+The MAX127 is a multirange, 12-bit data acquisition system (DAS) providing
+8 analog input channels that are independently software programmable for
+a variety of ranges. The available ranges are {0,5V}, {0,10V}, {-5,5V}
+and {-10,10V}.
+
+The MAX127 features a 2-wire, I2C-compatible serial interface that allows
+communication among multiple devices using SDA and SCL lines.
+
+Sysfs interface
+---------------
+
+ ============== ==============================================================
+ in[0-7]_input The input voltage (in mV) of the corresponding channel.
+ RO
+
+ in[0-7]_min The lower input limit (in mV) for the corresponding channel.
+ ADC range and LSB will be updated when the limit is changed.
+ For the MAX127, it will be adjusted to -10000, -5000, or 0.
+ RW
+
+ in[0-7]_max The higher input limit (in mV) for the corresponding channel.
+ ADC range and LSB will be updated when the limit is changed.
+ For the MAX127, it will be adjusted to 0, 5000, or 10000.
+ RW
+ ============== ==============================================================
diff --git a/Documentation/hwmon/nct6683.rst b/Documentation/hwmon/nct6683.rst
index efbf7e9703ec..8646ad519fcd 100644
--- a/Documentation/hwmon/nct6683.rst
+++ b/Documentation/hwmon/nct6683.rst
@@ -3,7 +3,7 @@ Kernel driver nct6683
Supported chips:
- * Nuvoton NCT6683D
+ * Nuvoton NCT6683D/NCT6687D
Prefix: 'nct6683'
@@ -61,4 +61,5 @@ Board Firmware version
Intel DH87RL NCT6683D EC firmware version 1.0 build 04/03/13
Intel DH87MC NCT6683D EC firmware version 1.0 build 04/03/13
Intel DB85FL NCT6683D EC firmware version 1.0 build 04/03/13
+MSI B550 NCT6687D EC firmware version 1.0 build 05/07/20
=============== ===============================================
diff --git a/Documentation/hwmon/pm6764tr.rst b/Documentation/hwmon/pm6764tr.rst
new file mode 100644
index 000000000000..a1fb8fea2326
--- /dev/null
+++ b/Documentation/hwmon/pm6764tr.rst
@@ -0,0 +1,32 @@
+.. SPDX-License-Identifier: GPL-2.0-only
+
+Kernel driver pm6764tr
+======================
+
+Supported chips:
+
+ * ST PM6764TR
+
+ Prefix: 'pm6764tr'
+
+ Addresses scanned: -
+
+ Datasheet: http://www.st.com/resource/en/data_brief/pm6764.pdf
+
+Authors:
+ <hsu.yungteng@gmail.com>
+
+Description:
+------------
+
+This driver supports the STMicroelectronics PM6764TR chip. The PM6764TR is a high
+performance digital controller designed to power Intel’s VR12.5 processors and memories.
+
+The device utilizes digital technology to implement all control and power management
+functions to provide maximum flexibility and performance. The NVM is embedded to store
+custom configurations. The PM6764TR device features up to 4-phase programmable operation.
+
+The PM6764TR supports power state transitions featuring VFDE, and programmable DPM
+maintaining the best efficiency over all loading conditions without compromising transient
+response. The device assures fast and independent protection against load overcurrent,
+under/overvoltage and feedback disconnections.
diff --git a/Documentation/hwmon/pmbus-core.rst b/Documentation/hwmon/pmbus-core.rst
index e22c4f6808bc..73e23ab42cc3 100644
--- a/Documentation/hwmon/pmbus-core.rst
+++ b/Documentation/hwmon/pmbus-core.rst
@@ -279,12 +279,6 @@ function.
::
- void pmbus_do_remove(struct i2c_client *client);
-
-Execute driver remove function. Similar to standard driver remove function.
-
-::
-
const struct pmbus_driver_info
*pmbus_get_driver_info(struct i2c_client *client);
diff --git a/Documentation/hwmon/pmbus.rst b/Documentation/hwmon/pmbus.rst
index fb3ad67dedc1..c44f14115413 100644
--- a/Documentation/hwmon/pmbus.rst
+++ b/Documentation/hwmon/pmbus.rst
@@ -148,11 +148,6 @@ Emerson DS1200 power modules might look as follows::
return pmbus_do_probe(client, &ds1200_info);
}
- static int ds1200_remove(struct i2c_client *client)
- {
- return pmbus_do_remove(client);
- }
-
static const struct i2c_device_id ds1200_id[] = {
{"ds1200", 0},
{}
@@ -166,7 +161,6 @@ Emerson DS1200 power modules might look as follows::
.name = "ds1200",
},
.probe_new = ds1200_probe,
- .remove = ds1200_remove,
.id_table = ds1200_id,
};
diff --git a/Documentation/hwmon/q54sj108a2.rst b/Documentation/hwmon/q54sj108a2.rst
new file mode 100644
index 000000000000..f95d81382a9f
--- /dev/null
+++ b/Documentation/hwmon/q54sj108a2.rst
@@ -0,0 +1,54 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+
+Kernel driver q54sj108a2
+========================
+
+Supported chips:
+
+ * DELTA Q54SJ108A2NCAH, Q54SJ108A2NCDH, Q54SJ108A2NCPG, Q54SJ108A2NCPH
+
+ Prefix: 'q54sj108a2'
+
+ Addresses scanned: -
+
+ Datasheet: https://filecenter.delta-china.com.cn/products/download/01/0102/datasheet/DS_Q54SJ108A2.pdf
+
+Authors:
+ Xiao.ma <xiao.mx.ma@deltaww.com>
+
+
+Description
+-----------
+
+This driver implements support for DELTA Q54SJ108A2NCAH, Q54SJ108A2NCDH,
+Q54SJ108A2NCPG, and Q54SJ108A2NCPH 1/4 Brick DC/DC Regulated Power Module
+with PMBus support.
+
+The driver is a client driver to the core PMBus driver.
+Please see Documentation/hwmon/pmbus.rst for details on PMBus client drivers.
+
+
+Usage Notes
+-----------
+
+This driver does not auto-detect devices. You will have to instantiate the
+devices explicitly. Please see Documentation/i2c/instantiating-devices.rst for
+details.
+
+
+Sysfs entries
+-------------
+
+===================== ===== ==================================================
+curr1_alarm RO Output current alarm
+curr1_input RO Output current
+curr1_label RO 'iout1'
+in1_alarm RO Input voltage alarm
+in1_input RO Input voltage
+in1_label RO 'vin'
+in2_alarm RO Output voltage alarm
+in2_input RO Output voltage
+in2_label RO 'vout1'
+temp1_alarm RO Temperature alarm
+temp1_input RO Chip temperature
+===================== ===== ==================================================
diff --git a/Documentation/hwmon/sbtsi_temp.rst b/Documentation/hwmon/sbtsi_temp.rst
new file mode 100644
index 000000000000..922b3c8db666
--- /dev/null
+++ b/Documentation/hwmon/sbtsi_temp.rst
@@ -0,0 +1,42 @@
+.. SPDX-License-Identifier: GPL-2.0-or-later
+
+Kernel driver sbtsi_temp
+==================
+
+Supported hardware:
+
+ * Sideband interface (SBI) Temperature Sensor Interface (SB-TSI)
+ compliant AMD SoC temperature device.
+
+ Prefix: 'sbtsi_temp'
+
+ Addresses scanned: This driver doesn't support address scanning.
+
+ To instantiate this driver on an AMD CPU with SB-TSI
+ support, the i2c bus number would be the bus connected from the board
+ management controller (BMC) to the CPU. The i2c address is specified in
+ Section 6.3.1 of the SoC register reference: The SB-TSI address is normally
+ 98h for socket 0 and 90h for socket 1, but it could vary based on hardware
+ address select pins.
+
+ Datasheet: The SB-TSI interface and protocol is available as part of
+ the open source SoC register reference at:
+
+ https://www.amd.com/system/files/TechDocs/56255_OSRR.pdf
+
+ The Advanced Platform Management Link (APML) Specification is
+ available at:
+
+ http://developer.amd.com/wordpress/media/2012/10/41918.pdf
+
+Author: Kun Yi <kunyi@google.com>
+
+Description
+-----------
+
+The SBI temperature sensor interface (SB-TSI) is an emulation of the software
+and physical interface of a typical 8-pin remote temperature sensor (RTS) on
+AMD SoCs. It implements one temperature sensor with readings and limit
+registers encode the temperature in increments of 0.125 from 0 to 255.875.
+Limits can be set through the writable thresholds, and if reached will trigger
+corresponding alert signals.