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-rw-r--r--Documentation/kbuild/makefiles.rst49
1 files changed, 16 insertions, 33 deletions
diff --git a/Documentation/kbuild/makefiles.rst b/Documentation/kbuild/makefiles.rst
index b1733b877025..0e0eb2c8da7d 100644
--- a/Documentation/kbuild/makefiles.rst
+++ b/Documentation/kbuild/makefiles.rst
@@ -28,7 +28,6 @@ This document describes the Linux kernel Makefiles.
--- 4.3 Using C++ for host programs
--- 4.4 Controlling compiler options for host programs
--- 4.5 When host programs are actually built
- --- 4.6 Using hostprogs-$(CONFIG_FOO)
=== 5 Kbuild clean infrastructure
@@ -595,11 +594,11 @@ compilation stage.
Two steps are required in order to use a host executable.
The first step is to tell kbuild that a host program exists. This is
-done utilising the variable hostprogs-y.
+done utilising the variable "hostprogs".
The second step is to add an explicit dependency to the executable.
This can be done in two ways. Either add the dependency in a rule,
-or utilise the variable $(always).
+or utilise the variable "always-y".
Both possibilities are described in the following.
4.1 Simple Host Program
@@ -612,7 +611,7 @@ Both possibilities are described in the following.
Example::
- hostprogs-y := bin2hex
+ hostprogs := bin2hex
Kbuild assumes in the above example that bin2hex is made from a single
c-source file named bin2hex.c located in the same directory as
@@ -630,7 +629,7 @@ Both possibilities are described in the following.
Example::
#scripts/lxdialog/Makefile
- hostprogs-y := lxdialog
+ hostprogs := lxdialog
lxdialog-objs := checklist.o lxdialog.o
Objects with extension .o are compiled from the corresponding .c
@@ -650,7 +649,7 @@ Both possibilities are described in the following.
Example::
#scripts/kconfig/Makefile
- hostprogs-y := qconf
+ hostprogs := qconf
qconf-cxxobjs := qconf.o
In the example above the executable is composed of the C++ file
@@ -662,7 +661,7 @@ Both possibilities are described in the following.
Example::
#scripts/kconfig/Makefile
- hostprogs-y := qconf
+ hostprogs := qconf
qconf-cxxobjs := qconf.o
qconf-objs := check.o
@@ -710,7 +709,7 @@ Both possibilities are described in the following.
Example::
#drivers/pci/Makefile
- hostprogs-y := gen-devlist
+ hostprogs := gen-devlist
$(obj)/devlist.h: $(src)/pci.ids $(obj)/gen-devlist
( cd $(obj); ./gen-devlist ) < $<
@@ -718,47 +717,31 @@ Both possibilities are described in the following.
$(obj)/gen-devlist is updated. Note that references to
the host programs in special rules must be prefixed with $(obj).
- (2) Use $(always)
+ (2) Use always-y
When there is no suitable special rule, and the host program
- shall be built when a makefile is entered, the $(always)
+ shall be built when a makefile is entered, the always-y
variable shall be used.
Example::
#scripts/lxdialog/Makefile
- hostprogs-y := lxdialog
- always := $(hostprogs-y)
+ hostprogs := lxdialog
+ always-y := $(hostprogs)
This will tell kbuild to build lxdialog even if not referenced in
any rule.
-4.6 Using hostprogs-$(CONFIG_FOO)
----------------------------------
-
- A typical pattern in a Kbuild file looks like this:
-
- Example::
-
- #scripts/Makefile
- hostprogs-$(CONFIG_KALLSYMS) += kallsyms
-
- Kbuild knows about both 'y' for built-in and 'm' for module.
- So if a config symbol evaluates to 'm', kbuild will still build
- the binary. In other words, Kbuild handles hostprogs-m exactly
- like hostprogs-y. But only hostprogs-y is recommended to be used
- when no CONFIG symbols are involved.
-
5 Kbuild clean infrastructure
=============================
"make clean" deletes most generated files in the obj tree where the kernel
is compiled. This includes generated files such as host programs.
-Kbuild knows targets listed in $(hostprogs-y), $(hostprogs-m), $(always),
-$(extra-y) and $(targets). They are all deleted during "make clean".
-Files matching the patterns "*.[oas]", "*.ko", plus some additional files
-generated by kbuild are deleted all over the kernel src tree when
-"make clean" is executed.
+Kbuild knows targets listed in $(hostprogs), $(always-y), $(always-m),
+$(always-), $(extra-y), $(extra-) and $(targets). They are all deleted
+during "make clean". Files matching the patterns "*.[oas]", "*.ko", plus
+some additional files generated by kbuild are deleted all over the kernel
+source tree when "make clean" is executed.
Additional files or directories can be specified in kbuild makefiles by use of
$(clean-files).