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Diffstat (limited to 'arch/arm/boot/dts/exynos5250.dtsi')
-rw-r--r--arch/arm/boot/dts/exynos5250.dtsi70
1 files changed, 35 insertions, 35 deletions
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 5b5aa79988e9..97e89859ba3d 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -216,14 +216,14 @@
pd_disp1: power-domain@100440a0 {
compatible = "samsung,exynos4210-pd";
- reg = <0x100440A0 0x20>;
+ reg = <0x100440a0 0x20>;
#power-domain-cells = <0>;
label = "DISP1";
};
pd_mau: power-domain@100440c0 {
compatible = "samsung,exynos4210-pd";
- reg = <0x100440C0 0x20>;
+ reg = <0x100440c0 0x20>;
#power-domain-cells = <0>;
label = "MAU";
};
@@ -236,7 +236,7 @@
clock_audss: audss-clock-controller@3810000 {
compatible = "samsung,exynos5250-audss-clock";
- reg = <0x03810000 0x0C>;
+ reg = <0x03810000 0x0c>;
#clock-cells = <1>;
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>,
<&clock CLK_SCLK_AUDIO0>, <&clock CLK_DIV_PCM0>;
@@ -247,7 +247,7 @@
timer@101c0000 {
compatible = "samsung,exynos5250-mct",
"samsung,exynos4210-mct";
- reg = <0x101C0000 0x800>;
+ reg = <0x101c0000 0x800>;
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_MCT>;
clock-names = "fin_pll", "mct";
interrupts-extended = <&combiner 23 3>,
@@ -302,7 +302,7 @@
watchdog@101d0000 {
compatible = "samsung,exynos5250-wdt";
- reg = <0x101D0000 0x100>;
+ reg = <0x101d0000 0x100>;
interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_WDT>;
clock-names = "watchdog";
@@ -322,7 +322,7 @@
rotator: rotator@11c00000 {
compatible = "samsung,exynos5250-rotator";
- reg = <0x11C00000 0x64>;
+ reg = <0x11c00000 0x64>;
interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_ROTATOR>;
clock-names = "rotator";
@@ -387,7 +387,7 @@
sata: sata@122f0000 {
compatible = "snps,dwc-ahci";
- reg = <0x122F0000 0x1ff>;
+ reg = <0x122f0000 0x1ff>;
interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_SATA>, <&clock CLK_SCLK_SATA>;
clock-names = "sata", "pclk";
@@ -410,7 +410,7 @@
/* i2c_0-3 are defined in exynos5.dtsi */
i2c_4: i2c@12ca0000 {
compatible = "samsung,s3c2440-i2c";
- reg = <0x12CA0000 0x100>;
+ reg = <0x12ca0000 0x100>;
interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
@@ -423,7 +423,7 @@
i2c_5: i2c@12cb0000 {
compatible = "samsung,s3c2440-i2c";
- reg = <0x12CB0000 0x100>;
+ reg = <0x12cb0000 0x100>;
interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
@@ -436,7 +436,7 @@
i2c_6: i2c@12cc0000 {
compatible = "samsung,s3c2440-i2c";
- reg = <0x12CC0000 0x100>;
+ reg = <0x12cc0000 0x100>;
interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
@@ -449,7 +449,7 @@
i2c_7: i2c@12cd0000 {
compatible = "samsung,s3c2440-i2c";
- reg = <0x12CD0000 0x100>;
+ reg = <0x12cd0000 0x100>;
interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
@@ -462,7 +462,7 @@
i2c_8: i2c@12ce0000 {
compatible = "samsung,s3c2440-hdmiphy-i2c";
- reg = <0x12CE0000 0x1000>;
+ reg = <0x12ce0000 0x1000>;
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
#address-cells = <1>;
#size-cells = <0>;
@@ -478,7 +478,7 @@
i2c_9: i2c@121d0000 {
compatible = "samsung,exynos5-sata-phy-i2c";
- reg = <0x121D0000 0x100>;
+ reg = <0x121d0000 0x100>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&clock CLK_SATA_PHYI2C>;
@@ -608,7 +608,7 @@
i2s1: i2s@12d60000 {
compatible = "samsung,s3c6410-i2s";
status = "disabled";
- reg = <0x12D60000 0x100>;
+ reg = <0x12d60000 0x100>;
dmas = <&pdma1 12>,
<&pdma1 11>;
dma-names = "tx", "rx";
@@ -623,7 +623,7 @@
i2s2: i2s@12d70000 {
compatible = "samsung,s3c6410-i2s";
status = "disabled";
- reg = <0x12D70000 0x100>;
+ reg = <0x12d70000 0x100>;
dmas = <&pdma0 12>,
<&pdma0 11>;
dma-names = "tx", "rx";
@@ -695,7 +695,7 @@
pdma0: dma-controller@121a0000 {
compatible = "arm,pl330", "arm,primecell";
- reg = <0x121A0000 0x1000>;
+ reg = <0x121a0000 0x1000>;
interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PDMA0>;
clock-names = "apb_pclk";
@@ -704,7 +704,7 @@
pdma1: dma-controller@121b0000 {
compatible = "arm,pl330", "arm,primecell";
- reg = <0x121B0000 0x1000>;
+ reg = <0x121b0000 0x1000>;
interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_PDMA1>;
clock-names = "apb_pclk";
@@ -722,7 +722,7 @@
mdma1: dma-controller@11c10000 {
compatible = "arm,pl330", "arm,primecell";
- reg = <0x11C10000 0x1000>;
+ reg = <0x11c10000 0x1000>;
interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_MDMA1>;
clock-names = "apb_pclk";
@@ -787,7 +787,7 @@
hdmicec: cec@101b0000 {
compatible = "samsung,s5p-cec";
- reg = <0x101B0000 0x200>;
+ reg = <0x101b0000 0x200>;
interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_HDMI_CEC>;
clock-names = "hdmicec";
@@ -838,7 +838,7 @@
adc: adc@12d10000 {
compatible = "samsung,exynos-adc-v1";
- reg = <0x12D10000 0x100>;
+ reg = <0x12d10000 0x100>;
interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clock CLK_ADC>;
clock-names = "adc";
@@ -849,7 +849,7 @@
sysmmu_g2d: sysmmu@10a60000 {
compatible = "samsung,exynos-sysmmu";
- reg = <0x10A60000 0x1000>;
+ reg = <0x10a60000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <24 5>;
clock-names = "sysmmu", "master";
@@ -881,7 +881,7 @@
sysmmu_rotator: sysmmu@11d40000 {
compatible = "samsung,exynos-sysmmu";
- reg = <0x11D40000 0x1000>;
+ reg = <0x11d40000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 0>;
clock-names = "sysmmu", "master";
@@ -891,7 +891,7 @@
sysmmu_jpeg: sysmmu@11f20000 {
compatible = "samsung,exynos-sysmmu";
- reg = <0x11F20000 0x1000>;
+ reg = <0x11f20000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <4 2>;
power-domains = <&pd_gsc>;
@@ -922,7 +922,7 @@
sysmmu_fimc_fd: sysmmu@132a0000 {
compatible = "samsung,exynos-sysmmu";
- reg = <0x132A0000 0x1000>;
+ reg = <0x132a0000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <5 0>;
clock-names = "sysmmu";
@@ -952,7 +952,7 @@
sysmmu_fimc_mcuctl: sysmmu@132b0000 {
compatible = "samsung,exynos-sysmmu";
- reg = <0x132B0000 0x1000>;
+ reg = <0x132b0000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <5 4>;
clock-names = "sysmmu";
@@ -962,7 +962,7 @@
sysmmu_fimc_odc: sysmmu@132c0000 {
compatible = "samsung,exynos-sysmmu";
- reg = <0x132C0000 0x1000>;
+ reg = <0x132c0000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <11 0>;
clock-names = "sysmmu";
@@ -972,7 +972,7 @@
sysmmu_fimc_dis0: sysmmu@132d0000 {
compatible = "samsung,exynos-sysmmu";
- reg = <0x132D0000 0x1000>;
+ reg = <0x132d0000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <10 4>;
clock-names = "sysmmu";
@@ -982,7 +982,7 @@
sysmmu_fimc_dis1: sysmmu@132e0000 {
compatible = "samsung,exynos-sysmmu";
- reg = <0x132E0000 0x1000>;
+ reg = <0x132e0000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <9 4>;
clock-names = "sysmmu";
@@ -992,7 +992,7 @@
sysmmu_fimc_3dnr: sysmmu@132f0000 {
compatible = "samsung,exynos-sysmmu";
- reg = <0x132F0000 0x1000>;
+ reg = <0x132f0000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <5 6>;
clock-names = "sysmmu";
@@ -1002,7 +1002,7 @@
sysmmu_fimc_lite0: sysmmu@13c40000 {
compatible = "samsung,exynos-sysmmu";
- reg = <0x13C40000 0x1000>;
+ reg = <0x13c40000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <3 4>;
power-domains = <&pd_gsc>;
@@ -1013,7 +1013,7 @@
sysmmu_fimc_lite1: sysmmu@13c50000 {
compatible = "samsung,exynos-sysmmu";
- reg = <0x13C50000 0x1000>;
+ reg = <0x13c50000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <24 1>;
power-domains = <&pd_gsc>;
@@ -1024,7 +1024,7 @@
sysmmu_gsc0: sysmmu@13e80000 {
compatible = "samsung,exynos-sysmmu";
- reg = <0x13E80000 0x1000>;
+ reg = <0x13e80000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <2 0>;
power-domains = <&pd_gsc>;
@@ -1035,7 +1035,7 @@
sysmmu_gsc1: sysmmu@13e90000 {
compatible = "samsung,exynos-sysmmu";
- reg = <0x13E90000 0x1000>;
+ reg = <0x13e90000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <2 2>;
power-domains = <&pd_gsc>;
@@ -1046,7 +1046,7 @@
sysmmu_gsc2: sysmmu@13ea0000 {
compatible = "samsung,exynos-sysmmu";
- reg = <0x13EA0000 0x1000>;
+ reg = <0x13ea0000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <2 4>;
power-domains = <&pd_gsc>;
@@ -1057,7 +1057,7 @@
sysmmu_gsc3: sysmmu@13eb0000 {
compatible = "samsung,exynos-sysmmu";
- reg = <0x13EB0000 0x1000>;
+ reg = <0x13eb0000 0x1000>;
interrupt-parent = <&combiner>;
interrupts = <2 6>;
power-domains = <&pd_gsc>;
generated by cgit (git 2.34.1) at 2025-04-24 03:44:24 +0000