diff options
Diffstat (limited to 'arch/arm/boot/dts/exynos5420-cpus.dtsi')
-rw-r--r-- | arch/arm/boot/dts/exynos5420-cpus.dtsi | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos5420-cpus.dtsi b/arch/arm/boot/dts/exynos5420-cpus.dtsi index 7aaf0313274f..261d25173f61 100644 --- a/arch/arm/boot/dts/exynos5420-cpus.dtsi +++ b/arch/arm/boot/dts/exynos5420-cpus.dtsi @@ -29,8 +29,10 @@ device_type = "cpu"; compatible = "arm,cortex-a15"; reg = <0x0>; + clocks = <&clock CLK_ARM_CLK>; clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; + operating-points-v2 = <&cluster_a15_opp_table>; }; cpu1: cpu@1 { @@ -39,6 +41,7 @@ reg = <0x1>; clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; + operating-points-v2 = <&cluster_a15_opp_table>; }; cpu2: cpu@2 { @@ -47,6 +50,7 @@ reg = <0x2>; clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; + operating-points-v2 = <&cluster_a15_opp_table>; }; cpu3: cpu@3 { @@ -55,14 +59,17 @@ reg = <0x3>; clock-frequency = <1800000000>; cci-control-port = <&cci_control1>; + operating-points-v2 = <&cluster_a15_opp_table>; }; cpu4: cpu@100 { device_type = "cpu"; compatible = "arm,cortex-a7"; reg = <0x100>; + clocks = <&clock CLK_KFC_CLK>; clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; + operating-points-v2 = <&cluster_a7_opp_table>; }; cpu5: cpu@101 { @@ -71,6 +78,7 @@ reg = <0x101>; clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; + operating-points-v2 = <&cluster_a7_opp_table>; }; cpu6: cpu@102 { @@ -79,6 +87,7 @@ reg = <0x102>; clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; + operating-points-v2 = <&cluster_a7_opp_table>; }; cpu7: cpu@103 { @@ -87,6 +96,7 @@ reg = <0x103>; clock-frequency = <1000000000>; cci-control-port = <&cci_control0>; + operating-points-v2 = <&cluster_a7_opp_table>; }; }; }; |