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Diffstat (limited to 'arch/arm/boot/dts/exynos5800-peach-pi.dts')
-rw-r--r--arch/arm/boot/dts/exynos5800-peach-pi.dts9
1 files changed, 9 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/exynos5800-peach-pi.dts b/arch/arm/boot/dts/exynos5800-peach-pi.dts
index c1e38139ce4f..60ab0effe474 100644
--- a/arch/arm/boot/dts/exynos5800-peach-pi.dts
+++ b/arch/arm/boot/dts/exynos5800-peach-pi.dts
@@ -156,6 +156,15 @@
assigned-clock-parents = <&clock CLK_MAU_EPLL>;
};
+/*
+ * Peach Pi board uses SoC revision with lower maximum frequency for A7 cores
+ * (1.3 GHz instead of 1.4 GHz) than Odroid XU3/XU4 boards. Thus we need to
+ * update A7 OPPs table accordingly.
+ */
+&cluster_a7_opp_table {
+ /delete-node/opp-1400000000;
+};
+
&cpu0 {
cpu-supply = <&buck2_reg>;
};