diff options
Diffstat (limited to 'arch/arm/boot/dts/ls1021a.dtsi')
-rw-r--r-- | arch/arm/boot/dts/ls1021a.dtsi | 987 |
1 files changed, 0 insertions, 987 deletions
diff --git a/arch/arm/boot/dts/ls1021a.dtsi b/arch/arm/boot/dts/ls1021a.dtsi deleted file mode 100644 index 2f6977ada447..000000000000 --- a/arch/arm/boot/dts/ls1021a.dtsi +++ /dev/null @@ -1,987 +0,0 @@ -/* - * Copyright 2013-2014 Freescale Semiconductor, Inc. - * - * This file is dual-licensed: you can use it either under the terms - * of the GPL or the X11 license, at your option. Note that this dual - * licensing only applies to this file, and not this project as a - * whole. - * - * a) This file is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This file is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public - * License along with this file; if not, write to the Free - * Software Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, - * MA 02110-1301 USA - * - * Or, alternatively, - * - * b) Permission is hereby granted, free of charge, to any person - * obtaining a copy of this software and associated documentation - * files (the "Software"), to deal in the Software without - * restriction, including without limitation the rights to use, - * copy, modify, merge, publish, distribute, sublicense, and/or - * sell copies of the Software, and to permit persons to whom the - * Software is furnished to do so, subject to the following - * conditions: - * - * The above copyright notice and this permission notice shall be - * included in all copies or substantial portions of the Software. - * - * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, - * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES - * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND - * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT - * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, - * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING - * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR - * OTHER DEALINGS IN THE SOFTWARE. - */ - -#include <dt-bindings/interrupt-controller/arm-gic.h> -#include <dt-bindings/thermal/thermal.h> - -/ { - #address-cells = <2>; - #size-cells = <2>; - compatible = "fsl,ls1021a"; - interrupt-parent = <&gic>; - - aliases { - crypto = &crypto; - ethernet0 = &enet0; - ethernet1 = &enet1; - ethernet2 = &enet2; - serial0 = &lpuart0; - serial1 = &lpuart1; - serial2 = &lpuart2; - serial3 = &lpuart3; - serial4 = &lpuart4; - serial5 = &lpuart5; - sysclk = &sysclk; - }; - - cpus { - #address-cells = <1>; - #size-cells = <0>; - - cpu0: cpu@f00 { - compatible = "arm,cortex-a7"; - device_type = "cpu"; - reg = <0xf00>; - clocks = <&clockgen 1 0>; - #cooling-cells = <2>; - }; - - cpu1: cpu@f01 { - compatible = "arm,cortex-a7"; - device_type = "cpu"; - reg = <0xf01>; - clocks = <&clockgen 1 0>; - #cooling-cells = <2>; - }; - }; - - memory { - device_type = "memory"; - reg = <0x0 0x0 0x0 0x0>; - }; - - sysclk: sysclk { - compatible = "fixed-clock"; - #clock-cells = <0>; - clock-frequency = <100000000>; - clock-output-names = "sysclk"; - }; - - timer { - compatible = "arm,armv7-timer"; - interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>, - <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>; - }; - - pmu { - compatible = "arm,cortex-a7-pmu"; - interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>; - interrupt-affinity = <&cpu0>, <&cpu1>; - }; - - reboot { - compatible = "syscon-reboot"; - regmap = <&dcfg>; - offset = <0xb0>; - mask = <0x02>; - }; - - soc { - compatible = "simple-bus"; - #address-cells = <2>; - #size-cells = <2>; - device_type = "soc"; - interrupt-parent = <&gic>; - ranges; - - ddr: memory-controller@1080000 { - compatible = "fsl,qoriq-memory-controller"; - reg = <0x0 0x1080000 0x0 0x1000>; - interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>; - big-endian; - }; - - gic: interrupt-controller@1400000 { - compatible = "arm,gic-400", "arm,cortex-a7-gic"; - #interrupt-cells = <3>; - interrupt-controller; - reg = <0x0 0x1401000 0x0 0x1000>, - <0x0 0x1402000 0x0 0x2000>, - <0x0 0x1404000 0x0 0x2000>, - <0x0 0x1406000 0x0 0x2000>; - interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>; - - }; - - msi1: msi-controller@1570e00 { - compatible = "fsl,ls1021a-msi"; - reg = <0x0 0x1570e00 0x0 0x8>; - msi-controller; - interrupts = <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>; - }; - - msi2: msi-controller@1570e08 { - compatible = "fsl,ls1021a-msi"; - reg = <0x0 0x1570e08 0x0 0x8>; - msi-controller; - interrupts = <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>; - }; - - ifc: ifc@1530000 { - compatible = "fsl,ifc", "simple-bus"; - reg = <0x0 0x1530000 0x0 0x10000>; - interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; - }; - - dcfg: dcfg@1ee0000 { - compatible = "fsl,ls1021a-dcfg", "syscon"; - reg = <0x0 0x1ee0000 0x0 0x10000>; - big-endian; - }; - - qspi: spi@1550000 { - compatible = "fsl,ls1021a-qspi"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x0 0x1550000 0x0 0x10000>, - <0x0 0x40000000 0x0 0x40000000>; - reg-names = "QuadSPI", "QuadSPI-memory"; - interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>; - clock-names = "qspi_en", "qspi"; - clocks = <&clockgen 4 1>, <&clockgen 4 1>; - status = "disabled"; - }; - - esdhc: esdhc@1560000 { - compatible = "fsl,ls1021a-esdhc", "fsl,esdhc"; - reg = <0x0 0x1560000 0x0 0x10000>; - interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; - clock-frequency = <0>; - voltage-ranges = <1800 1800 3300 3300>; - sdhci,auto-cmd12; - big-endian; - bus-width = <4>; - status = "disabled"; - }; - - sata: sata@3200000 { - compatible = "fsl,ls1021a-ahci"; - reg = <0x0 0x3200000 0x0 0x10000>, - <0x0 0x20220520 0x0 0x4>; - reg-names = "ahci", "sata-ecc"; - interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 1>; - dma-coherent; - status = "disabled"; - }; - - scfg: scfg@1570000 { - compatible = "fsl,ls1021a-scfg", "syscon"; - reg = <0x0 0x1570000 0x0 0x10000>; - big-endian; - }; - - crypto: crypto@1700000 { - compatible = "fsl,sec-v5.0", "fsl,sec-v4.0"; - fsl,sec-era = <7>; - #address-cells = <1>; - #size-cells = <1>; - reg = <0x0 0x1700000 0x0 0x100000>; - ranges = <0x0 0x0 0x1700000 0x100000>; - interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>; - - sec_jr0: jr@10000 { - compatible = "fsl,sec-v5.0-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x10000 0x10000>; - interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>; - }; - - sec_jr1: jr@20000 { - compatible = "fsl,sec-v5.0-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x20000 0x10000>; - interrupts = <GIC_SPI 104 IRQ_TYPE_LEVEL_HIGH>; - }; - - sec_jr2: jr@30000 { - compatible = "fsl,sec-v5.0-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x30000 0x10000>; - interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>; - }; - - sec_jr3: jr@40000 { - compatible = "fsl,sec-v5.0-job-ring", - "fsl,sec-v4.0-job-ring"; - reg = <0x40000 0x10000>; - interrupts = <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>; - }; - - }; - - clockgen: clocking@1ee1000 { - compatible = "fsl,ls1021a-clockgen"; - reg = <0x0 0x1ee1000 0x0 0x1000>; - #clock-cells = <2>; - clocks = <&sysclk>; - }; - - tmu: tmu@1f00000 { - compatible = "fsl,qoriq-tmu"; - reg = <0x0 0x1f00000 0x0 0x10000>; - interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; - fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x30061>; - fsl,tmu-calibration = <0x00000000 0x0000000f - 0x00000001 0x00000017 - 0x00000002 0x0000001e - 0x00000003 0x00000026 - 0x00000004 0x0000002e - 0x00000005 0x00000035 - 0x00000006 0x0000003d - 0x00000007 0x00000044 - 0x00000008 0x0000004c - 0x00000009 0x00000053 - 0x0000000a 0x0000005b - 0x0000000b 0x00000064 - - 0x00010000 0x00000011 - 0x00010001 0x0000001c - 0x00010002 0x00000024 - 0x00010003 0x0000002b - 0x00010004 0x00000034 - 0x00010005 0x00000039 - 0x00010006 0x00000042 - 0x00010007 0x0000004c - 0x00010008 0x00000051 - 0x00010009 0x0000005a - 0x0001000a 0x00000063 - - 0x00020000 0x00000013 - 0x00020001 0x00000019 - 0x00020002 0x00000024 - 0x00020003 0x0000002c - 0x00020004 0x00000035 - 0x00020005 0x0000003d - 0x00020006 0x00000046 - 0x00020007 0x00000050 - 0x00020008 0x00000059 - - 0x00030000 0x00000002 - 0x00030001 0x0000000d - 0x00030002 0x00000019 - 0x00030003 0x00000024>; - #thermal-sensor-cells = <1>; - }; - - thermal-zones { - cpu_thermal: cpu-thermal { - polling-delay-passive = <1000>; - polling-delay = <5000>; - - thermal-sensors = <&tmu 0>; - - trips { - cpu_alert: cpu-alert { - temperature = <85000>; - hysteresis = <2000>; - type = "passive"; - }; - cpu_crit: cpu-crit { - temperature = <95000>; - hysteresis = <2000>; - type = "critical"; - }; - }; - - cooling-maps { - map0 { - trip = <&cpu_alert>; - cooling-device = - <&cpu0 THERMAL_NO_LIMIT - THERMAL_NO_LIMIT>, - <&cpu1 THERMAL_NO_LIMIT - THERMAL_NO_LIMIT>; - }; - }; - }; - }; - - dspi0: spi@2100000 { - compatible = "fsl,ls1021a-v1.0-dspi"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x0 0x2100000 0x0 0x10000>; - interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; - clock-names = "dspi"; - clocks = <&clockgen 4 1>; - spi-num-chipselects = <6>; - big-endian; - status = "disabled"; - }; - - dspi1: spi@2110000 { - compatible = "fsl,ls1021a-v1.0-dspi"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x0 0x2110000 0x0 0x10000>; - interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; - clock-names = "dspi"; - clocks = <&clockgen 4 1>; - spi-num-chipselects = <6>; - big-endian; - status = "disabled"; - }; - - i2c0: i2c@2180000 { - compatible = "fsl,vf610-i2c"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x0 0x2180000 0x0 0x10000>; - interrupts = <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>; - clock-names = "i2c"; - clocks = <&clockgen 4 1>; - dma-names = "tx", "rx"; - dmas = <&edma0 1 39>, <&edma0 1 38>; - status = "disabled"; - }; - - i2c1: i2c@2190000 { - compatible = "fsl,vf610-i2c"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x0 0x2190000 0x0 0x10000>; - interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>; - clock-names = "i2c"; - clocks = <&clockgen 4 1>; - dma-names = "tx", "rx"; - dmas = <&edma0 1 37>, <&edma0 1 36>; - status = "disabled"; - }; - - i2c2: i2c@21a0000 { - compatible = "fsl,vf610-i2c"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x0 0x21a0000 0x0 0x10000>; - interrupts = <GIC_SPI 90 IRQ_TYPE_LEVEL_HIGH>; - clock-names = "i2c"; - clocks = <&clockgen 4 1>; - dma-names = "tx", "rx"; - dmas = <&edma0 1 35>, <&edma0 1 34>; - status = "disabled"; - }; - - uart0: serial@21c0500 { - compatible = "fsl,16550-FIFO64", "ns16550a"; - reg = <0x0 0x21c0500 0x0 0x100>; - interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; - clock-frequency = <0>; - fifo-size = <15>; - status = "disabled"; - }; - - uart1: serial@21c0600 { - compatible = "fsl,16550-FIFO64", "ns16550a"; - reg = <0x0 0x21c0600 0x0 0x100>; - interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; - clock-frequency = <0>; - fifo-size = <15>; - status = "disabled"; - }; - - uart2: serial@21d0500 { - compatible = "fsl,16550-FIFO64", "ns16550a"; - reg = <0x0 0x21d0500 0x0 0x100>; - interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; - clock-frequency = <0>; - fifo-size = <15>; - status = "disabled"; - }; - - uart3: serial@21d0600 { - compatible = "fsl,16550-FIFO64", "ns16550a"; - reg = <0x0 0x21d0600 0x0 0x100>; - interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; - clock-frequency = <0>; - fifo-size = <15>; - status = "disabled"; - }; - - counter0: counter@29d0000 { - compatible = "fsl,ftm-quaddec"; - reg = <0x0 0x29d0000 0x0 0x10000>; - big-endian; - status = "disabled"; - }; - - counter1: counter@29e0000 { - compatible = "fsl,ftm-quaddec"; - reg = <0x0 0x29e0000 0x0 0x10000>; - big-endian; - status = "disabled"; - }; - - counter2: counter@29f0000 { - compatible = "fsl,ftm-quaddec"; - reg = <0x0 0x29f0000 0x0 0x10000>; - big-endian; - status = "disabled"; - }; - - counter3: counter@2a00000 { - compatible = "fsl,ftm-quaddec"; - reg = <0x0 0x2a00000 0x0 0x10000>; - big-endian; - status = "disabled"; - }; - - gpio0: gpio@2300000 { - compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio"; - reg = <0x0 0x2300000 0x0 0x10000>; - interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio1: gpio@2310000 { - compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio"; - reg = <0x0 0x2310000 0x0 0x10000>; - interrupts = <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio2: gpio@2320000 { - compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio"; - reg = <0x0 0x2320000 0x0 0x10000>; - interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - gpio3: gpio@2330000 { - compatible = "fsl,ls1021a-gpio", "fsl,qoriq-gpio"; - reg = <0x0 0x2330000 0x0 0x10000>; - interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; - gpio-controller; - #gpio-cells = <2>; - interrupt-controller; - #interrupt-cells = <2>; - }; - - lpuart0: serial@2950000 { - compatible = "fsl,ls1021a-lpuart"; - reg = <0x0 0x2950000 0x0 0x1000>; - interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&sysclk>; - clock-names = "ipg"; - status = "disabled"; - }; - - lpuart1: serial@2960000 { - compatible = "fsl,ls1021a-lpuart"; - reg = <0x0 0x2960000 0x0 0x1000>; - interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 1>; - clock-names = "ipg"; - status = "disabled"; - }; - - lpuart2: serial@2970000 { - compatible = "fsl,ls1021a-lpuart"; - reg = <0x0 0x2970000 0x0 0x1000>; - interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 1>; - clock-names = "ipg"; - status = "disabled"; - }; - - lpuart3: serial@2980000 { - compatible = "fsl,ls1021a-lpuart"; - reg = <0x0 0x2980000 0x0 0x1000>; - interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 1>; - clock-names = "ipg"; - status = "disabled"; - }; - - lpuart4: serial@2990000 { - compatible = "fsl,ls1021a-lpuart"; - reg = <0x0 0x2990000 0x0 0x1000>; - interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 1>; - clock-names = "ipg"; - status = "disabled"; - }; - - lpuart5: serial@29a0000 { - compatible = "fsl,ls1021a-lpuart"; - reg = <0x0 0x29a0000 0x0 0x1000>; - interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 1>; - clock-names = "ipg"; - status = "disabled"; - }; - - pwm0: pwm@29d0000 { - compatible = "fsl,vf610-ftm-pwm"; - #pwm-cells = <3>; - reg = <0x0 0x29d0000 0x0 0x10000>; - clock-names = "ftm_sys", "ftm_ext", - "ftm_fix", "ftm_cnt_clk_en"; - clocks = <&clockgen 4 1>, <&clockgen 4 1>, - <&clockgen 4 1>, <&clockgen 4 1>; - big-endian; - status = "disabled"; - }; - - pwm1: pwm@29e0000 { - compatible = "fsl,vf610-ftm-pwm"; - #pwm-cells = <3>; - reg = <0x0 0x29e0000 0x0 0x10000>; - clock-names = "ftm_sys", "ftm_ext", - "ftm_fix", "ftm_cnt_clk_en"; - clocks = <&clockgen 4 1>, <&clockgen 4 1>, - <&clockgen 4 1>, <&clockgen 4 1>; - big-endian; - status = "disabled"; - }; - - pwm2: pwm@29f0000 { - compatible = "fsl,vf610-ftm-pwm"; - #pwm-cells = <3>; - reg = <0x0 0x29f0000 0x0 0x10000>; - clock-names = "ftm_sys", "ftm_ext", - "ftm_fix", "ftm_cnt_clk_en"; - clocks = <&clockgen 4 1>, <&clockgen 4 1>, - <&clockgen 4 1>, <&clockgen 4 1>; - big-endian; - status = "disabled"; - }; - - pwm3: pwm@2a00000 { - compatible = "fsl,vf610-ftm-pwm"; - #pwm-cells = <3>; - reg = <0x0 0x2a00000 0x0 0x10000>; - clock-names = "ftm_sys", "ftm_ext", - "ftm_fix", "ftm_cnt_clk_en"; - clocks = <&clockgen 4 1>, <&clockgen 4 1>, - <&clockgen 4 1>, <&clockgen 4 1>; - big-endian; - status = "disabled"; - }; - - pwm4: pwm@2a10000 { - compatible = "fsl,vf610-ftm-pwm"; - #pwm-cells = <3>; - reg = <0x0 0x2a10000 0x0 0x10000>; - clock-names = "ftm_sys", "ftm_ext", - "ftm_fix", "ftm_cnt_clk_en"; - clocks = <&clockgen 4 1>, <&clockgen 4 1>, - <&clockgen 4 1>, <&clockgen 4 1>; - big-endian; - status = "disabled"; - }; - - pwm5: pwm@2a20000 { - compatible = "fsl,vf610-ftm-pwm"; - #pwm-cells = <3>; - reg = <0x0 0x2a20000 0x0 0x10000>; - clock-names = "ftm_sys", "ftm_ext", - "ftm_fix", "ftm_cnt_clk_en"; - clocks = <&clockgen 4 1>, <&clockgen 4 1>, - <&clockgen 4 1>, <&clockgen 4 1>; - big-endian; - status = "disabled"; - }; - - pwm6: pwm@2a30000 { - compatible = "fsl,vf610-ftm-pwm"; - #pwm-cells = <3>; - reg = <0x0 0x2a30000 0x0 0x10000>; - clock-names = "ftm_sys", "ftm_ext", - "ftm_fix", "ftm_cnt_clk_en"; - clocks = <&clockgen 4 1>, <&clockgen 4 1>, - <&clockgen 4 1>, <&clockgen 4 1>; - big-endian; - status = "disabled"; - }; - - pwm7: pwm@2a40000 { - compatible = "fsl,vf610-ftm-pwm"; - #pwm-cells = <3>; - reg = <0x0 0x2a40000 0x0 0x10000>; - clock-names = "ftm_sys", "ftm_ext", - "ftm_fix", "ftm_cnt_clk_en"; - clocks = <&clockgen 4 1>, <&clockgen 4 1>, - <&clockgen 4 1>, <&clockgen 4 1>; - big-endian; - status = "disabled"; - }; - - wdog0: watchdog@2ad0000 { - compatible = "fsl,imx21-wdt"; - reg = <0x0 0x2ad0000 0x0 0x10000>; - interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 1>; - clock-names = "wdog-en"; - big-endian; - }; - - sai1: sai@2b50000 { - #sound-dai-cells = <0>; - compatible = "fsl,vf610-sai"; - reg = <0x0 0x2b50000 0x0 0x10000>; - interrupts = <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 1>, <&clockgen 4 1>, - <&clockgen 4 1>, <&clockgen 4 1>; - clock-names = "bus", "mclk1", "mclk2", "mclk3"; - dma-names = "tx", "rx"; - dmas = <&edma0 1 47>, - <&edma0 1 46>; - status = "disabled"; - }; - - sai2: sai@2b60000 { - #sound-dai-cells = <0>; - compatible = "fsl,vf610-sai"; - reg = <0x0 0x2b60000 0x0 0x10000>; - interrupts = <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 1>, <&clockgen 4 1>, - <&clockgen 4 1>, <&clockgen 4 1>; - clock-names = "bus", "mclk1", "mclk2", "mclk3"; - dma-names = "tx", "rx"; - dmas = <&edma0 1 45>, - <&edma0 1 44>; - status = "disabled"; - }; - - edma0: edma@2c00000 { - #dma-cells = <2>; - compatible = "fsl,vf610-edma"; - reg = <0x0 0x2c00000 0x0 0x10000>, - <0x0 0x2c10000 0x0 0x10000>, - <0x0 0x2c20000 0x0 0x10000>; - interrupts = <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 135 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "edma-tx", "edma-err"; - dma-channels = <32>; - big-endian; - clock-names = "dmamux0", "dmamux1"; - clocks = <&clockgen 4 1>, - <&clockgen 4 1>; - }; - - dcu: dcu@2ce0000 { - compatible = "fsl,ls1021a-dcu"; - reg = <0x0 0x2ce0000 0x0 0x10000>; - interrupts = <GIC_SPI 172 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 0>, - <&clockgen 4 0>; - clock-names = "dcu", "pix"; - big-endian; - status = "disabled"; - }; - - mdio0: mdio@2d24000 { - compatible = "fsl,etsec2-mdio"; - device_type = "mdio"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x0 0x2d24000 0x0 0x4000>, - <0x0 0x2d10030 0x0 0x4>; - }; - - mdio1: mdio@2d64000 { - compatible = "fsl,etsec2-mdio"; - device_type = "mdio"; - #address-cells = <1>; - #size-cells = <0>; - reg = <0x0 0x2d64000 0x0 0x4000>, - <0x0 0x2d50030 0x0 0x4>; - }; - - ptp_clock@2d10e00 { - compatible = "fsl,etsec-ptp"; - reg = <0x0 0x2d10e00 0x0 0xb0>; - interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; - fsl,tclk-period = <5>; - fsl,tmr-prsc = <2>; - fsl,tmr-add = <0xaaaaaaab>; - fsl,tmr-fiper1 = <999999995>; - fsl,tmr-fiper2 = <99990>; - fsl,max-adj = <499999999>; - fsl,extts-fifo; - }; - - enet0: ethernet@2d10000 { - compatible = "fsl,etsec2"; - device_type = "network"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&gic>; - model = "eTSEC"; - fsl,magic-packet; - ranges; - dma-coherent; - - queue-group@2d10000 { - #address-cells = <2>; - #size-cells = <2>; - reg = <0x0 0x2d10000 0x0 0x1000>; - interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>; - }; - - queue-group@2d14000 { - #address-cells = <2>; - #size-cells = <2>; - reg = <0x0 0x2d14000 0x0 0x1000>; - interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>; - }; - }; - - enet1: ethernet@2d50000 { - compatible = "fsl,etsec2"; - device_type = "network"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&gic>; - model = "eTSEC"; - ranges; - dma-coherent; - - queue-group@2d50000 { - #address-cells = <2>; - #size-cells = <2>; - reg = <0x0 0x2d50000 0x0 0x1000>; - interrupts = <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>; - }; - - queue-group@2d54000 { - #address-cells = <2>; - #size-cells = <2>; - reg = <0x0 0x2d54000 0x0 0x1000>; - interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; - }; - }; - - enet2: ethernet@2d90000 { - compatible = "fsl,etsec2"; - device_type = "network"; - #address-cells = <2>; - #size-cells = <2>; - interrupt-parent = <&gic>; - model = "eTSEC"; - ranges; - dma-coherent; - - queue-group@2d90000 { - #address-cells = <2>; - #size-cells = <2>; - reg = <0x0 0x2d90000 0x0 0x1000>; - interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>; - }; - - queue-group@2d94000 { - #address-cells = <2>; - #size-cells = <2>; - reg = <0x0 0x2d94000 0x0 0x1000>; - interrupts = <GIC_SPI 160 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 162 IRQ_TYPE_LEVEL_HIGH>; - }; - }; - - usb2: usb@8600000 { - compatible = "fsl-usb2-dr-v2.5", "fsl-usb2-dr"; - reg = <0x0 0x8600000 0x0 0x1000>; - interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; - dr_mode = "host"; - phy_type = "ulpi"; - }; - - usb3: usb3@3100000 { - compatible = "snps,dwc3"; - reg = <0x0 0x3100000 0x0 0x10000>; - interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; - dr_mode = "host"; - snps,quirk-frame-length-adjustment = <0x20>; - snps,dis_rxdet_inp3_quirk; - snps,incr-burst-type-adjustment = <1>, <4>, <8>, <16>; - }; - - pcie@3400000 { - compatible = "fsl,ls1021a-pcie"; - reg = <0x00 0x03400000 0x0 0x00010000 /* controller registers */ - 0x40 0x00000000 0x0 0x00002000>; /* configuration space */ - reg-names = "regs", "config"; - interrupts = <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>; /* controller interrupt */ - fsl,pcie-scfg = <&scfg 0>; - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - num-viewport = <6>; - bus-range = <0x0 0xff>; - ranges = <0x81000000 0x0 0x00000000 0x40 0x00010000 0x0 0x00010000 /* downstream I/O */ - 0x82000000 0x0 0x40000000 0x40 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ - msi-parent = <&msi1>, <&msi2>; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 7>; - interrupt-map = <0000 0 0 1 &gic GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>, - <0000 0 0 2 &gic GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>, - <0000 0 0 3 &gic GIC_SPI 190 IRQ_TYPE_LEVEL_HIGH>, - <0000 0 0 4 &gic GIC_SPI 192 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - }; - - pcie@3500000 { - compatible = "fsl,ls1021a-pcie"; - reg = <0x00 0x03500000 0x0 0x00010000 /* controller registers */ - 0x48 0x00000000 0x0 0x00002000>; /* configuration space */ - reg-names = "regs", "config"; - interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>; - fsl,pcie-scfg = <&scfg 1>; - #address-cells = <3>; - #size-cells = <2>; - device_type = "pci"; - num-viewport = <6>; - bus-range = <0x0 0xff>; - ranges = <0x81000000 0x0 0x00000000 0x48 0x00010000 0x0 0x00010000 /* downstream I/O */ - 0x82000000 0x0 0x40000000 0x48 0x40000000 0x0 0x40000000>; /* non-prefetchable memory */ - msi-parent = <&msi1>, <&msi2>; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 7>; - interrupt-map = <0000 0 0 1 &gic GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>, - <0000 0 0 2 &gic GIC_SPI 189 IRQ_TYPE_LEVEL_HIGH>, - <0000 0 0 3 &gic GIC_SPI 191 IRQ_TYPE_LEVEL_HIGH>, - <0000 0 0 4 &gic GIC_SPI 193 IRQ_TYPE_LEVEL_HIGH>; - status = "disabled"; - }; - - can0: can@2a70000 { - compatible = "fsl,ls1021ar2-flexcan"; - reg = <0x0 0x2a70000 0x0 0x1000>; - interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 1>, <&clockgen 4 1>; - clock-names = "ipg", "per"; - big-endian; - }; - - can1: can@2a80000 { - compatible = "fsl,ls1021ar2-flexcan"; - reg = <0x0 0x2a80000 0x0 0x1000>; - interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 1>, <&clockgen 4 1>; - clock-names = "ipg", "per"; - big-endian; - }; - - can2: can@2a90000 { - compatible = "fsl,ls1021ar2-flexcan"; - reg = <0x0 0x2a90000 0x0 0x1000>; - interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 1>, <&clockgen 4 1>; - clock-names = "ipg", "per"; - big-endian; - }; - - can3: can@2aa0000 { - compatible = "fsl,ls1021ar2-flexcan"; - reg = <0x0 0x2aa0000 0x0 0x1000>; - interrupts = <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clockgen 4 1>, <&clockgen 4 1>; - clock-names = "ipg", "per"; - big-endian; - }; - - ocram1: sram@10000000 { - compatible = "mmio-sram"; - reg = <0x0 0x10000000 0x0 0x10000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x0 0x10000000 0x10000>; - }; - - ocram2: sram@10010000 { - compatible = "mmio-sram"; - reg = <0x0 0x10010000 0x0 0x10000>; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0x0 0x0 0x10010000 0x10000>; - }; - - qdma: dma-controller@8390000 { - compatible = "fsl,ls1021a-qdma"; - reg = <0x0 0x8388000 0x0 0x1000>, /* Controller regs */ - <0x0 0x8389000 0x0 0x1000>, /* Status regs */ - <0x0 0x838a000 0x0 0x2000>; /* Block regs */ - interrupts = <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>, - <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>; - interrupt-names = "qdma-error", - "qdma-queue0", "qdma-queue1"; - dma-channels = <8>; - block-number = <1>; - block-offset = <0x1000>; - fsl,dma-queues = <2>; - status-sizes = <64>; - queue-sizes = <64 64>; - big-endian; - }; - - }; -}; |