diff options
Diffstat (limited to 'arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lcd.dtsi')
-rw-r--r-- | arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lcd.dtsi | 22 |
1 files changed, 8 insertions, 14 deletions
diff --git a/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lcd.dtsi b/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lcd.dtsi index 79f2354886b7..77594546ef37 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lcd.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6qdl-tx6-lcd.dtsi @@ -51,7 +51,6 @@ pinctrl-0 = <&pinctrl_lcd1_pwr>; enable-gpios = <&gpio2 31 GPIO_ACTIVE_HIGH>; power-supply = <®_3v3>; - turn-on-delay-ms = <35>; /* * a poor man's way to create a 1:1 relationship between * the PWM value and the actual duty cycle @@ -110,7 +109,7 @@ }; display-timings { - VGA { + timing-vga { clock-frequency = <25200000>; hactive = <640>; vactive = <480>; @@ -126,8 +125,7 @@ pixelclk-active = <0>; }; - ETV570 { - u-boot,panel-name = "edt,et057090dhu"; + timing-etv570 { clock-frequency = <25200000>; hactive = <640>; vactive = <480>; @@ -143,8 +141,7 @@ pixelclk-active = <0>; }; - ET0350 { - u-boot,panel-name = "edt,et0350g0dh6"; + timing-et0350 { clock-frequency = <6413760>; hactive = <320>; vactive = <240>; @@ -160,8 +157,7 @@ pixelclk-active = <0>; }; - ET0430 { - u-boot,panel-name = "edt,et0430g0dh6"; + timing-et0430 { clock-frequency = <9009000>; hactive = <480>; vactive = <272>; @@ -177,7 +173,7 @@ pixelclk-active = <1>; }; - ET0500 { + timing-et0500 { clock-frequency = <33264000>; hactive = <800>; vactive = <480>; @@ -193,8 +189,7 @@ pixelclk-active = <0>; }; - ET0700 { /* same as ET0500 */ - u-boot,panel-name = "edt,etm0700g0dh6"; + timing-et0700 { /* same as ET0500 */ clock-frequency = <33264000>; hactive = <800>; vactive = <480>; @@ -210,7 +205,7 @@ pixelclk-active = <0>; }; - ETQ570 { + timing-etq570 { clock-frequency = <6596040>; hactive = <320>; vactive = <240>; @@ -226,8 +221,7 @@ pixelclk-active = <0>; }; - CoMTFT { /* same as ET0700 but with inverted pixel clock */ - u-boot,panel-name = "edt,etm0700g0edh6"; + timing-comtft { /* same as ET0700 but with inverted pixel clock */ clock-frequency = <33264000>; hactive = <800>; vactive = <480>; |