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Diffstat (limited to 'arch/arm/boot/dts/qcom-msm8974.dtsi')
-rw-r--r--arch/arm/boot/dts/qcom-msm8974.dtsi174
1 files changed, 116 insertions, 58 deletions
diff --git a/arch/arm/boot/dts/qcom-msm8974.dtsi b/arch/arm/boot/dts/qcom-msm8974.dtsi
index 7a9be0acf3f5..8d216a3c0851 100644
--- a/arch/arm/boot/dts/qcom-msm8974.dtsi
+++ b/arch/arm/boot/dts/qcom-msm8974.dtsi
@@ -653,7 +653,7 @@
#size-cells = <0>;
};
- otg: usb@f9a55000 {
+ usb: usb@f9a55000 {
compatible = "qcom,ci-hdrc";
reg = <0xf9a55000 0x200>,
<0xf9a55200 0x200>;
@@ -679,7 +679,7 @@
#phy-cells = <0>;
clocks = <&xo_board>, <&gcc GCC_USB2A_PHY_SLEEP_CLK>;
clock-names = "ref", "sleep";
- resets = <&gcc GCC_USB2A_PHY_BCR>, <&otg 0>;
+ resets = <&gcc GCC_USB2A_PHY_BCR>, <&usb 0>;
reset-names = "phy", "por";
status = "disabled";
};
@@ -690,7 +690,7 @@
#phy-cells = <0>;
clocks = <&xo_board>, <&gcc GCC_USB2B_PHY_SLEEP_CLK>;
clock-names = "ref", "sleep";
- resets = <&gcc GCC_USB2B_PHY_BCR>, <&otg 1>;
+ resets = <&gcc GCC_USB2B_PHY_BCR>, <&usb 1>;
reset-names = "phy", "por";
status = "disabled";
};
@@ -1056,7 +1056,7 @@
reg = <0xfc400000 0x4000>;
};
- rpm_msg_ram: memory@fc428000 {
+ rpm_msg_ram: sram@fc428000 {
compatible = "qcom,rpm-msg-ram";
reg = <0xfc428000 0x4000>;
};
@@ -1116,7 +1116,7 @@
};
tsens: thermal-sensor@fc4a9000 {
- compatible = "qcom,msm8974-tsens";
+ compatible = "qcom,msm8974-tsens", "qcom,tsens-v0_1";
reg = <0xfc4a9000 0x1000>, /* TM */
<0xfc4a8000 0x1000>; /* SROT */
nvmem-cells = <&tsens_calib>, <&tsens_backup>;
@@ -1194,7 +1194,7 @@
resets = <&gcc GCC_MSS_RESTART>;
reset-names = "mss_restart";
- qcom,halt-regs = <&tcsr_mutex_block 0x1180 0x1200 0x1280>;
+ qcom,halt-regs = <&tcsr_mutex 0x1180 0x1200 0x1280>;
qcom,smem-states = <&modem_smp2p_out 0>;
qcom,smem-state-names = "stop";
@@ -1233,13 +1233,14 @@
};
};
- tcsr_mutex_block: syscon@fd484000 {
- compatible = "syscon";
+ tcsr_mutex: hwlock@fd484000 {
+ compatible = "qcom,msm8974-tcsr-mutex", "qcom,tcsr-mutex", "syscon";
reg = <0xfd484000 0x2000>;
+ #hwlock-cells = <1>;
};
tcsr: syscon@fd4a0000 {
- compatible = "syscon";
+ compatible = "qcom,tcsr-msm8974", "syscon";
reg = <0xfd4a0000 0x10000>;
};
@@ -1253,61 +1254,62 @@
#interrupt-cells = <2>;
interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
- sdc1_off: sdc1-off {
- clk {
+ sdc1_off: sdc1-off-state {
+ clk-pins {
pins = "sdc1_clk";
bias-disable;
drive-strength = <2>;
};
- cmd {
+ cmd-pins {
pins = "sdc1_cmd";
bias-pull-up;
drive-strength = <2>;
};
- data {
+ data-pins {
pins = "sdc1_data";
bias-pull-up;
drive-strength = <2>;
};
};
- sdc2_off: sdc2-off {
- clk {
+ sdc2_off: sdc2-off-state {
+ clk-pins {
pins = "sdc2_clk";
bias-disable;
drive-strength = <2>;
};
- cmd {
+ cmd-pins {
pins = "sdc2_cmd";
bias-pull-up;
drive-strength = <2>;
};
- data {
+ data-pins {
pins = "sdc2_data";
bias-pull-up;
drive-strength = <2>;
};
- cd {
+ cd-pins {
pins = "gpio54";
+ function = "gpio";
bias-disable;
drive-strength = <2>;
};
};
- blsp1_uart2_default: blsp1-uart2-default {
- rx {
+ blsp1_uart2_default: blsp1-uart2-default-state {
+ rx-pins {
pins = "gpio5";
function = "blsp_uart2";
drive-strength = <2>;
bias-pull-up;
};
- tx {
+ tx-pins {
pins = "gpio4";
function = "blsp_uart2";
drive-strength = <4>;
@@ -1315,15 +1317,15 @@
};
};
- blsp2_uart1_default: blsp2-uart1-default {
- tx-rts {
+ blsp2_uart1_default: blsp2-uart1-default-state {
+ tx-rts-pins {
pins = "gpio41", "gpio44";
function = "blsp_uart7";
drive-strength = <2>;
bias-disable;
};
- rx-cts {
+ rx-cts-pins {
pins = "gpio42", "gpio43";
function = "blsp_uart7";
drive-strength = <2>;
@@ -1331,22 +1333,22 @@
};
};
- blsp2_uart1_sleep: blsp2-uart1-sleep {
+ blsp2_uart1_sleep: blsp2-uart1-sleep-state {
pins = "gpio41", "gpio42", "gpio43", "gpio44";
function = "gpio";
drive-strength = <2>;
bias-pull-down;
};
- blsp2_uart4_default: blsp2-uart4-default {
- tx-rts {
+ blsp2_uart4_default: blsp2-uart4-default-state {
+ tx-rts-pins {
pins = "gpio53", "gpio56";
function = "blsp_uart10";
drive-strength = <2>;
bias-disable;
};
- rx-cts {
+ rx-cts-pins {
pins = "gpio54", "gpio55";
function = "blsp_uart10";
drive-strength = <2>;
@@ -1354,42 +1356,42 @@
};
};
- blsp1_i2c1_default: blsp1-i2c1-default {
+ blsp1_i2c1_default: blsp1-i2c1-default-state {
pins = "gpio2", "gpio3";
function = "blsp_i2c1";
drive-strength = <2>;
bias-disable;
};
- blsp1_i2c1_sleep: blsp1-i2c1-sleep {
+ blsp1_i2c1_sleep: blsp1-i2c1-sleep-state {
pins = "gpio2", "gpio3";
function = "blsp_i2c1";
drive-strength = <2>;
bias-pull-up;
};
- blsp1_i2c2_default: blsp1-i2c2-default {
+ blsp1_i2c2_default: blsp1-i2c2-default-state {
pins = "gpio6", "gpio7";
function = "blsp_i2c2";
drive-strength = <2>;
bias-disable;
};
- blsp1_i2c2_sleep: blsp1-i2c2-sleep {
+ blsp1_i2c2_sleep: blsp1-i2c2-sleep-state {
pins = "gpio6", "gpio7";
function = "blsp_i2c2";
drive-strength = <2>;
bias-pull-up;
};
- blsp1_i2c3_default: blsp1-i2c3-default {
+ blsp1_i2c3_default: blsp1-i2c3-default-state {
pins = "gpio10", "gpio11";
function = "blsp_i2c3";
drive-strength = <2>;
bias-disable;
};
- blsp1_i2c3_sleep: blsp1-i2c3-sleep {
+ blsp1_i2c3_sleep: blsp1-i2c3-sleep-state {
pins = "gpio10", "gpio11";
function = "blsp_i2c3";
drive-strength = <2>;
@@ -1400,14 +1402,14 @@
/* BLSP1_I2C5 info is missing */
- blsp1_i2c6_default: blsp1-i2c6-default {
+ blsp1_i2c6_default: blsp1-i2c6-default-state {
pins = "gpio29", "gpio30";
function = "blsp_i2c6";
drive-strength = <2>;
bias-disable;
};
- blsp1_i2c6_sleep: blsp1-i2c6-sleep {
+ blsp1_i2c6_sleep: blsp1-i2c6-sleep-state {
pins = "gpio29", "gpio30";
function = "blsp_i2c6";
drive-strength = <2>;
@@ -1417,14 +1419,14 @@
/* BLSP2_I2C1 info is missing */
- blsp2_i2c2_default: blsp2-i2c2-default {
+ blsp2_i2c2_default: blsp2-i2c2-default-state {
pins = "gpio47", "gpio48";
function = "blsp_i2c8";
drive-strength = <2>;
bias-disable;
};
- blsp2_i2c2_sleep: blsp2-i2c2-sleep {
+ blsp2_i2c2_sleep: blsp2-i2c2-sleep-state {
pins = "gpio47", "gpio48";
function = "blsp_i2c8";
drive-strength = <2>;
@@ -1435,48 +1437,80 @@
/* BLSP2_I2C4 info is missing */
- blsp2_i2c5_default: blsp2-i2c5-default {
+ blsp2_i2c5_default: blsp2-i2c5-default-state {
pins = "gpio83", "gpio84";
function = "blsp_i2c11";
drive-strength = <2>;
bias-disable;
};
- blsp2_i2c5_sleep: blsp2-i2c5-sleep {
+ blsp2_i2c5_sleep: blsp2-i2c5-sleep-state {
pins = "gpio83", "gpio84";
function = "blsp_i2c11";
drive-strength = <2>;
bias-pull-up;
};
- blsp2_i2c6_default: blsp2-i2c6-default {
+ blsp2_i2c6_default: blsp2-i2c6-default-state {
pins = "gpio87", "gpio88";
function = "blsp_i2c12";
drive-strength = <2>;
bias-disable;
};
- blsp2_i2c6_sleep: blsp2-i2c6-sleep {
+ blsp2_i2c6_sleep: blsp2-i2c6-sleep-state {
pins = "gpio87", "gpio88";
function = "blsp_i2c12";
drive-strength = <2>;
bias-pull-up;
};
- spi8_default: spi8_default {
- mosi {
+ cci_default: cci-default-state {
+ cci_i2c0_default: cci-i2c0-default-pins {
+ pins = "gpio19", "gpio20";
+ function = "cci_i2c0";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ cci_i2c1_default: cci-i2c1-default-pins {
+ pins = "gpio21", "gpio22";
+ function = "cci_i2c1";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
+
+ cci_sleep: cci-sleep-state {
+ cci_i2c0_sleep: cci-i2c0-sleep-pins {
+ pins = "gpio19", "gpio20";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ };
+
+ cci_i2c1_sleep: cci-i2c1-sleep-pins {
+ pins = "gpio21", "gpio22";
+ function = "gpio";
+ drive-strength = <2>;
+ bias-disable;
+ };
+ };
+
+ spi8_default: spi8_default-state {
+ mosi-pins {
pins = "gpio45";
function = "blsp_spi8";
};
- miso {
+ miso-pins {
pins = "gpio46";
function = "blsp_spi8";
};
- cs {
+ cs-pins {
pins = "gpio47";
function = "blsp_spi8";
};
- clk {
+ clk-pins {
pins = "gpio48";
function = "blsp_spi8";
};
@@ -1571,7 +1605,6 @@
"core_mmss";
phys = <&dsi0_phy>;
- phy-names = "dsi-phy";
status = "disabled";
@@ -1597,7 +1630,7 @@
};
};
- dsi0_phy: dsi-phy@fd922a00 {
+ dsi0_phy: phy@fd922a00 {
compatible = "qcom,dsi-phy-28nm-hpm";
reg = <0xfd922a00 0xd4>,
<0xfd922b00 0x280>,
@@ -1616,6 +1649,40 @@
};
};
+ cci: cci@fda0c000 {
+ compatible = "qcom,msm8974-cci";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ reg = <0xfda0c000 0x1000>;
+ interrupts = <GIC_SPI 50 IRQ_TYPE_EDGE_RISING>;
+ clocks = <&mmcc CAMSS_TOP_AHB_CLK>,
+ <&mmcc CAMSS_CCI_CCI_AHB_CLK>,
+ <&mmcc CAMSS_CCI_CCI_CLK>;
+ clock-names = "camss_top_ahb",
+ "cci_ahb",
+ "cci";
+
+ pinctrl-names = "default", "sleep";
+ pinctrl-0 = <&cci_default>;
+ pinctrl-1 = <&cci_sleep>;
+
+ status = "disabled";
+
+ cci_i2c0: i2c-bus@0 {
+ reg = <0>;
+ clock-frequency = <100000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
+ cci_i2c1: i2c-bus@1 {
+ reg = <1>;
+ clock-frequency = <100000>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+ };
+
gpu: adreno@fdb00000 {
compatible = "qcom,adreno-330.1", "qcom,adreno";
reg = <0xfdb00000 0x10000>;
@@ -1703,8 +1770,6 @@
qcom,ipc = <&apcs 8 8>;
qcom,smd-edge = <1>;
label = "lpass";
- #address-cells = <1>;
- #size-cells = <0>;
};
};
@@ -1719,13 +1784,6 @@
};
};
- tcsr_mutex: tcsr-mutex {
- compatible = "qcom,tcsr-mutex";
- syscon = <&tcsr_mutex_block 0 0x80>;
-
- #hwlock-cells = <1>;
- };
-
thermal-zones {
cpu0-thermal {
polling-delay-passive = <250>;
generated by cgit (git 2.34.1) at 2024-06-08 00:17:46 +0000