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Diffstat (limited to 'arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk07.1-c1.dts')
-rw-r--r--arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk07.1-c1.dts65
1 files changed, 65 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk07.1-c1.dts b/arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk07.1-c1.dts
new file mode 100644
index 000000000000..ea2987fcbff8
--- /dev/null
+++ b/arch/arm/boot/dts/qcom/qcom-ipq4019-ap.dk07.1-c1.dts
@@ -0,0 +1,65 @@
+// SPDX-License-Identifier: GPL-2.0
+// Copyright (c) 2018, The Linux Foundation. All rights reserved.
+
+#include <dt-bindings/gpio/gpio.h>
+#include "qcom-ipq4019-ap.dk07.1.dtsi"
+
+/ {
+ model = "Qualcomm Technologies, Inc. IPQ4019/AP-DK07.1-C1";
+ compatible = "qcom,ipq4019-ap-dk07.1-c1", "qcom,ipq4019";
+
+ soc {
+ pci@40000000 {
+ status = "okay";
+ perst-gpios = <&tlmm 38 GPIO_ACTIVE_LOW>;
+ };
+
+ spi@78b6000 {
+ status = "okay";
+ };
+
+ pinctrl@1000000 {
+ serial_1_pins: serial1-pinmux {
+ pins = "gpio8", "gpio9",
+ "gpio10", "gpio11";
+ function = "blsp_uart1";
+ bias-disable;
+ };
+
+ spi_0_pins: spi-0-pinmux {
+ pinmux {
+ function = "blsp_spi0";
+ pins = "gpio13", "gpio14", "gpio15";
+ bias-disable;
+ };
+ pinmux_cs {
+ function = "gpio";
+ pins = "gpio12";
+ bias-disable;
+ output-high;
+ };
+ };
+ };
+
+ serial@78b0000 {
+ pinctrl-0 = <&serial_1_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+ };
+
+ spi@78b5000 {
+ pinctrl-0 = <&spi_0_pins>;
+ pinctrl-names = "default";
+ status = "okay";
+ cs-gpios = <&tlmm 12 GPIO_ACTIVE_HIGH>;
+
+ flash@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ reg = <0>;
+ compatible = "micron,n25q128a11", "jedec,spi-nor";
+ spi-max-frequency = <24000000>;
+ };
+ };
+ };
+};