diff options
Diffstat (limited to 'arch/arm/boot/dts/st')
42 files changed, 652 insertions, 130 deletions
diff --git a/arch/arm/boot/dts/st/ste-dbx5x0.dtsi b/arch/arm/boot/dts/st/ste-dbx5x0.dtsi index d5d88771ef97..0f87abeddc33 100644 --- a/arch/arm/boot/dts/st/ste-dbx5x0.dtsi +++ b/arch/arm/boot/dts/st/ste-dbx5x0.dtsi @@ -425,7 +425,7 @@ gpio0: gpio@8012e000 { compatible = "stericsson,db8500-gpio", "st,nomadik-gpio"; - reg = <0x8012e000 0x80>; + reg = <0x8012e000 0x80>; interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller; #interrupt-cells = <2>; @@ -440,7 +440,7 @@ gpio1: gpio@8012e080 { compatible = "stericsson,db8500-gpio", "st,nomadik-gpio"; - reg = <0x8012e080 0x80>; + reg = <0x8012e080 0x80>; interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller; #interrupt-cells = <2>; @@ -455,7 +455,7 @@ gpio2: gpio@8000e000 { compatible = "stericsson,db8500-gpio", "st,nomadik-gpio"; - reg = <0x8000e000 0x80>; + reg = <0x8000e000 0x80>; interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller; #interrupt-cells = <2>; @@ -470,7 +470,7 @@ gpio3: gpio@8000e080 { compatible = "stericsson,db8500-gpio", "st,nomadik-gpio"; - reg = <0x8000e080 0x80>; + reg = <0x8000e080 0x80>; interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller; #interrupt-cells = <2>; @@ -485,7 +485,7 @@ gpio4: gpio@8000e100 { compatible = "stericsson,db8500-gpio", "st,nomadik-gpio"; - reg = <0x8000e100 0x80>; + reg = <0x8000e100 0x80>; interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller; #interrupt-cells = <2>; @@ -500,7 +500,7 @@ gpio5: gpio@8000e180 { compatible = "stericsson,db8500-gpio", "st,nomadik-gpio"; - reg = <0x8000e180 0x80>; + reg = <0x8000e180 0x80>; interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller; #interrupt-cells = <2>; @@ -515,7 +515,7 @@ gpio6: gpio@8011e000 { compatible = "stericsson,db8500-gpio", "st,nomadik-gpio"; - reg = <0x8011e000 0x80>; + reg = <0x8011e000 0x80>; interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller; #interrupt-cells = <2>; @@ -530,7 +530,7 @@ gpio7: gpio@8011e080 { compatible = "stericsson,db8500-gpio", "st,nomadik-gpio"; - reg = <0x8011e080 0x80>; + reg = <0x8011e080 0x80>; interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller; #interrupt-cells = <2>; @@ -545,7 +545,7 @@ gpio8: gpio@a03fe000 { compatible = "stericsson,db8500-gpio", "st,nomadik-gpio"; - reg = <0xa03fe000 0x80>; + reg = <0xa03fe000 0x80>; interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller; #interrupt-cells = <2>; diff --git a/arch/arm/boot/dts/st/ste-href-ab8500.dtsi b/arch/arm/boot/dts/st/ste-href-ab8500.dtsi index e1de9d389a01..5eeb44c5e932 100644 --- a/arch/arm/boot/dts/st/ste-href-ab8500.dtsi +++ b/arch/arm/boot/dts/st/ste-href-ab8500.dtsi @@ -9,6 +9,54 @@ soc { prcmu@80157000 { ab8500 { + phy { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&usb_a_1_default>; + pinctrl-1 = <&usb_a_1_sleep>; + }; + + regulator { + ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { + regulator-name = "V-DISPLAY"; + }; + + ab8500_ldo_aux2_reg: ab8500_ldo_aux2 { + regulator-name = "V-eMMC1"; + }; + + ab8500_ldo_aux3_reg: ab8500_ldo_aux3 { + regulator-name = "V-MMC-SD"; + }; + + ab8500_ldo_intcore_reg: ab8500_ldo_intcore { + regulator-name = "V-INTCORE"; + }; + + ab8500_ldo_tvout_reg: ab8500_ldo_tvout { + regulator-name = "V-TVOUT"; + }; + + ab8500_ldo_audio_reg: ab8500_ldo_audio { + regulator-name = "V-AUD"; + }; + + ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 { + regulator-name = "V-AMIC1"; + }; + + ab8500_ldo_anamic2_reg: ab8500_ldo_anamic2 { + regulator-name = "V-AMIC2"; + }; + + ab8500_ldo_dmic_reg: ab8500_ldo_dmic { + regulator-name = "V-DMIC"; + }; + + ab8500_ldo_ana_reg: ab8500_ldo_ana { + regulator-name = "V-CSI/DSI"; + }; + }; + gpio { /* Hog a few default settings */ pinctrl-names = "default"; diff --git a/arch/arm/boot/dts/st/ste-href-ab8505.dtsi b/arch/arm/boot/dts/st/ste-href-ab8505.dtsi new file mode 100644 index 000000000000..268db68ccf87 --- /dev/null +++ b/arch/arm/boot/dts/st/ste-href-ab8505.dtsi @@ -0,0 +1,490 @@ +// SPDX-License-Identifier: GPL-2.0-or-later +/* + * Copyright 2023 Linus Walleij <linus.walleij@linaro.org> + */ + +#include "ste-ab8505.dtsi" + +/ { + soc { + prcmu@80157000 { + ab8505 { + phy { + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&usb_a_1_default>; + pinctrl-1 = <&usb_a_1_sleep>; + }; + + regulator { + ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { + regulator-name = "V-DISPLAY"; + }; + + ab8500_ldo_aux2_reg: ab8500_ldo_aux2 { + regulator-name = "V-eMMC1"; + }; + + ab8500_ldo_aux3_reg: ab8500_ldo_aux3 { + regulator-name = "V-MMC-SD"; + }; + + ab8500_ldo_intcore_reg: ab8500_ldo_intcore { + regulator-name = "V-INTCORE"; + }; + + ab8500_ldo_tvout_reg: ab8500_ldo_tvout { + regulator-name = "V-TVOUT"; + }; + + ab8500_ldo_audio_reg: ab8500_ldo_audio { + regulator-name = "V-AUD"; + }; + + ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 { + regulator-name = "V-AMIC1"; + }; + + ab8500_ldo_anamic2_reg: ab8500_ldo_anamic2 { + regulator-name = "V-AMIC2"; + }; + + ab8500_ldo_dmic_reg: ab8500_ldo_dmic { + regulator-name = "V-DMIC"; + }; + + ab8500_ldo_ana_reg: ab8500_ldo_ana { + regulator-name = "V-CSI/DSI"; + }; + }; + + gpio { + /* Hog a few default settings */ + pinctrl-names = "default"; + pinctrl-0 = <&gpio2_default_mode>, + <&gpio4_default_mode>, + <&gpio10_default_mode>, + <&gpio11_default_mode>, + <&gpio12_default_mode>, + <&gpio13_default_mode>, + <&gpio16_default_mode>, + <&gpio24_default_mode>, + <&gpio25_default_mode>, + <&gpio36_default_mode>, + <&gpio37_default_mode>, + <&gpio38_default_mode>, + <&gpio39_default_mode>, + <&gpio42_default_mode>, + <&gpio26_default_mode>, + <&gpio35_default_mode>, + <&ycbcr_default_mode>, + <&pwm_default_mode>, + <&adi1_default_mode>, + <&usbuicc_default_mode>, + <&dmic_default_mode>, + <&extcpena_default_mode>, + <&modsclsda_default_mode>; + + /* + * Pins 2, 4, 10, 11, 12, 13, 16, 24, 25, 36, 37, 38, 39 and 42 + * are muxed in as GPIO, and configured as INPUT PULL DOWN + */ + gpio2 { + gpio2_default_mode: gpio2_default { + default_mux { + function = "gpio"; + groups = "gpio2_a_1"; + }; + default_cfg { + pins = "GPIO2_T9"; + input-enable; + bias-pull-down; + }; + }; + }; + gpio4 { + gpio4_default_mode: gpio4_default { + default_mux { + function = "gpio"; + groups = "gpio4_a_1"; + }; + default_cfg { + pins = "GPIO4_W2"; + input-enable; + bias-pull-down; + }; + }; + }; + gpio10 { + gpio10_default_mode: gpio10_default { + default_mux { + function = "gpio"; + groups = "gpio10_d_1"; + }; + default_cfg { + pins = "GPIO10_U17"; + input-enable; + bias-pull-down; + }; + }; + }; + gpio11 { + gpio11_default_mode: gpio11_default { + default_mux { + function = "gpio"; + groups = "gpio11_d_1"; + }; + default_cfg { + pins = "GPIO11_AA18"; + input-enable; + bias-pull-down; + }; + }; + }; + gpio12 { + gpio12_default_mode: gpio12_default { + default_mux { + function = "gpio"; + groups = "gpio12_d_1"; + }; + default_cfg { + pins = "GPIO12_U16"; + input-enable; + bias-pull-down; + }; + }; + }; + gpio13 { + gpio13_default_mode: gpio13_default { + default_mux { + function = "gpio"; + groups = "gpio13_d_1"; + }; + default_cfg { + pins = "GPIO13_W17"; + input-enable; + bias-pull-down; + }; + }; + }; + gpio16 { + gpio16_default_mode: gpio16_default { + default_mux { + function = "gpio"; + groups = "gpio16_a_1"; + }; + default_cfg { + pins = "GPIO16_F15"; + input-enable; + bias-pull-down; + }; + }; + }; + gpio24 { + gpio24_default_mode: gpio24_default { + default_mux { + function = "gpio"; + groups = "gpio24_a_1"; + }; + default_cfg { + pins = "GPIO24_T14"; + input-enable; + bias-pull-down; + }; + }; + }; + gpio25 { + gpio25_default_mode: gpio25_default { + default_mux { + function = "gpio"; + groups = "gpio25_a_1"; + }; + default_cfg { + pins = "GPIO25_R16"; + input-enable; + bias-pull-down; + }; + }; + }; + gpio36 { + gpio36_default_mode: gpio36_default { + default_mux { + function = "gpio"; + groups = "gpio36_a_1"; + }; + default_cfg { + pins = "GPIO36_A17"; + input-enable; + bias-pull-down; + }; + }; + }; + gpio37 { + gpio37_default_mode: gpio37_default { + default_mux { + function = "gpio"; + groups = "gpio37_a_1"; + }; + default_cfg { + pins = "GPIO37_E15"; + input-enable; + bias-pull-down; + }; + }; + }; + gpio38 { + gpio38_default_mode: gpio38_default { + default_mux { + function = "gpio"; + groups = "gpio38_a_1"; + }; + default_cfg { + pins = "GPIO38_C17"; + input-enable; + bias-pull-down; + }; + }; + }; + gpio39 { + gpio39_default_mode: gpio39_default { + default_mux { + function = "gpio"; + groups = "gpio39_a_1"; + }; + default_cfg { + pins = "GPIO39_E16"; + input-enable; + bias-pull-down; + }; + }; + }; + gpio42 { + gpio42_default_mode: gpio42_default { + default_mux { + function = "gpio"; + groups = "gpio42_a_1"; + }; + default_cfg { + pins = "GPIO42_U2"; + input-enable; + bias-pull-down; + }; + }; + }; + /* + * Pins 26 and 35 muxed in as GPIO, and configured as OUTPUT LOW + */ + gpio26 { + gpio26_default_mode: gpio26_default { + default_mux { + function = "gpio"; + groups = "gpio26_d_1"; + }; + default_cfg { + pins = "GPIO26_M16"; + output-low; + }; + }; + }; + gpio35 { + gpio35_default_mode: gpio35_default { + default_mux { + function = "gpio"; + groups = "gpio35_d_1"; + }; + default_cfg { + pins = "GPIO35_W15"; + output-low; + }; + }; + }; + /* + * This sets up the YCBCR connector pins, i.e. analog video out. + * Set as input with no bias. + */ + ycbcr { + ycbcr_default_mode: ycbcr_default { + default_mux { + function = "ycbcr"; + groups = "ycbcr0123_d_1"; + }; + default_cfg { + pins = "GPIO6_Y18", + "GPIO7_AA20", + "GPIO8_W18", + "GPIO9_AA19"; + input-enable; + bias-disable; + }; + }; + }; + /* This sets up the PWM pins 14 and 15 */ + pwm { + pwm_default_mode: pwm_default { + default_mux { + function = "pwmout"; + groups = "pwmout1_d_1", "pwmout2_d_1"; + }; + default_cfg { + pins = "GPIO14_F14", + "GPIO15_B17"; + input-enable; + bias-pull-down; + }; + }; + }; + /* This sets up audio interface 1 */ + adi1 { + adi1_default_mode: adi1_default { + default_mux { + function = "adi1"; + groups = "adi1_d_1"; + }; + default_cfg { + pins = "GPIO17_P5", + "GPIO18_R5", + "GPIO19_U5", + "GPIO20_T5"; + input-enable; + bias-pull-down; + }; + }; + }; + /* This sets up the USB UICC pins */ + usbuicc { + usbuicc_default_mode: usbuicc_default { + default_mux { + function = "usbuicc"; + groups = "usbuicc_d_1"; + }; + default_cfg { + pins = "GPIO21_H19", + "GPIO22_G20", + "GPIO23_G19"; + input-enable; + bias-pull-down; + }; + }; + }; + /* This sets up the microphone pins */ + dmic { + dmic_default_mode: dmic_default { + default_mux { + function = "dmic"; + groups = "dmic12_d_1", + "dmic34_d_1", + "dmic56_d_1"; + }; + default_cfg { + pins = "GPIO27_J6", + "GPIO28_K6", + "GPIO29_G6", + "GPIO30_H6", + "GPIO31_F5", + "GPIO32_G5"; + input-enable; + bias-pull-down; + }; + }; + }; + extcpena { + extcpena_default_mode: extcpena_default { + default_mux { + function = "extcpena"; + groups = "extcpena_d_1"; + }; + default_cfg { + pins = "GPIO34_R17"; + input-enable; + bias-pull-down; + }; + }; + }; + /* Modem I2C setup (SCL and SDA pins) */ + modsclsda { + modsclsda_default_mode: modsclsda_default { + default_mux { + function = "modsclsda"; + groups = "modsclsda_d_1"; + }; + default_cfg { + pins = "GPIO40_T19", + "GPIO41_U19"; + input-enable; + bias-pull-down; + }; + }; + }; + /* + * Clock output pins associated with regulators. + */ + sysclkreq2 { + sysclkreq2_default_mode: sysclkreq2_default { + default_mux { + function = "sysclkreq"; + groups = "sysclkreq2_d_1"; + }; + default_cfg { + pins = "GPIO1_T10"; + input-enable; + bias-disable; + }; + }; + sysclkreq2_sleep_mode: sysclkreq2_sleep { + default_mux { + function = "gpio"; + groups = "gpio1_a_1"; + }; + default_cfg { + pins = "GPIO1_T10"; + input-enable; + bias-pull-down; + }; + }; + }; + sysclkreq4 { + sysclkreq4_default_mode: sysclkreq4_default { + default_mux { + function = "sysclkreq"; + groups = "sysclkreq4_d_1"; + }; + default_cfg { + pins = "GPIO3_U9"; + input-enable; + bias-disable; + }; + }; + sysclkreq4_sleep_mode: sysclkreq4_sleep { + default_mux { + function = "gpio"; + groups = "gpio3_a_1"; + }; + default_cfg { + pins = "GPIO3_U9"; + input-enable; + bias-pull-down; + }; + }; + }; + }; + /* + * Charging is not working on the HREF unless an actual battery is + * mounted, most HREFs have a DC cable in to the "battery power" + * which means this will only be cofusing. So do not enable charging + * of the HREFs. + */ + ab8500_fg { + status = "disabled"; + }; + ab8500_btemp { + status = "disabled"; + }; + ab8500_charger { + status = "disabled"; + }; + ab8500_chargalg { + status = "disabled"; + }; + }; + }; + }; +}; diff --git a/arch/arm/boot/dts/st/ste-href.dtsi b/arch/arm/boot/dts/st/ste-href.dtsi index 13b11dbeba1c..fbf0309e108f 100644 --- a/arch/arm/boot/dts/st/ste-href.dtsi +++ b/arch/arm/boot/dts/st/ste-href.dtsi @@ -242,61 +242,6 @@ status = "okay"; }; - prcmu@80157000 { - ab8500 { - gpio { - }; - - phy { - pinctrl-names = "default", "sleep"; - pinctrl-0 = <&usb_a_1_default>; - pinctrl-1 = <&usb_a_1_sleep>; - }; - - regulator { - ab8500_ldo_aux1_reg: ab8500_ldo_aux1 { - regulator-name = "V-DISPLAY"; - }; - - ab8500_ldo_aux2_reg: ab8500_ldo_aux2 { - regulator-name = "V-eMMC1"; - }; - - ab8500_ldo_aux3_reg: ab8500_ldo_aux3 { - regulator-name = "V-MMC-SD"; - }; - - ab8500_ldo_intcore_reg: ab8500_ldo_intcore { - regulator-name = "V-INTCORE"; - }; - - ab8500_ldo_tvout_reg: ab8500_ldo_tvout { - regulator-name = "V-TVOUT"; - }; - - ab8500_ldo_audio_reg: ab8500_ldo_audio { - regulator-name = "V-AUD"; - }; - - ab8500_ldo_anamic1_reg: ab8500_ldo_anamic1 { - regulator-name = "V-AMIC1"; - }; - - ab8500_ldo_anamic2_reg: ab8500_ldo_anamic2 { - regulator-name = "V-AMIC2"; - }; - - ab8500_ldo_dmic_reg: ab8500_ldo_dmic { - regulator-name = "V-DMIC"; - }; - - ab8500_ldo_ana_reg: ab8500_ldo_ana { - regulator-name = "V-CSI/DSI"; - }; - }; - }; - }; - pinctrl { sdi0 { sdi0_default_mode: sdi0_default { diff --git a/arch/arm/boot/dts/st/ste-href520-tvk.dts b/arch/arm/boot/dts/st/ste-href520-tvk.dts index 7f661f8f13ad..5677df43c3ac 100644 --- a/arch/arm/boot/dts/st/ste-href520-tvk.dts +++ b/arch/arm/boot/dts/st/ste-href520-tvk.dts @@ -5,6 +5,7 @@ /dts-v1/; #include "ste-db8520.dtsi" +#include "ste-href-ab8505.dtsi" #include "ste-hrefv60plus.dtsi" #include "ste-href-tvk1281618-r3.dtsi" diff --git a/arch/arm/boot/dts/st/ste-hrefprev60-stuib.dts b/arch/arm/boot/dts/st/ste-hrefprev60-stuib.dts index a29e345a43d3..b142bb2d38d8 100644 --- a/arch/arm/boot/dts/st/ste-hrefprev60-stuib.dts +++ b/arch/arm/boot/dts/st/ste-hrefprev60-stuib.dts @@ -5,6 +5,7 @@ /dts-v1/; #include "ste-db8500.dtsi" +#include "ste-href-ab8500.dtsi" #include "ste-hrefprev60.dtsi" #include "ste-href-stuib.dtsi" diff --git a/arch/arm/boot/dts/st/ste-hrefprev60-tvk.dts b/arch/arm/boot/dts/st/ste-hrefprev60-tvk.dts index 1968bd143114..5da1ff41b00e 100644 --- a/arch/arm/boot/dts/st/ste-hrefprev60-tvk.dts +++ b/arch/arm/boot/dts/st/ste-hrefprev60-tvk.dts @@ -5,6 +5,7 @@ /dts-v1/; #include "ste-db8500.dtsi" +#include "ste-href-ab8500.dtsi" #include "ste-hrefprev60.dtsi" #include "ste-href-tvk1281618-r2.dtsi" diff --git a/arch/arm/boot/dts/st/ste-hrefprev60.dtsi b/arch/arm/boot/dts/st/ste-hrefprev60.dtsi index 9859ee91a15e..c87fd27b4434 100644 --- a/arch/arm/boot/dts/st/ste-hrefprev60.dtsi +++ b/arch/arm/boot/dts/st/ste-hrefprev60.dtsi @@ -62,7 +62,7 @@ // External Micro SD slot mmc@80126000 { - cd-gpios = <&tc3589x_gpio 3 GPIO_ACTIVE_HIGH>; + cd-gpios = <&tc3589x_gpio 3 GPIO_ACTIVE_HIGH>; }; pinctrl { diff --git a/arch/arm/boot/dts/st/ste-hrefv60plus-stuib.dts b/arch/arm/boot/dts/st/ste-hrefv60plus-stuib.dts index 7a5b6aa1db5b..c4abe24a7cd0 100644 --- a/arch/arm/boot/dts/st/ste-hrefv60plus-stuib.dts +++ b/arch/arm/boot/dts/st/ste-hrefv60plus-stuib.dts @@ -7,6 +7,7 @@ /dts-v1/; #include "ste-db8500.dtsi" +#include "ste-href-ab8500.dtsi" #include "ste-hrefv60plus.dtsi" #include "ste-href-stuib.dtsi" diff --git a/arch/arm/boot/dts/st/ste-hrefv60plus-tvk.dts b/arch/arm/boot/dts/st/ste-hrefv60plus-tvk.dts index d5af3f375161..f55e8de2b516 100644 --- a/arch/arm/boot/dts/st/ste-hrefv60plus-tvk.dts +++ b/arch/arm/boot/dts/st/ste-hrefv60plus-tvk.dts @@ -7,6 +7,7 @@ /dts-v1/; #include "ste-db8500.dtsi" +#include "ste-href-ab8500.dtsi" #include "ste-hrefv60plus.dtsi" #include "ste-href-tvk1281618-r2.dtsi" diff --git a/arch/arm/boot/dts/st/ste-hrefv60plus.dtsi b/arch/arm/boot/dts/st/ste-hrefv60plus.dtsi index e66fa59c2de6..b23966c16a32 100644 --- a/arch/arm/boot/dts/st/ste-hrefv60plus.dtsi +++ b/arch/arm/boot/dts/st/ste-hrefv60plus.dtsi @@ -3,7 +3,6 @@ * Copyright 2012 ST-Ericsson AB */ -#include "ste-href-ab8500.dtsi" #include "ste-href.dtsi" / { @@ -191,7 +190,7 @@ // External Micro SD slot mmc@80126000 { - cd-gpios = <&gpio2 31 GPIO_ACTIVE_HIGH>; // 95 + cd-gpios = <&gpio2 31 GPIO_ACTIVE_HIGH>; // 95 }; pinctrl { diff --git a/arch/arm/boot/dts/st/ste-nomadik-stn8815.dtsi b/arch/arm/boot/dts/st/ste-nomadik-stn8815.dtsi index 6816eef39d45..4d37c5fb553c 100644 --- a/arch/arm/boot/dts/st/ste-nomadik-stn8815.dtsi +++ b/arch/arm/boot/dts/st/ste-nomadik-stn8815.dtsi @@ -52,7 +52,7 @@ gpio0: gpio@101e4000 { compatible = "st,nomadik-gpio"; - reg = <0x101e4000 0x80>; + reg = <0x101e4000 0x80>; interrupt-parent = <&vica>; interrupts = <6>; interrupt-controller; @@ -66,7 +66,7 @@ gpio1: gpio@101e5000 { compatible = "st,nomadik-gpio"; - reg = <0x101e5000 0x80>; + reg = <0x101e5000 0x80>; interrupt-parent = <&vica>; interrupts = <7>; interrupt-controller; @@ -80,7 +80,7 @@ gpio2: gpio@101e6000 { compatible = "st,nomadik-gpio"; - reg = <0x101e6000 0x80>; + reg = <0x101e6000 0x80>; interrupt-parent = <&vica>; interrupts = <8>; interrupt-controller; @@ -94,7 +94,7 @@ gpio3: gpio@101e7000 { compatible = "st,nomadik-gpio"; - reg = <0x101e7000 0x80>; + reg = <0x101e7000 0x80>; ngpio = <28>; interrupt-parent = <&vica>; interrupts = <9>; diff --git a/arch/arm/boot/dts/st/ste-snowball.dts b/arch/arm/boot/dts/st/ste-snowball.dts index 27c2ec51e732..1322abfc7acf 100644 --- a/arch/arm/boot/dts/st/ste-snowball.dts +++ b/arch/arm/boot/dts/st/ste-snowball.dts @@ -266,7 +266,7 @@ pinctrl-1 = <&mc0_a_1_sleep>; /* GPIO218 MMC_CD */ - cd-gpios = <&gpio6 26 GPIO_ACTIVE_LOW>; + cd-gpios = <&gpio6 26 GPIO_ACTIVE_LOW>; status = "okay"; }; diff --git a/arch/arm/boot/dts/st/ste-ux500-samsung-codina-tmo.dts b/arch/arm/boot/dts/st/ste-ux500-samsung-codina-tmo.dts index 463942ae755e..c623cc35c5ea 100644 --- a/arch/arm/boot/dts/st/ste-ux500-samsung-codina-tmo.dts +++ b/arch/arm/boot/dts/st/ste-ux500-samsung-codina-tmo.dts @@ -310,7 +310,7 @@ pinctrl-names = "default", "sleep"; pinctrl-0 = <&mc0_a_2_default>; pinctrl-1 = <&mc0_a_2_sleep>; - cd-gpios = <&gpio6 25 GPIO_ACTIVE_LOW>; // GPIO217 + cd-gpios = <&gpio6 25 GPIO_ACTIVE_LOW>; // GPIO217 status = "okay"; }; diff --git a/arch/arm/boot/dts/st/ste-ux500-samsung-codina.dts b/arch/arm/boot/dts/st/ste-ux500-samsung-codina.dts index c1ae0e23fe45..2355ca6e9ad6 100644 --- a/arch/arm/boot/dts/st/ste-ux500-samsung-codina.dts +++ b/arch/arm/boot/dts/st/ste-ux500-samsung-codina.dts @@ -402,7 +402,7 @@ pinctrl-names = "default", "sleep"; pinctrl-0 = <&mc0_a_2_default>; pinctrl-1 = <&mc0_a_2_sleep>; - cd-gpios = <&gpio6 25 GPIO_ACTIVE_LOW>; // GPIO217 + cd-gpios = <&gpio6 25 GPIO_ACTIVE_LOW>; // GPIO217 status = "okay"; }; diff --git a/arch/arm/boot/dts/st/ste-ux500-samsung-gavini.dts b/arch/arm/boot/dts/st/ste-ux500-samsung-gavini.dts index b21e40da3dfd..ad9a20ccaaeb 100644 --- a/arch/arm/boot/dts/st/ste-ux500-samsung-gavini.dts +++ b/arch/arm/boot/dts/st/ste-ux500-samsung-gavini.dts @@ -362,7 +362,7 @@ pinctrl-0 = <&mc0_a_2_default>; pinctrl-1 = <&mc0_a_2_sleep>; /* "flash detect" actually card detect */ - cd-gpios = <&gpio6 25 GPIO_ACTIVE_LOW>; + cd-gpios = <&gpio6 25 GPIO_ACTIVE_LOW>; status = "okay"; }; diff --git a/arch/arm/boot/dts/st/ste-ux500-samsung-janice.dts b/arch/arm/boot/dts/st/ste-ux500-samsung-janice.dts index 6e586e875565..229f7c32103c 100644 --- a/arch/arm/boot/dts/st/ste-ux500-samsung-janice.dts +++ b/arch/arm/boot/dts/st/ste-ux500-samsung-janice.dts @@ -412,7 +412,7 @@ pinctrl-names = "default", "sleep"; pinctrl-0 = <&mc0_a_2_default>; pinctrl-1 = <&mc0_a_2_sleep>; - cd-gpios = <&gpio6 25 GPIO_ACTIVE_LOW>; // GPIO217 + cd-gpios = <&gpio6 25 GPIO_ACTIVE_LOW>; // GPIO217 status = "okay"; }; diff --git a/arch/arm/boot/dts/st/ste-ux500-samsung-kyle.dts b/arch/arm/boot/dts/st/ste-ux500-samsung-kyle.dts index ba4421080b2a..cdb147dcc1db 100644 --- a/arch/arm/boot/dts/st/ste-ux500-samsung-kyle.dts +++ b/arch/arm/boot/dts/st/ste-ux500-samsung-kyle.dts @@ -238,7 +238,7 @@ pinctrl-names = "default", "sleep"; pinctrl-0 = <&mc0_a_1_default>; pinctrl-1 = <&mc0_a_1_sleep>; - cd-gpios = <&gpio6 25 GPIO_ACTIVE_LOW>; // GPIO217 + cd-gpios = <&gpio6 25 GPIO_ACTIVE_LOW>; // GPIO217 status = "okay"; }; diff --git a/arch/arm/boot/dts/st/stm32429i-eval.dts b/arch/arm/boot/dts/st/stm32429i-eval.dts index 576235ec3c51..afa417b34b25 100644 --- a/arch/arm/boot/dts/st/stm32429i-eval.dts +++ b/arch/arm/boot/dts/st/stm32429i-eval.dts @@ -222,7 +222,6 @@ reg = <0x42>; interrupts = <8 3>; interrupt-parent = <&gpioi>; - interrupt-controller; wakeup-source; stmpegpio: stmpe_gpio { diff --git a/arch/arm/boot/dts/st/stm32f469-disco.dts b/arch/arm/boot/dts/st/stm32f469-disco.dts index cbbd521bf010..8a4f8ddd083d 100644 --- a/arch/arm/boot/dts/st/stm32f469-disco.dts +++ b/arch/arm/boot/dts/st/stm32f469-disco.dts @@ -69,16 +69,9 @@ serial0 = &usart3; }; - mmc_vcard: mmc_vcard { + vcc_3v3: vcc-3v3 { compatible = "regulator-fixed"; - regulator-name = "mmc_vcard"; - regulator-min-microvolt = <3300000>; - regulator-max-microvolt = <3300000>; - }; - - vdd_dsi: vdd-dsi { - compatible = "regulator-fixed"; - regulator-name = "vdd_dsi"; + regulator-name = "vcc_3v3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; }; @@ -164,7 +157,7 @@ compatible = "orisetech,otm8009a"; reg = <0>; /* dsi virtual channel (0..3) */ reset-gpios = <&gpioh 7 GPIO_ACTIVE_LOW>; - power-supply = <&vdd_dsi>; + power-supply = <&vcc_3v3>; status = "okay"; port { @@ -219,7 +212,7 @@ &sdio { status = "okay"; - vmmc-supply = <&mmc_vcard>; + vmmc-supply = <&vcc_3v3>; cd-gpios = <&gpiog 2 GPIO_ACTIVE_LOW>; broken-cd; pinctrl-names = "default", "opendrain"; diff --git a/arch/arm/boot/dts/st/stm32f746.dtsi b/arch/arm/boot/dts/st/stm32f746.dtsi index 53a8e2dec9a4..65c72b6fcc83 100644 --- a/arch/arm/boot/dts/st/stm32f746.dtsi +++ b/arch/arm/boot/dts/st/stm32f746.dtsi @@ -274,6 +274,26 @@ clocks = <&rcc 0 STM32F7_APB1_CLOCK(CAN3)>; }; + spi2: spi@40003800 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32f7-spi"; + reg = <0x40003800 0x400>; + interrupts = <36>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(SPI2)>; + status = "disabled"; + }; + + spi3: spi@40003c00 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32f7-spi"; + reg = <0x40003c00 0x400>; + interrupts = <51>; + clocks = <&rcc 0 STM32F7_APB1_CLOCK(SPI3)>; + status = "disabled"; + }; + usart2: serial@40004400 { compatible = "st,stm32f7-uart"; reg = <0x40004400 0x400>; @@ -491,9 +511,30 @@ status = "disabled"; }; + spi1: spi@40013000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32f7-spi"; + reg = <0x40013000 0x400>; + interrupts = <35>; + clocks = <&rcc 0 STM32F7_APB2_CLOCK(SPI1)>; + status = "disabled"; + }; + + spi4: spi@40013400 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32f7-spi"; + reg = <0x40013400 0x400>; + interrupts = <84>; + clocks = <&rcc 0 STM32F7_APB2_CLOCK(SPI4)>; + status = "disabled"; + }; + syscfg: syscon@40013800 { compatible = "st,stm32-syscfg", "syscon"; reg = <0x40013800 0x400>; + clocks = <&rcc 0 STM32F7_APB2_CLOCK(SYSCFG)>; }; exti: interrupt-controller@40013c00 { @@ -554,6 +595,26 @@ }; }; + spi5: spi@40015000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32f7-spi"; + reg = <0x40015000 0x400>; + interrupts = <85>; + clocks = <&rcc 0 STM32F7_APB2_CLOCK(SPI5)>; + status = "disabled"; + }; + + spi6: spi@40015400 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "st,stm32f7-spi"; + reg = <0x40015400 0x400>; + interrupts = <86>; + clocks = <&rcc 0 STM32F7_APB2_CLOCK(SPI6)>; + status = "disabled"; + }; + ltdc: display-controller@40016800 { compatible = "st,stm32-ltdc"; reg = <0x40016800 0x200>; diff --git a/arch/arm/boot/dts/st/stm32mp135.dtsi b/arch/arm/boot/dts/st/stm32mp135.dtsi index abf2acd37b4e..68d32f9f5314 100644 --- a/arch/arm/boot/dts/st/stm32mp135.dtsi +++ b/arch/arm/boot/dts/st/stm32mp135.dtsi @@ -8,5 +8,16 @@ / { soc { + dcmipp: dcmipp@5a000000 { + compatible = "st,stm32mp13-dcmipp"; + reg = <0x5a000000 0x400>; + interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>; + resets = <&rcc DCMIPP_R>; + clocks = <&rcc DCMIPP_K>; + status = "disabled"; + + port { + }; + }; }; }; diff --git a/arch/arm/boot/dts/st/stm32mp151.dtsi b/arch/arm/boot/dts/st/stm32mp151.dtsi index 61508917521c..fa4cbd312e5a 100644 --- a/arch/arm/boot/dts/st/stm32mp151.dtsi +++ b/arch/arm/boot/dts/st/stm32mp151.dtsi @@ -1521,6 +1521,8 @@ clocks = <&usbphyc>, <&rcc USBH>; resets = <&rcc USBH_R>; interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>; + phys = <&usbphyc_port0>; + phy-names = "usb"; status = "disabled"; }; @@ -1531,6 +1533,8 @@ resets = <&rcc USBH_R>; interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>; companion = <&usbh_ohci>; + phys = <&usbphyc_port0>; + phy-names = "usb"; status = "disabled"; }; diff --git a/arch/arm/boot/dts/st/stm32mp151a-prtt1l.dtsi b/arch/arm/boot/dts/st/stm32mp151a-prtt1l.dtsi index dd23de85100c..3938d357e198 100644 --- a/arch/arm/boot/dts/st/stm32mp151a-prtt1l.dtsi +++ b/arch/arm/boot/dts/st/stm32mp151a-prtt1l.dtsi @@ -206,8 +206,6 @@ }; &usbh_ehci { - phys = <&usbphyc_port0>; - phy-names = "usb"; status = "okay"; }; diff --git a/arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts b/arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts index afcd6285890c..ce5937270aa1 100644 --- a/arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts +++ b/arch/arm/boot/dts/st/stm32mp157a-dk1-scmi.dts @@ -11,7 +11,7 @@ / { model = "STMicroelectronics STM32MP157A-DK1 SCMI Discovery Board"; - compatible = "st,stm32mp157a-dk1-scmi", "st,stm32mp157a-dk1", "st,stm32mp157"; + compatible = "st,stm32mp157a-dk1-scmi", "st,stm32mp157"; reserved-memory { optee@de000000 { @@ -59,7 +59,7 @@ /delete-property/ st,syscfg-holdboot; resets = <&scmi_reset RST_SCMI_MCU>, <&scmi_reset RST_SCMI_MCU_HOLD_BOOT>; - reset-names = "mcu_rst", "hold_boot"; + reset-names = "mcu_rst", "hold_boot"; }; &rcc { diff --git a/arch/arm/boot/dts/st/stm32mp157a-stinger96.dtsi b/arch/arm/boot/dts/st/stm32mp157a-stinger96.dtsi index 5f85598cc7c6..5c1cc48e5199 100644 --- a/arch/arm/boot/dts/st/stm32mp157a-stinger96.dtsi +++ b/arch/arm/boot/dts/st/stm32mp157a-stinger96.dtsi @@ -313,8 +313,6 @@ }; &usbh_ehci { - phys = <&usbphyc_port0>; - phy-names = "usb"; status = "okay"; }; diff --git a/arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts b/arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts index 39358d902000..c20a73841c1f 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-dk2-scmi.dts @@ -11,7 +11,7 @@ / { model = "STMicroelectronics STM32MP157C-DK2 SCMI Discovery Board"; - compatible = "st,stm32mp157c-dk2-scmi", "st,stm32mp157c-dk2", "st,stm32mp157"; + compatible = "st,stm32mp157c-dk2-scmi", "st,stm32mp157"; reserved-memory { optee@de000000 { @@ -65,7 +65,7 @@ /delete-property/ st,syscfg-holdboot; resets = <&scmi_reset RST_SCMI_MCU>, <&scmi_reset RST_SCMI_MCU_HOLD_BOOT>; - reset-names = "mcu_rst", "hold_boot"; + reset-names = "mcu_rst", "hold_boot"; }; &rcc { diff --git a/arch/arm/boot/dts/st/stm32mp157c-dk2.dts b/arch/arm/boot/dts/st/stm32mp157c-dk2.dts index 510cca5acb79..7a701f7ef0c7 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-dk2.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-dk2.dts @@ -64,7 +64,6 @@ reg = <0x38>; interrupts = <2 2>; interrupt-parent = <&gpiof>; - interrupt-controller; touchscreen-size-x = <480>; touchscreen-size-y = <800>; status = "okay"; diff --git a/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts b/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts index 07ea765a4553..5e2eaf57ce22 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-ed1-scmi.dts @@ -11,7 +11,7 @@ / { model = "STMicroelectronics STM32MP157C-ED1 SCMI eval daughter"; - compatible = "st,stm32mp157c-ed1-scmi", "st,stm32mp157c-ed1", "st,stm32mp157"; + compatible = "st,stm32mp157c-ed1-scmi", "st,stm32mp157"; reserved-memory { optee@fe000000 { @@ -64,7 +64,7 @@ /delete-property/ st,syscfg-holdboot; resets = <&scmi_reset RST_SCMI_MCU>, <&scmi_reset RST_SCMI_MCU_HOLD_BOOT>; - reset-names = "mcu_rst", "hold_boot"; + reset-names = "mcu_rst", "hold_boot"; }; &rcc { diff --git a/arch/arm/boot/dts/st/stm32mp157c-emstamp-argon.dtsi b/arch/arm/boot/dts/st/stm32mp157c-emstamp-argon.dtsi index f928cfb80b87..4792004cab0c 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-emstamp-argon.dtsi +++ b/arch/arm/boot/dts/st/stm32mp157c-emstamp-argon.dtsi @@ -500,14 +500,10 @@ }; &usbh_ehci { - phys = <&usbphyc_port0>; - phy-names = "usb"; status = "okay"; }; &usbh_ohci { - phys = <&usbphyc_port0>; - phy-names = "usb"; status = "okay"; }; diff --git a/arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts b/arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts index 813086ec2489..3226fb945a8e 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-ev1-scmi.dts @@ -11,8 +11,7 @@ / { model = "STMicroelectronics STM32MP157C-EV1 SCMI eval daughter on eval mother"; - compatible = "st,stm32mp157c-ev1-scmi", "st,stm32mp157c-ev1", "st,stm32mp157c-ed1", - "st,stm32mp157"; + compatible = "st,stm32mp157c-ev1-scmi", "st,stm32mp157c-ed1", "st,stm32mp157"; reserved-memory { optee@fe000000 { @@ -70,7 +69,7 @@ /delete-property/ st,syscfg-holdboot; resets = <&scmi_reset RST_SCMI_MCU>, <&scmi_reset RST_SCMI_MCU_HOLD_BOOT>; - reset-names = "mcu_rst", "hold_boot"; + reset-names = "mcu_rst", "hold_boot"; }; &rcc { diff --git a/arch/arm/boot/dts/st/stm32mp157c-ev1.dts b/arch/arm/boot/dts/st/stm32mp157c-ev1.dts index cd9c3ff5378b..9eb9a1bf4f2c 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-ev1.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-ev1.dts @@ -362,7 +362,6 @@ }; &usbh_ehci { - phys = <&usbphyc_port0>; status = "okay"; #address-cells = <1>; #size-cells = <0>; diff --git a/arch/arm/boot/dts/st/stm32mp157c-osd32mp1-red.dts b/arch/arm/boot/dts/st/stm32mp157c-osd32mp1-red.dts index bd67a1db9122..527c33be66cc 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-osd32mp1-red.dts +++ b/arch/arm/boot/dts/st/stm32mp157c-osd32mp1-red.dts @@ -197,14 +197,10 @@ }; &usbh_ehci { - phys = <&usbphyc_port0>; - phy-names = "usb"; status = "okay"; }; &usbh_ohci { - phys = <&usbphyc_port0>; - phy-names = "usb"; status = "okay"; }; diff --git a/arch/arm/boot/dts/st/stm32mp157c-phycore-stm32mp15-som.dtsi b/arch/arm/boot/dts/st/stm32mp157c-phycore-stm32mp15-som.dtsi index 4e8b2d2b30c7..bf0c32027baf 100644 --- a/arch/arm/boot/dts/st/stm32mp157c-phycore-stm32mp15-som.dtsi +++ b/arch/arm/boot/dts/st/stm32mp157c-phycore-stm32mp15-som.dtsi @@ -547,14 +547,10 @@ }; &usbh_ehci { - phys = <&usbphyc_port0>; - phy-names = "usb"; status = "okay"; }; &usbh_ohci { - phys = <&usbphyc_port0>; - phy-names = "usb"; status = "okay"; }; diff --git a/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi b/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi index f09b7c384bd9..fc3a2386dbb9 100644 --- a/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xc-lxa-tac.dtsi @@ -567,9 +567,6 @@ baseboard_eeprom: &sip_eeprom { }; &usbh_ehci { - phys = <&usbphyc_port0>; - phy-names = "usb"; - status = "okay"; }; diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dhcom-drc02.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dhcom-drc02.dtsi index 35b1034aa3cf..bb4f8a0b937f 100644 --- a/arch/arm/boot/dts/st/stm32mp15xx-dhcom-drc02.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xx-dhcom-drc02.dtsi @@ -152,7 +152,6 @@ }; &usbh_ehci { - phys = <&usbphyc_port0>; status = "okay"; }; diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi index 46b87a27d8b3..466d9701add0 100644 --- a/arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xx-dhcom-pdk2.dtsi @@ -305,7 +305,6 @@ }; &usbh_ehci { - phys = <&usbphyc_port0>; status = "okay"; }; diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dhcom-picoitx.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dhcom-picoitx.dtsi index abc595350e71..b5bc53accd6b 100644 --- a/arch/arm/boot/dts/st/stm32mp15xx-dhcom-picoitx.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xx-dhcom-picoitx.dtsi @@ -119,12 +119,10 @@ }; &usbh_ehci { - phys = <&usbphyc_port0>; status = "okay"; }; &usbh_ohci { - phys = <&usbphyc_port0>; status = "okay"; }; diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dhcor-avenger96.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dhcor-avenger96.dtsi index 0069ad75d55e..343a4613dfca 100644 --- a/arch/arm/boot/dts/st/stm32mp15xx-dhcor-avenger96.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xx-dhcor-avenger96.dtsi @@ -489,8 +489,6 @@ }; &usbh_ehci { - phys = <&usbphyc_port0>; - phy-names = "usb"; status = "okay"; }; diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dhcor-drc-compact.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dhcor-drc-compact.dtsi index 92d906bfd5d7..bc4ddcbdd5cf 100644 --- a/arch/arm/boot/dts/st/stm32mp15xx-dhcor-drc-compact.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xx-dhcor-drc-compact.dtsi @@ -312,12 +312,10 @@ }; &usbh_ehci { - phys = <&usbphyc_port0>; status = "okay"; }; &usbh_ohci { - phys = <&usbphyc_port0>; status = "okay"; }; diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dhcor-testbench.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dhcor-testbench.dtsi index ab7f0ba49639..6e79c4b6fe32 100644 --- a/arch/arm/boot/dts/st/stm32mp15xx-dhcor-testbench.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xx-dhcor-testbench.dtsi @@ -168,12 +168,10 @@ }; &usbh_ehci { - phys = <&usbphyc_port0>; status = "okay"; }; &usbh_ohci { - phys = <&usbphyc_port0>; status = "okay"; }; diff --git a/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi b/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi index 511113f2e399..f7634c51efb2 100644 --- a/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi +++ b/arch/arm/boot/dts/st/stm32mp15xx-dkx.dtsi @@ -680,7 +680,6 @@ }; &usbh_ehci { - phys = <&usbphyc_port0>; status = "okay"; #address-cells = <1>; #size-cells = <0>; |