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Diffstat (limited to 'arch/arm/boot/dts/ste-ux500-samsung-janice.dts')
-rw-r--r--arch/arm/boot/dts/ste-ux500-samsung-janice.dts16
1 files changed, 10 insertions, 6 deletions
diff --git a/arch/arm/boot/dts/ste-ux500-samsung-janice.dts b/arch/arm/boot/dts/ste-ux500-samsung-janice.dts
index 69387e8754a9..e901cb76b899 100644
--- a/arch/arm/boot/dts/ste-ux500-samsung-janice.dts
+++ b/arch/arm/boot/dts/ste-ux500-samsung-janice.dts
@@ -271,7 +271,7 @@
* this derivative is 3wire support, so it cannot be used to drive
* this panel interface. We have to use GPIO bit-banging instead.
*/
- spi-gpio-0 {
+ spi {
compatible = "spi-gpio";
/* Clock on GPIO220 */
sck-gpios = <&gpio6 28 GPIO_ACTIVE_HIGH>;
@@ -373,9 +373,13 @@
#address-cells = <1>;
#size-cells = <0>;
- nfc@30 {
- compatible = "nxp,pn547", "nxp,nxp-nci-i2c";
- reg = <0x30>;
+ /* This is only mounted on the GT-I9070P */
+ nfc@2b { /* 0x30? */
+ /* NXP NFC circuit PN544 C1 marked NXP 44501 */
+ compatible = "nxp,pn544-i2c";
+ /* IF0, IF1 high, gives I2C address 0x2B */
+ reg = <0x2b>;
+ clock-frequency = <400000>;
/* NFC IRQ on GPIO32 */
interrupt-parent = <&gpio1>;
interrupts = <0 IRQ_TYPE_EDGE_FALLING>;
@@ -384,7 +388,7 @@
/* GPIO88 */
enable-gpios = <&gpio2 24 GPIO_ACTIVE_HIGH>;
pinctrl-names = "default";
- pinctrl-0 = <&pn547_janice_default>;
+ pinctrl-0 = <&pn544_janice_default>;
};
};
@@ -959,7 +963,7 @@
};
};
nfc {
- pn547_janice_default: pn547_janice {
+ pn544_janice_default: pn544_janice {
/* Interrupt line */
janice_cfg1 {
pins = "GPIO32_V2";