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Diffstat (limited to 'arch/arm/mach-omap1/sleep.S')
-rw-r--r--arch/arm/mach-omap1/sleep.S80
1 files changed, 0 insertions, 80 deletions
diff --git a/arch/arm/mach-omap1/sleep.S b/arch/arm/mach-omap1/sleep.S
index f111b79512ce..6192f52d531a 100644
--- a/arch/arm/mach-omap1/sleep.S
+++ b/arch/arm/mach-omap1/sleep.S
@@ -61,86 +61,6 @@
*
*/
-#if defined(CONFIG_ARCH_OMAP730) || defined(CONFIG_ARCH_OMAP850)
- .align 3
-ENTRY(omap7xx_cpu_suspend)
-
- @ save registers on stack
- stmfd sp!, {r0 - r12, lr}
-
- @ Drain write cache
- mov r4, #0
- mcr p15, 0, r0, c7, c10, 4
- nop
-
- @ load base address of Traffic Controller
- mov r6, #TCMIF_ASM_BASE & 0xff000000
- orr r6, r6, #TCMIF_ASM_BASE & 0x00ff0000
- orr r6, r6, #TCMIF_ASM_BASE & 0x0000ff00
-
- @ prepare to put SDRAM into self-refresh manually
- ldr r7, [r6, #EMIFF_SDRAM_CONFIG_ASM_OFFSET & 0xff]
- orr r9, r7, #SELF_REFRESH_MODE & 0xff000000
- orr r9, r9, #SELF_REFRESH_MODE & 0x000000ff
- str r9, [r6, #EMIFF_SDRAM_CONFIG_ASM_OFFSET & 0xff]
-
- @ prepare to put EMIFS to Sleep
- ldr r8, [r6, #EMIFS_CONFIG_ASM_OFFSET & 0xff]
- orr r9, r8, #IDLE_EMIFS_REQUEST & 0xff
- str r9, [r6, #EMIFS_CONFIG_ASM_OFFSET & 0xff]
-
- @ load base address of ARM_IDLECT1 and ARM_IDLECT2
- mov r4, #CLKGEN_REG_ASM_BASE & 0xff000000
- orr r4, r4, #CLKGEN_REG_ASM_BASE & 0x00ff0000
- orr r4, r4, #CLKGEN_REG_ASM_BASE & 0x0000ff00
-
- @ turn off clock domains
- @ do not disable PERCK (0x04)
- mov r5, #OMAP7XX_IDLECT2_SLEEP_VAL & 0xff
- orr r5, r5, #OMAP7XX_IDLECT2_SLEEP_VAL & 0xff00
- strh r5, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff]
-
- @ request ARM idle
- mov r3, #OMAP7XX_IDLECT1_SLEEP_VAL & 0xff
- orr r3, r3, #OMAP7XX_IDLECT1_SLEEP_VAL & 0xff00
- strh r3, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff]
-
- @ disable instruction cache
- mrc p15, 0, r9, c1, c0, 0
- bic r2, r9, #0x1000
- mcr p15, 0, r2, c1, c0, 0
- nop
-
-/*
- * Let's wait for the next wake up event to wake us up. r0 can't be
- * used here because r0 holds ARM_IDLECT1
- */
- mov r2, #0
- mcr p15, 0, r2, c7, c0, 4 @ wait for interrupt
-/*
- * omap7xx_cpu_suspend()'s resume point.
- *
- * It will just start executing here, so we'll restore stuff from the
- * stack.
- */
- @ re-enable Icache
- mcr p15, 0, r9, c1, c0, 0
-
- @ reset the ARM_IDLECT1 and ARM_IDLECT2.
- strh r1, [r4, #ARM_IDLECT2_ASM_OFFSET & 0xff]
- strh r0, [r4, #ARM_IDLECT1_ASM_OFFSET & 0xff]
-
- @ Restore EMIFF controls
- str r7, [r6, #EMIFF_SDRAM_CONFIG_ASM_OFFSET & 0xff]
- str r8, [r6, #EMIFS_CONFIG_ASM_OFFSET & 0xff]
-
- @ restore regs and return
- ldmfd sp!, {r0 - r12, pc}
-
-ENTRY(omap7xx_cpu_suspend_sz)
- .word . - omap7xx_cpu_suspend
-#endif /* CONFIG_ARCH_OMAP730 || CONFIG_ARCH_OMAP850 */
-
#ifdef CONFIG_ARCH_OMAP15XX
.align 3
ENTRY(omap1510_cpu_suspend)