diff options
Diffstat (limited to 'arch/arm/mach-orion5x/include/mach')
| -rw-r--r-- | arch/arm/mach-orion5x/include/mach/bridge-regs.h | 20 | ||||
| -rw-r--r-- | arch/arm/mach-orion5x/include/mach/orion5x.h | 56 |
2 files changed, 38 insertions, 38 deletions
diff --git a/arch/arm/mach-orion5x/include/mach/bridge-regs.h b/arch/arm/mach-orion5x/include/mach/bridge-regs.h index 11a3c1e9801f..461fd69a10ae 100644 --- a/arch/arm/mach-orion5x/include/mach/bridge-regs.h +++ b/arch/arm/mach-orion5x/include/mach/bridge-regs.h @@ -13,27 +13,27 @@ #include <mach/orion5x.h> -#define CPU_CONF (ORION5X_BRIDGE_VIRT_BASE | 0x100) +#define CPU_CONF (ORION5X_BRIDGE_VIRT_BASE + 0x100) -#define CPU_CTRL (ORION5X_BRIDGE_VIRT_BASE | 0x104) +#define CPU_CTRL (ORION5X_BRIDGE_VIRT_BASE + 0x104) -#define RSTOUTn_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x108) +#define RSTOUTn_MASK (ORION5X_BRIDGE_VIRT_BASE + 0x108) #define WDT_RESET_OUT_EN 0x0002 -#define CPU_SOFT_RESET (ORION5X_BRIDGE_VIRT_BASE | 0x10c) +#define CPU_SOFT_RESET (ORION5X_BRIDGE_VIRT_BASE + 0x10c) -#define BRIDGE_CAUSE (ORION5X_BRIDGE_VIRT_BASE | 0x110) +#define BRIDGE_CAUSE (ORION5X_BRIDGE_VIRT_BASE + 0x110) -#define POWER_MNG_CTRL_REG (ORION5X_BRIDGE_VIRT_BASE | 0x11C) +#define POWER_MNG_CTRL_REG (ORION5X_BRIDGE_VIRT_BASE + 0x11C) #define WDT_INT_REQ 0x0008 #define BRIDGE_INT_TIMER1_CLR (~0x0004) -#define MAIN_IRQ_CAUSE (ORION5X_BRIDGE_VIRT_BASE | 0x200) +#define MAIN_IRQ_CAUSE (ORION5X_BRIDGE_VIRT_BASE + 0x200) -#define MAIN_IRQ_MASK (ORION5X_BRIDGE_VIRT_BASE | 0x204) +#define MAIN_IRQ_MASK (ORION5X_BRIDGE_VIRT_BASE + 0x204) -#define TIMER_VIRT_BASE (ORION5X_BRIDGE_VIRT_BASE | 0x300) -#define TIMER_PHYS_BASE (ORION5X_BRIDGE_PHYS_BASE | 0x300) +#define TIMER_VIRT_BASE (ORION5X_BRIDGE_VIRT_BASE + 0x300) +#define TIMER_PHYS_BASE (ORION5X_BRIDGE_PHYS_BASE + 0x300) #endif diff --git a/arch/arm/mach-orion5x/include/mach/orion5x.h b/arch/arm/mach-orion5x/include/mach/orion5x.h index 1b60131b7f60..d265f5484a8e 100644 --- a/arch/arm/mach-orion5x/include/mach/orion5x.h +++ b/arch/arm/mach-orion5x/include/mach/orion5x.h @@ -37,7 +37,7 @@ * fd000000 f0000000 16M PCIe WA space (Orion-1/Orion-NAS only) ****************************************************************************/ #define ORION5X_REGS_PHYS_BASE 0xf1000000 -#define ORION5X_REGS_VIRT_BASE 0xfe000000 +#define ORION5X_REGS_VIRT_BASE IOMEM(0xfe000000) #define ORION5X_REGS_SIZE SZ_1M #define ORION5X_PCIE_IO_PHYS_BASE 0xf2000000 @@ -53,7 +53,7 @@ /* Relevant only for Orion-1/Orion-NAS */ #define ORION5X_PCIE_WA_PHYS_BASE 0xf0000000 -#define ORION5X_PCIE_WA_VIRT_BASE 0xfd000000 +#define ORION5X_PCIE_WA_VIRT_BASE IOMEM(0xfd000000) #define ORION5X_PCIE_WA_SIZE SZ_16M #define ORION5X_PCIE_MEM_PHYS_BASE 0xe0000000 @@ -66,42 +66,42 @@ * Orion Registers Map ******************************************************************************/ -#define ORION5X_DDR_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x00000) -#define ORION5X_DDR_WINDOW_CPU_BASE (ORION5X_DDR_VIRT_BASE | 0x1500) -#define ORION5X_DEV_BUS_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x10000) -#define ORION5X_DEV_BUS_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x10000) -#define ORION5X_DEV_BUS_REG(x) (ORION5X_DEV_BUS_VIRT_BASE | (x)) +#define ORION5X_DDR_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x00000) +#define ORION5X_DDR_WINDOW_CPU_BASE (ORION5X_DDR_VIRT_BASE + 0x1500) +#define ORION5X_DEV_BUS_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x10000) +#define ORION5X_DEV_BUS_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x10000) +#define ORION5X_DEV_BUS_REG(x) (ORION5X_DEV_BUS_VIRT_BASE + (x)) #define GPIO_VIRT_BASE ORION5X_DEV_BUS_REG(0x0100) -#define SPI_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x0600) -#define I2C_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x1000) -#define UART0_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x2000) -#define UART0_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE | 0x2000) -#define UART1_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x2100) -#define UART1_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE | 0x2100) +#define SPI_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE + 0x0600) +#define I2C_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE + 0x1000) +#define UART0_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE + 0x2000) +#define UART0_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE + 0x2000) +#define UART1_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE + 0x2100) +#define UART1_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE + 0x2100) -#define ORION5X_BRIDGE_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x20000) -#define ORION5X_BRIDGE_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x20000) +#define ORION5X_BRIDGE_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x20000) +#define ORION5X_BRIDGE_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x20000) -#define ORION5X_PCI_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x30000) +#define ORION5X_PCI_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x30000) -#define ORION5X_PCIE_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x40000) +#define ORION5X_PCIE_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x40000) -#define ORION5X_USB0_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x50000) -#define ORION5X_USB0_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x50000) +#define ORION5X_USB0_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x50000) +#define ORION5X_USB0_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x50000) -#define ORION5X_XOR_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x60900) -#define ORION5X_XOR_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x60900) +#define ORION5X_XOR_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x60900) +#define ORION5X_XOR_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x60900) -#define ORION5X_ETH_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x70000) -#define ORION5X_ETH_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x70000) +#define ORION5X_ETH_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x70000) +#define ORION5X_ETH_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x70000) -#define ORION5X_SATA_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x80000) -#define ORION5X_SATA_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x80000) +#define ORION5X_SATA_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x80000) +#define ORION5X_SATA_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0x80000) -#define ORION5X_CRYPTO_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x90000) +#define ORION5X_CRYPTO_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0x90000) -#define ORION5X_USB1_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0xa0000) -#define ORION5X_USB1_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0xa0000) +#define ORION5X_USB1_PHYS_BASE (ORION5X_REGS_PHYS_BASE + 0xa0000) +#define ORION5X_USB1_VIRT_BASE (ORION5X_REGS_VIRT_BASE + 0xa0000) /******************************************************************************* * Device Bus Registers |