diff options
Diffstat (limited to 'arch/arm/mach-versatile/include/mach/platform.h')
| -rw-r--r-- | arch/arm/mach-versatile/include/mach/platform.h | 174 |
1 files changed, 0 insertions, 174 deletions
diff --git a/arch/arm/mach-versatile/include/mach/platform.h b/arch/arm/mach-versatile/include/mach/platform.h index 6f938ccb0c54..7fe008bd1509 100644 --- a/arch/arm/mach-versatile/include/mach/platform.h +++ b/arch/arm/mach-versatile/include/mach/platform.h @@ -185,79 +185,13 @@ /* * VERSATILE peripheral addresses */ -#define VERSATILE_PCI_CORE_BASE 0x10001000 /* PCI core control */ -#define VERSATILE_I2C_BASE 0x10002000 /* I2C control */ -#define VERSATILE_SIC_BASE 0x10003000 /* Secondary interrupt controller */ -#define VERSATILE_AACI_BASE 0x10004000 /* Audio */ #define VERSATILE_MMCI0_BASE 0x10005000 /* MMC interface */ -#define VERSATILE_KMI0_BASE 0x10006000 /* KMI interface */ -#define VERSATILE_KMI1_BASE 0x10007000 /* KMI 2nd interface */ -#define VERSATILE_CHAR_LCD_BASE 0x10008000 /* Character LCD */ -#define VERSATILE_UART3_BASE 0x10009000 /* UART 3 */ -#define VERSATILE_SCI1_BASE 0x1000A000 #define VERSATILE_MMCI1_BASE 0x1000B000 /* MMC Interface */ - /* 0x1000C000 - 0x1000CFFF = reserved */ -#define VERSATILE_ETH_BASE 0x10010000 /* Ethernet */ -#define VERSATILE_USB_BASE 0x10020000 /* USB */ - /* 0x10030000 - 0x100FFFFF = reserved */ -#define VERSATILE_SMC_BASE 0x10100000 /* SMC */ -#define VERSATILE_MPMC_BASE 0x10110000 /* MPMC */ #define VERSATILE_CLCD_BASE 0x10120000 /* CLCD */ -#define VERSATILE_DMAC_BASE 0x10130000 /* DMA controller */ -#define VERSATILE_VIC_BASE 0x10140000 /* Vectored interrupt controller */ -#define VERSATILE_PERIPH_BASE 0x10150000 /* off-chip peripherals alias from */ - /* 0x10000000 - 0x100FFFFF */ -#define VERSATILE_AHBM_BASE 0x101D0000 /* AHB monitor */ #define VERSATILE_SCTL_BASE 0x101E0000 /* System controller */ -#define VERSATILE_WATCHDOG_BASE 0x101E1000 /* Watchdog */ -#define VERSATILE_TIMER0_1_BASE 0x101E2000 /* Timer 0 and 1 */ -#define VERSATILE_TIMER2_3_BASE 0x101E3000 /* Timer 2 and 3 */ -#define VERSATILE_GPIO0_BASE 0x101E4000 /* GPIO port 0 */ -#define VERSATILE_GPIO1_BASE 0x101E5000 /* GPIO port 1 */ -#define VERSATILE_GPIO2_BASE 0x101E6000 /* GPIO port 2 */ -#define VERSATILE_GPIO3_BASE 0x101E7000 /* GPIO port 3 */ -#define VERSATILE_RTC_BASE 0x101E8000 /* Real Time Clock */ - /* 0x101E9000 - reserved */ -#define VERSATILE_SCI_BASE 0x101F0000 /* Smart card controller */ -#define VERSATILE_UART0_BASE 0x101F1000 /* Uart 0 */ -#define VERSATILE_UART1_BASE 0x101F2000 /* Uart 1 */ -#define VERSATILE_UART2_BASE 0x101F3000 /* Uart 2 */ -#define VERSATILE_SSP_BASE 0x101F4000 /* Synchronous Serial Port */ - -#define VERSATILE_SSMC_BASE 0x20000000 /* SSMC */ #define VERSATILE_IB2_BASE 0x24000000 /* IB2 module */ -#define VERSATILE_MBX_BASE 0x40000000 /* MBX */ - -/* PCI space */ -#define VERSATILE_PCI_BASE 0x41000000 /* PCI Interface */ -#define VERSATILE_PCI_CFG_BASE 0x42000000 -#define VERSATILE_PCI_IO_BASE 0x43000000 -#define VERSATILE_PCI_MEM_BASE0 0x44000000 -#define VERSATILE_PCI_MEM_BASE1 0x50000000 -#define VERSATILE_PCI_MEM_BASE2 0x60000000 -/* Sizes of above maps */ -#define VERSATILE_PCI_BASE_SIZE 0x01000000 -#define VERSATILE_PCI_CFG_BASE_SIZE 0x02000000 -#define VERSATILE_PCI_IO_BASE_SIZE 0x01000000 -#define VERSATILE_PCI_MEM_BASE0_SIZE 0x0c000000 /* 32Mb */ -#define VERSATILE_PCI_MEM_BASE1_SIZE 0x10000000 /* 256Mb */ -#define VERSATILE_PCI_MEM_BASE2_SIZE 0x10000000 /* 256Mb */ - -#define VERSATILE_SDRAM67_BASE 0x70000000 /* SDRAM banks 6 and 7 */ -#define VERSATILE_LT_BASE 0x80000000 /* Logic Tile expansion */ /* - * Disk on Chip - */ -#define VERSATILE_DOC_BASE 0x2C000000 -#define VERSATILE_DOC_SIZE (16 << 20) -#define VERSATILE_DOC_PAGE_SIZE 512 -#define VERSATILE_DOC_TOTAL_PAGES (DOC_SIZE / PAGE_SIZE) - -#define ERASE_UNIT_PAGES 32 -#define START_PAGE 0x80 - -/* * LED settings, bits [7:0] */ #define VERSATILE_SYS_LED0 (1 << 0) @@ -281,106 +215,6 @@ #define VERSATILE_INTREG_OFFSET 0x8 /* Interrupt control */ #define VERSATILE_DECODE_OFFSET 0xC /* Fitted logic modules */ - -/* ------------------------------------------------------------------------ - * Versatile Interrupt Controller - control registers - * ------------------------------------------------------------------------ - * - * Offsets from interrupt controller base - * - * System Controller interrupt controller base is - * - * VERSATILE_IC_BASE - * - * Core Module interrupt controller base is - * - * VERSATILE_SYS_IC - * - */ -/* VIC definitions in include/asm-arm/hardware/vic.h */ - -#define SIC_IRQ_STATUS 0 -#define SIC_IRQ_RAW_STATUS 0x04 -#define SIC_IRQ_ENABLE 0x08 -#define SIC_IRQ_ENABLE_SET 0x08 -#define SIC_IRQ_ENABLE_CLEAR 0x0C -#define SIC_INT_SOFT_SET 0x10 -#define SIC_INT_SOFT_CLEAR 0x14 -#define SIC_INT_PIC_ENABLE 0x20 /* read status of pass through mask */ -#define SIC_INT_PIC_ENABLES 0x20 /* set interrupt pass through bits */ -#define SIC_INT_PIC_ENABLEC 0x24 /* Clear interrupt pass through bits */ - -/* ------------------------------------------------------------------------ - * Interrupts - bit assignment (primary) - * ------------------------------------------------------------------------ - */ - -#define INT_WDOGINT 0 /* Watchdog timer */ -#define INT_SOFTINT 1 /* Software interrupt */ -#define INT_COMMRx 2 /* Debug Comm Rx interrupt */ -#define INT_COMMTx 3 /* Debug Comm Tx interrupt */ -#define INT_TIMERINT0_1 4 /* Timer 0 and 1 */ -#define INT_TIMERINT2_3 5 /* Timer 2 and 3 */ -#define INT_GPIOINT0 6 /* GPIO 0 */ -#define INT_GPIOINT1 7 /* GPIO 1 */ -#define INT_GPIOINT2 8 /* GPIO 2 */ -#define INT_GPIOINT3 9 /* GPIO 3 */ -#define INT_RTCINT 10 /* Real Time Clock */ -#define INT_SSPINT 11 /* Synchronous Serial Port */ -#define INT_UARTINT0 12 /* UART 0 on development chip */ -#define INT_UARTINT1 13 /* UART 1 on development chip */ -#define INT_UARTINT2 14 /* UART 2 on development chip */ -#define INT_SCIINT 15 /* Smart Card Interface */ -#define INT_CLCDINT 16 /* CLCD controller */ -#define INT_DMAINT 17 /* DMA controller */ -#define INT_PWRFAILINT 18 /* Power failure */ -#define INT_MBXINT 19 /* Graphics processor */ -#define INT_GNDINT 20 /* Reserved */ - /* External interrupt signals from logic tiles or secondary controller */ -#define INT_VICSOURCE21 21 /* Disk on Chip */ -#define INT_VICSOURCE22 22 /* MCI0A */ -#define INT_VICSOURCE23 23 /* MCI1A */ -#define INT_VICSOURCE24 24 /* AACI */ -#define INT_VICSOURCE25 25 /* Ethernet */ -#define INT_VICSOURCE26 26 /* USB */ -#define INT_VICSOURCE27 27 /* PCI 0 */ -#define INT_VICSOURCE28 28 /* PCI 1 */ -#define INT_VICSOURCE29 29 /* PCI 2 */ -#define INT_VICSOURCE30 30 /* PCI 3 */ -#define INT_VICSOURCE31 31 /* SIC source */ - -#define VERSATILE_SC_VALID_INT 0x003FFFFF - -#define MAXIRQNUM 31 -#define MAXFIQNUM 31 -#define MAXSWINUM 31 - -/* ------------------------------------------------------------------------ - * Interrupts - bit assignment (secondary) - * ------------------------------------------------------------------------ - */ -#define SIC_INT_MMCI0B 1 /* Multimedia Card 0B */ -#define SIC_INT_MMCI1B 2 /* Multimedia Card 1B */ -#define SIC_INT_KMI0 3 /* Keyboard/Mouse port 0 */ -#define SIC_INT_KMI1 4 /* Keyboard/Mouse port 1 */ -#define SIC_INT_SCI3 5 /* Smart Card interface */ -#define SIC_INT_UART3 6 /* UART 3 empty or data available */ -#define SIC_INT_CLCD 7 /* Character LCD */ -#define SIC_INT_TOUCH 8 /* Touchscreen */ -#define SIC_INT_KEYPAD 9 /* Key pressed on display keypad */ - /* 10:20 - reserved */ -#define SIC_INT_DoC 21 /* Disk on Chip memory controller */ -#define SIC_INT_MMCI0A 22 /* MMC 0A */ -#define SIC_INT_MMCI1A 23 /* MMC 1A */ -#define SIC_INT_AACI 24 /* Audio Codec */ -#define SIC_INT_ETH 25 /* Ethernet controller */ -#define SIC_INT_USB 26 /* USB controller */ -#define SIC_INT_PCI0 27 -#define SIC_INT_PCI1 28 -#define SIC_INT_PCI2 29 -#define SIC_INT_PCI3 30 - - /* * System controller bit assignment */ @@ -393,16 +227,9 @@ #define VERSATILE_TIMER4_EnSel 21 -#define VERSATILE_CSR_BASE 0x10000000 -#define VERSATILE_CSR_SIZE 0x10000000 - -#ifdef CONFIG_MACH_VERSATILE_AB /* * IB2 Versatile/AB expansion board definitions */ -#define VERSATILE_IB2_CAMERA_BANK VERSATILE_IB2_BASE -#define VERSATILE_IB2_KBD_DATAREG (VERSATILE_IB2_BASE + 0x01000000) - /* VICINTSOURCE27 */ #define VERSATILE_IB2_INT_BASE (VERSATILE_IB2_BASE + 0x02000000) #define VERSATILE_IB2_IER (VERSATILE_IB2_INT_BASE + 0) @@ -411,6 +238,5 @@ #define VERSATILE_IB2_CTL_BASE (VERSATILE_IB2_BASE + 0x03000000) #define VERSATILE_IB2_CTRL (VERSATILE_IB2_CTL_BASE + 0) #define VERSATILE_IB2_STAT (VERSATILE_IB2_CTL_BASE + 4) -#endif #endif |