diff options
Diffstat (limited to 'arch/arm/plat-samsung')
43 files changed, 0 insertions, 7024 deletions
diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig deleted file mode 100644 index 301e572651c0..000000000000 --- a/arch/arm/plat-samsung/Kconfig +++ /dev/null @@ -1,308 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -# -# Copyright 2009 Simtec Electronics - -config PLAT_SAMSUNG - bool - depends on PLAT_S3C24XX || ARCH_S3C64XX || ARCH_EXYNOS || ARCH_S5PV210 - default y - select GENERIC_IRQ_CHIP - select NO_IOPORT_MAP - help - Base platform code for all Samsung SoC based systems - -config SAMSUNG_PM - bool - depends on PM && (PLAT_S3C24XX || ARCH_S3C64XX) - default y - help - Base platform power management code for samsung code - -if PLAT_SAMSUNG -menu "Samsung Common options" - -# boot configurations - -comment "Boot options" - -config S3C_LOWLEVEL_UART_PORT - int "S3C UART to use for low-level messages" - depends on ARCH_S3C64XX - default 0 - help - Choice of which UART port to use for the low-level messages, - such as the `Uncompressing...` at start time. The value of - this configuration should be between zero and two. The port - must have been initialised by the boot-loader before use. - -config SAMSUNG_ATAGS - def_bool n - depends on ATAGS - help - This option enables ATAGS based boot support code for - Samsung platforms, including static platform devices, legacy - clock, timer and interrupt initialization, etc. - - Platforms that support only DT based boot need not to select - this option. - -if SAMSUNG_ATAGS - -config S3C_GPIO_SPACE - int "Space between gpio banks" - default 0 - help - Add a number of spare GPIO entries between each bank for debugging - purposes. This allows any problems where an counter overflows from - one bank to another to be caught, at the expense of using a little - more memory. - -config S3C_GPIO_TRACK - bool - help - Internal configuration option to enable the s3c specific gpio - chip tracking if the platform requires it. - -# ADC driver - -config S3C_ADC - bool "ADC common driver support" - depends on !ARCH_MULTIPLATFORM - help - Core support for the ADC block found in the Samsung SoC systems - for drivers such as the touchscreen and hwmon to use to share - this resource. - -# device definitions to compile in - -config S3C_DEV_HSMMC - bool - help - Compile in platform device definitions for HSMMC code - -config S3C_DEV_HSMMC1 - bool - help - Compile in platform device definitions for HSMMC channel 1 - -config S3C_DEV_HSMMC2 - bool - help - Compile in platform device definitions for HSMMC channel 2 - -config S3C_DEV_HSMMC3 - bool - help - Compile in platform device definitions for HSMMC channel 3 - -config S3C_DEV_HWMON - bool - help - Compile in platform device definitions for HWMON - -config S3C_DEV_I2C1 - bool - help - Compile in platform device definitions for I2C channel 1 - -config S3C_DEV_I2C2 - bool - help - Compile in platform device definitions for I2C channel 2 - -config S3C_DEV_I2C3 - bool - help - Compile in platform device definition for I2C controller 3 - -config S3C_DEV_I2C4 - bool - help - Compile in platform device definition for I2C controller 4 - -config S3C_DEV_I2C5 - bool - help - Compile in platform device definition for I2C controller 5 - -config S3C_DEV_I2C6 - bool - help - Compile in platform device definition for I2C controller 6 - -config S3C_DEV_I2C7 - bool - help - Compile in platform device definition for I2C controller 7 - -config S3C_DEV_FB - bool - help - Compile in platform device definition for framebuffer - -config S3C_DEV_USB_HOST - bool - help - Compile in platform device definition for USB host. - -config S3C_DEV_USB_HSOTG - bool - help - Compile in platform device definition for USB high-speed OtG - -config S3C_DEV_WDT - bool - default y if ARCH_S3C24XX - help - Complie in platform device definition for Watchdog Timer - -config S3C_DEV_NAND - bool - help - Compile in platform device definition for NAND controller - -config S3C_DEV_ONENAND - bool - help - Compile in platform device definition for OneNAND controller - -config S3C_DEV_RTC - bool - help - Complie in platform device definition for RTC - -config SAMSUNG_DEV_ADC - bool - help - Compile in platform device definition for ADC controller - -config SAMSUNG_DEV_IDE - bool - help - Compile in platform device definitions for IDE - -config S3C64XX_DEV_SPI0 - bool - help - Compile in platform device definitions for S3C64XX's type - SPI controller 0 - -config S3C64XX_DEV_SPI1 - bool - help - Compile in platform device definitions for S3C64XX's type - SPI controller 1 - -config S3C64XX_DEV_SPI2 - bool - help - Compile in platform device definitions for S3C64XX's type - SPI controller 2 - -config SAMSUNG_DEV_TS - bool - help - Common in platform device definitions for touchscreen device - -config SAMSUNG_DEV_KEYPAD - bool - help - Compile in platform device definitions for keypad - -config SAMSUNG_DEV_PWM - bool - default y if ARCH_S3C24XX - help - Compile in platform device definition for PWM Timer - -config S3C24XX_PWM - bool "PWM device support" - select PWM - select PWM_SAMSUNG - help - Support for exporting the PWM timer blocks via the pwm device - system - -config GPIO_SAMSUNG - def_bool y - -config SAMSUNG_PM_GPIO - bool - default y if GPIO_SAMSUNG && PM - help - Include legacy GPIO power management code for platforms not using - pinctrl-samsung driver. -endif - -comment "Power management" - -config SAMSUNG_PM_DEBUG - bool "Samsung PM Suspend debug" - depends on PM && DEBUG_KERNEL - depends on PLAT_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210 - depends on DEBUG_EXYNOS_UART || DEBUG_S3C24XX_UART || DEBUG_S3C2410_UART - help - Say Y here if you want verbose debugging from the PM Suspend and - Resume code. See <file:Documentation/arm/samsung-s3c24xx/suspend.rst> - for more information. - -config S3C_PM_DEBUG_LED_SMDK - bool "SMDK LED suspend/resume debugging" - depends on PM && (MACH_SMDK6410) - help - Say Y here to enable the use of the SMDK LEDs on the baseboard - for debugging of the state of the suspend and resume process. - - Note, this currently only works for S3C64XX based SMDK boards. - -config SAMSUNG_PM_CHECK - bool "S3C2410 PM Suspend Memory CRC" - depends on PM && (PLAT_S3C24XX || ARCH_S3C64XX || ARCH_S5PV210) - select CRC32 - help - Enable the PM code's memory area checksum over sleep. This option - will generate CRCs of all blocks of memory, and store them before - going to sleep. The blocks are then checked on resume for any - errors. - - Note, this can take several seconds depending on memory size - and CPU speed. - - See <file:Documentation/arm/samsung-s3c24xx/suspend.rst> - -config SAMSUNG_PM_CHECK_CHUNKSIZE - int "S3C2410 PM Suspend CRC Chunksize (KiB)" - depends on PM && SAMSUNG_PM_CHECK - default 64 - help - Set the chunksize in Kilobytes of the CRC for checking memory - corruption over suspend and resume. A smaller value will mean that - the CRC data block will take more memory, but will identify any - faults with better precision. - - See <file:Documentation/arm/samsung-s3c24xx/suspend.rst> - -config SAMSUNG_WAKEMASK - bool - depends on PM - help - Compile support for wakeup-mask controls found on the S3C6400 - and above. This code allows a set of interrupt to wakeup-mask - mappings. See <plat/wakeup-mask.h> - -config SAMSUNG_WDT_RESET - bool - help - Compile support for system restart by triggering watchdog reset. - Used on SoCs that do not provide dedicated reset control. - -config DEBUG_S3C_UART - depends on PLAT_SAMSUNG - int - default "0" if DEBUG_S3C_UART0 - default "1" if DEBUG_S3C_UART1 - default "2" if DEBUG_S3C_UART2 - default "3" if DEBUG_S3C_UART3 - -endmenu -endif diff --git a/arch/arm/plat-samsung/Makefile b/arch/arm/plat-samsung/Makefile deleted file mode 100644 index 3db9d2c38258..000000000000 --- a/arch/arm/plat-samsung/Makefile +++ /dev/null @@ -1,35 +0,0 @@ -# SPDX-License-Identifier: GPL-2.0 -# -# Copyright 2009 Simtec Electronics - -ccflags-$(CONFIG_ARCH_S3C64XX) := -I$(srctree)/arch/arm/mach-s3c64xx/include -ccflags-$(CONFIG_ARCH_MULTIPLATFORM) += -I$(srctree)/$(src)/include - -# Objects we always build independent of SoC choice - -obj-y += init.o cpu.o - -# ADC - -obj-$(CONFIG_S3C_ADC) += adc.o - -# devices - -obj-$(CONFIG_SAMSUNG_ATAGS) += platformdata.o - -obj-$(CONFIG_SAMSUNG_ATAGS) += devs.o -obj-$(CONFIG_SAMSUNG_ATAGS) += dev-uart.o - -obj-$(CONFIG_GPIO_SAMSUNG) += gpio-samsung.o - -# PM support - -obj-$(CONFIG_PM_SLEEP) += pm-common.o -obj-$(CONFIG_EXYNOS_CPU_SUSPEND) += pm-common.o -obj-$(CONFIG_SAMSUNG_PM) += pm.o -obj-$(CONFIG_SAMSUNG_PM_GPIO) += pm-gpio.o -obj-$(CONFIG_SAMSUNG_PM_CHECK) += pm-check.o -obj-$(CONFIG_SAMSUNG_PM_DEBUG) += pm-debug.o - -obj-$(CONFIG_SAMSUNG_WAKEMASK) += wakeup-mask.o -obj-$(CONFIG_SAMSUNG_WDT_RESET) += watchdog-reset.o diff --git a/arch/arm/plat-samsung/adc.c b/arch/arm/plat-samsung/adc.c deleted file mode 100644 index ee3d5c989a76..000000000000 --- a/arch/arm/plat-samsung/adc.c +++ /dev/null @@ -1,514 +0,0 @@ -// SPDX-License-Identifier: GPL-1.0+ -// -// Copyright (c) 2008 Simtec Electronics -// http://armlinux.simtec.co.uk/ -// Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org> -// -// Samsung ADC device core - -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/mod_devicetable.h> -#include <linux/platform_device.h> -#include <linux/sched.h> -#include <linux/list.h> -#include <linux/slab.h> -#include <linux/err.h> -#include <linux/clk.h> -#include <linux/interrupt.h> -#include <linux/io.h> -#include <linux/regulator/consumer.h> - -#include <plat/regs-adc.h> -#include <plat/adc.h> - -/* This driver is designed to control the usage of the ADC block between - * the touchscreen and any other drivers that may need to use it, such as - * the hwmon driver. - * - * Priority will be given to the touchscreen driver, but as this itself is - * rate limited it should not starve other requests which are processed in - * order that they are received. - * - * Each user registers to get a client block which uniquely identifies it - * and stores information such as the necessary functions to callback when - * action is required. - */ - -enum s3c_cpu_type { - TYPE_ADCV1, /* S3C24XX */ - TYPE_ADCV11, /* S3C2443 */ - TYPE_ADCV12, /* S3C2416, S3C2450 */ - TYPE_ADCV2, /* S3C64XX */ - TYPE_ADCV3, /* S5PV210, S5PC110, EXYNOS4210 */ -}; - -struct s3c_adc_client { - struct platform_device *pdev; - struct list_head pend; - wait_queue_head_t *wait; - - unsigned int nr_samples; - int result; - unsigned char is_ts; - unsigned char channel; - - void (*select_cb)(struct s3c_adc_client *c, unsigned selected); - void (*convert_cb)(struct s3c_adc_client *c, - unsigned val1, unsigned val2, - unsigned *samples_left); -}; - -struct adc_device { - struct platform_device *pdev; - struct platform_device *owner; - struct clk *clk; - struct s3c_adc_client *cur; - struct s3c_adc_client *ts_pend; - void __iomem *regs; - spinlock_t lock; - - unsigned int prescale; - - int irq; - struct regulator *vdd; -}; - -static struct adc_device *adc_dev; - -static LIST_HEAD(adc_pending); /* protected by adc_device.lock */ - -#define adc_dbg(_adc, msg...) dev_dbg(&(_adc)->pdev->dev, msg) - -static inline void s3c_adc_convert(struct adc_device *adc) -{ - unsigned con = readl(adc->regs + S3C2410_ADCCON); - - con |= S3C2410_ADCCON_ENABLE_START; - writel(con, adc->regs + S3C2410_ADCCON); -} - -static inline void s3c_adc_select(struct adc_device *adc, - struct s3c_adc_client *client) -{ - unsigned con = readl(adc->regs + S3C2410_ADCCON); - enum s3c_cpu_type cpu = platform_get_device_id(adc->pdev)->driver_data; - - client->select_cb(client, 1); - - if (cpu == TYPE_ADCV1 || cpu == TYPE_ADCV2) - con &= ~S3C2410_ADCCON_MUXMASK; - con &= ~S3C2410_ADCCON_STDBM; - con &= ~S3C2410_ADCCON_STARTMASK; - - if (!client->is_ts) { - if (cpu == TYPE_ADCV3) - writel(client->channel & 0xf, adc->regs + S5P_ADCMUX); - else if (cpu == TYPE_ADCV11 || cpu == TYPE_ADCV12) - writel(client->channel & 0xf, - adc->regs + S3C2443_ADCMUX); - else - con |= S3C2410_ADCCON_SELMUX(client->channel); - } - - writel(con, adc->regs + S3C2410_ADCCON); -} - -static void s3c_adc_dbgshow(struct adc_device *adc) -{ - adc_dbg(adc, "CON=%08x, TSC=%08x, DLY=%08x\n", - readl(adc->regs + S3C2410_ADCCON), - readl(adc->regs + S3C2410_ADCTSC), - readl(adc->regs + S3C2410_ADCDLY)); -} - -static void s3c_adc_try(struct adc_device *adc) -{ - struct s3c_adc_client *next = adc->ts_pend; - - if (!next && !list_empty(&adc_pending)) { - next = list_first_entry(&adc_pending, - struct s3c_adc_client, pend); - list_del(&next->pend); - } else - adc->ts_pend = NULL; - - if (next) { - adc_dbg(adc, "new client is %p\n", next); - adc->cur = next; - s3c_adc_select(adc, next); - s3c_adc_convert(adc); - s3c_adc_dbgshow(adc); - } -} - -int s3c_adc_start(struct s3c_adc_client *client, - unsigned int channel, unsigned int nr_samples) -{ - struct adc_device *adc = adc_dev; - unsigned long flags; - - if (!adc) { - printk(KERN_ERR "%s: failed to find adc\n", __func__); - return -EINVAL; - } - - spin_lock_irqsave(&adc->lock, flags); - - if (client->is_ts && adc->ts_pend) { - spin_unlock_irqrestore(&adc->lock, flags); - return -EAGAIN; - } - - client->channel = channel; - client->nr_samples = nr_samples; - - if (client->is_ts) - adc->ts_pend = client; - else - list_add_tail(&client->pend, &adc_pending); - - if (!adc->cur) - s3c_adc_try(adc); - - spin_unlock_irqrestore(&adc->lock, flags); - - return 0; -} -EXPORT_SYMBOL_GPL(s3c_adc_start); - -static void s3c_convert_done(struct s3c_adc_client *client, - unsigned v, unsigned u, unsigned *left) -{ - client->result = v; - wake_up(client->wait); -} - -int s3c_adc_read(struct s3c_adc_client *client, unsigned int ch) -{ - DECLARE_WAIT_QUEUE_HEAD_ONSTACK(wake); - int ret; - - client->convert_cb = s3c_convert_done; - client->wait = &wake; - client->result = -1; - - ret = s3c_adc_start(client, ch, 1); - if (ret < 0) - goto err; - - ret = wait_event_timeout(wake, client->result >= 0, HZ / 2); - if (client->result < 0) { - ret = -ETIMEDOUT; - goto err; - } - - client->convert_cb = NULL; - return client->result; - -err: - return ret; -} -EXPORT_SYMBOL_GPL(s3c_adc_read); - -static void s3c_adc_default_select(struct s3c_adc_client *client, - unsigned select) -{ -} - -struct s3c_adc_client *s3c_adc_register(struct platform_device *pdev, - void (*select)(struct s3c_adc_client *client, - unsigned int selected), - void (*conv)(struct s3c_adc_client *client, - unsigned d0, unsigned d1, - unsigned *samples_left), - unsigned int is_ts) -{ - struct s3c_adc_client *client; - - WARN_ON(!pdev); - - if (!select) - select = s3c_adc_default_select; - - if (!pdev) - return ERR_PTR(-EINVAL); - - client = kzalloc(sizeof(*client), GFP_KERNEL); - if (!client) - return ERR_PTR(-ENOMEM); - - client->pdev = pdev; - client->is_ts = is_ts; - client->select_cb = select; - client->convert_cb = conv; - - return client; -} -EXPORT_SYMBOL_GPL(s3c_adc_register); - -void s3c_adc_release(struct s3c_adc_client *client) -{ - unsigned long flags; - - spin_lock_irqsave(&adc_dev->lock, flags); - - /* We should really check that nothing is in progress. */ - if (adc_dev->cur == client) - adc_dev->cur = NULL; - if (adc_dev->ts_pend == client) - adc_dev->ts_pend = NULL; - else { - struct list_head *p, *n; - struct s3c_adc_client *tmp; - - list_for_each_safe(p, n, &adc_pending) { - tmp = list_entry(p, struct s3c_adc_client, pend); - if (tmp == client) - list_del(&tmp->pend); - } - } - - if (adc_dev->cur == NULL) - s3c_adc_try(adc_dev); - - spin_unlock_irqrestore(&adc_dev->lock, flags); - kfree(client); -} -EXPORT_SYMBOL_GPL(s3c_adc_release); - -static irqreturn_t s3c_adc_irq(int irq, void *pw) -{ - struct adc_device *adc = pw; - struct s3c_adc_client *client = adc->cur; - enum s3c_cpu_type cpu = platform_get_device_id(adc->pdev)->driver_data; - unsigned data0, data1; - - if (!client) { - dev_warn(&adc->pdev->dev, "%s: no adc pending\n", __func__); - goto exit; - } - - data0 = readl(adc->regs + S3C2410_ADCDAT0); - data1 = readl(adc->regs + S3C2410_ADCDAT1); - adc_dbg(adc, "read %d: 0x%04x, 0x%04x\n", client->nr_samples, data0, data1); - - client->nr_samples--; - - if (cpu == TYPE_ADCV1 || cpu == TYPE_ADCV11) { - data0 &= 0x3ff; - data1 &= 0x3ff; - } else { - /* S3C2416/S3C64XX/S5P ADC resolution is 12-bit */ - data0 &= 0xfff; - data1 &= 0xfff; - } - - if (client->convert_cb) - (client->convert_cb)(client, data0, data1, &client->nr_samples); - - if (client->nr_samples > 0) { - /* fire another conversion for this */ - - client->select_cb(client, 1); - s3c_adc_convert(adc); - } else { - spin_lock(&adc->lock); - (client->select_cb)(client, 0); - adc->cur = NULL; - - s3c_adc_try(adc); - spin_unlock(&adc->lock); - } - -exit: - if (cpu == TYPE_ADCV2 || cpu == TYPE_ADCV3) { - /* Clear ADC interrupt */ - writel(0, adc->regs + S3C64XX_ADCCLRINT); - } - return IRQ_HANDLED; -} - -static int s3c_adc_probe(struct platform_device *pdev) -{ - struct device *dev = &pdev->dev; - struct adc_device *adc; - struct resource *regs; - enum s3c_cpu_type cpu = platform_get_device_id(pdev)->driver_data; - int ret; - unsigned tmp; - - adc = devm_kzalloc(dev, sizeof(*adc), GFP_KERNEL); - if (!adc) - return -ENOMEM; - - spin_lock_init(&adc->lock); - - adc->pdev = pdev; - adc->prescale = S3C2410_ADCCON_PRSCVL(49); - - adc->vdd = devm_regulator_get(dev, "vdd"); - if (IS_ERR(adc->vdd)) { - dev_err(dev, "operating without regulator \"vdd\" .\n"); - return PTR_ERR(adc->vdd); - } - - adc->irq = platform_get_irq(pdev, 1); - if (adc->irq <= 0) { - dev_err(dev, "failed to get adc irq\n"); - return -ENOENT; - } - - ret = devm_request_irq(dev, adc->irq, s3c_adc_irq, 0, dev_name(dev), - adc); - if (ret < 0) { - dev_err(dev, "failed to attach adc irq\n"); - return ret; - } - - adc->clk = devm_clk_get(dev, "adc"); - if (IS_ERR(adc->clk)) { - dev_err(dev, "failed to get adc clock\n"); - return PTR_ERR(adc->clk); - } - - regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); - adc->regs = devm_ioremap_resource(dev, regs); - if (IS_ERR(adc->regs)) - return PTR_ERR(adc->regs); - - ret = regulator_enable(adc->vdd); - if (ret) - return ret; - - clk_prepare_enable(adc->clk); - - tmp = adc->prescale | S3C2410_ADCCON_PRSCEN; - - /* Enable 12-bit ADC resolution */ - if (cpu == TYPE_ADCV12) - tmp |= S3C2416_ADCCON_RESSEL; - if (cpu == TYPE_ADCV2 || cpu == TYPE_ADCV3) - tmp |= S3C64XX_ADCCON_RESSEL; - - writel(tmp, adc->regs + S3C2410_ADCCON); - - dev_info(dev, "attached adc driver\n"); - - platform_set_drvdata(pdev, adc); - adc_dev = adc; - - return 0; -} - -static int s3c_adc_remove(struct platform_device *pdev) -{ - struct adc_device *adc = platform_get_drvdata(pdev); - - clk_disable_unprepare(adc->clk); - regulator_disable(adc->vdd); - - return 0; -} - -#ifdef CONFIG_PM -static int s3c_adc_suspend(struct device *dev) -{ - struct adc_device *adc = dev_get_drvdata(dev); - unsigned long flags; - u32 con; - - spin_lock_irqsave(&adc->lock, flags); - - con = readl(adc->regs + S3C2410_ADCCON); - con |= S3C2410_ADCCON_STDBM; - writel(con, adc->regs + S3C2410_ADCCON); - - disable_irq(adc->irq); - spin_unlock_irqrestore(&adc->lock, flags); - clk_disable(adc->clk); - regulator_disable(adc->vdd); - - return 0; -} - -static int s3c_adc_resume(struct device *dev) -{ - struct platform_device *pdev = to_platform_device(dev); - struct adc_device *adc = platform_get_drvdata(pdev); - enum s3c_cpu_type cpu = platform_get_device_id(pdev)->driver_data; - int ret; - unsigned long tmp; - - ret = regulator_enable(adc->vdd); - if (ret) - return ret; - clk_enable(adc->clk); - enable_irq(adc->irq); - - tmp = adc->prescale | S3C2410_ADCCON_PRSCEN; - - /* Enable 12-bit ADC resolution */ - if (cpu == TYPE_ADCV12) - tmp |= S3C2416_ADCCON_RESSEL; - if (cpu == TYPE_ADCV2 || cpu == TYPE_ADCV3) - tmp |= S3C64XX_ADCCON_RESSEL; - - writel(tmp, adc->regs + S3C2410_ADCCON); - - return 0; -} - -#else -#define s3c_adc_suspend NULL -#define s3c_adc_resume NULL -#endif - -static const struct platform_device_id s3c_adc_driver_ids[] = { - { - .name = "s3c24xx-adc", - .driver_data = TYPE_ADCV1, - }, { - .name = "s3c2443-adc", - .driver_data = TYPE_ADCV11, - }, { - .name = "s3c2416-adc", - .driver_data = TYPE_ADCV12, - }, { - .name = "s3c64xx-adc", - .driver_data = TYPE_ADCV2, - }, { - .name = "samsung-adc-v3", - .driver_data = TYPE_ADCV3, - }, - { } -}; -MODULE_DEVICE_TABLE(platform, s3c_adc_driver_ids); - -static const struct dev_pm_ops adc_pm_ops = { - .suspend = s3c_adc_suspend, - .resume = s3c_adc_resume, -}; - -static struct platform_driver s3c_adc_driver = { - .id_table = s3c_adc_driver_ids, - .driver = { - .name = "s3c-adc", - .pm = &adc_pm_ops, - }, - .probe = s3c_adc_probe, - .remove = s3c_adc_remove, -}; - -static int __init adc_init(void) -{ - int ret; - - ret = platform_driver_register(&s3c_adc_driver); - if (ret) - printk(KERN_ERR "%s: failed to add adc driver\n", __func__); - - return ret; -} - -module_init(adc_init); diff --git a/arch/arm/plat-samsung/cpu.c b/arch/arm/plat-samsung/cpu.c deleted file mode 100644 index e1ba88ba31d8..000000000000 --- a/arch/arm/plat-samsung/cpu.c +++ /dev/null @@ -1,48 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2009-2011 Samsung Electronics Co., Ltd. -// http://www.samsung.com -// -// Samsung CPU Support - -#include <linux/module.h> -#include <linux/kernel.h> -#include <linux/init.h> -#include <linux/io.h> - -#include <plat/map-base.h> -#include <plat/cpu.h> - -unsigned long samsung_cpu_id; -static unsigned int samsung_cpu_rev; - -unsigned int samsung_rev(void) -{ - return samsung_cpu_rev; -} -EXPORT_SYMBOL(samsung_rev); - -void __init s3c64xx_init_cpu(void) -{ - samsung_cpu_id = readl_relaxed(S3C_VA_SYS + 0x118); - if (!samsung_cpu_id) { - /* - * S3C6400 has the ID register in a different place, - * and needs a write before it can be read. - */ - writel_relaxed(0x0, S3C_VA_SYS + 0xA1C); - samsung_cpu_id = readl_relaxed(S3C_VA_SYS + 0xA1C); - } - - samsung_cpu_rev = 0; - - pr_info("Samsung CPU ID: 0x%08lx\n", samsung_cpu_id); -} - -void __init s5p_init_cpu(const void __iomem *cpuid_addr) -{ - samsung_cpu_id = readl_relaxed(cpuid_addr); - samsung_cpu_rev = samsung_cpu_id & 0xFF; - - pr_info("Samsung CPU ID: 0x%08lx\n", samsung_cpu_id); -} diff --git a/arch/arm/plat-samsung/dev-uart.c b/arch/arm/plat-samsung/dev-uart.c deleted file mode 100644 index 7476a5dbae77..000000000000 --- a/arch/arm/plat-samsung/dev-uart.c +++ /dev/null @@ -1,41 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// originally from arch/arm/plat-s3c24xx/devs.c -// -// Copyright (c) 2004 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// -// Base S3C24XX platform device definitions - -#include <linux/kernel.h> -#include <linux/platform_device.h> - -#include <plat/devs.h> - -/* uart devices */ - -static struct platform_device s3c24xx_uart_device0 = { - .id = 0, -}; - -static struct platform_device s3c24xx_uart_device1 = { - .id = 1, -}; - -static struct platform_device s3c24xx_uart_device2 = { - .id = 2, -}; - -static struct platform_device s3c24xx_uart_device3 = { - .id = 3, -}; - -struct platform_device *s3c24xx_uart_src[4] = { - &s3c24xx_uart_device0, - &s3c24xx_uart_device1, - &s3c24xx_uart_device2, - &s3c24xx_uart_device3, -}; - -struct platform_device *s3c24xx_uart_devs[4] = { -}; diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c deleted file mode 100644 index 1602f6dc900b..000000000000 --- a/arch/arm/plat-samsung/devs.c +++ /dev/null @@ -1,1166 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2011 Samsung Electronics Co., Ltd. -// http://www.samsung.com -// -// Base SAMSUNG platform device definitions - -#include <linux/kernel.h> -#include <linux/types.h> -#include <linux/interrupt.h> -#include <linux/list.h> -#include <linux/timer.h> -#include <linux/init.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/platform_device.h> -#include <linux/io.h> -#include <linux/slab.h> -#include <linux/string.h> -#include <linux/dma-mapping.h> -#include <linux/fb.h> -#include <linux/gfp.h> -#include <linux/mtd/mtd.h> -#include <linux/mtd/onenand.h> -#include <linux/mtd/partitions.h> -#include <linux/mmc/host.h> -#include <linux/ioport.h> -#include <linux/sizes.h> -#include <linux/platform_data/s3c-hsudc.h> -#include <linux/platform_data/s3c-hsotg.h> -#include <linux/platform_data/dma-s3c24xx.h> - -#include <linux/platform_data/media/s5p_hdmi.h> - -#include <asm/irq.h> -#include <asm/mach/arch.h> -#include <asm/mach/map.h> -#include <asm/mach/irq.h> - -#include <mach/dma.h> -#include <mach/irqs.h> -#include <mach/map.h> - -#include <plat/cpu.h> -#include <plat/devs.h> -#include <plat/adc.h> -#include <linux/platform_data/ata-samsung_cf.h> -#include <plat/fb.h> -#include <plat/fb-s3c2410.h> -#include <linux/platform_data/hwmon-s3c.h> -#include <linux/platform_data/i2c-s3c2410.h> -#include <plat/keypad.h> -#include <linux/platform_data/mmc-s3cmci.h> -#include <linux/platform_data/mtd-nand-s3c2410.h> -#include <plat/pwm-core.h> -#include <plat/sdhci.h> -#include <linux/platform_data/touchscreen-s3c2410.h> -#include <linux/platform_data/usb-s3c2410_udc.h> -#include <linux/platform_data/usb-ohci-s3c2410.h> -#include <plat/usb-phy.h> -#include <plat/regs-spi.h> -#include <linux/platform_data/asoc-s3c.h> -#include <linux/platform_data/spi-s3c64xx.h> - -#define samsung_device_dma_mask (*((u64[]) { DMA_BIT_MASK(32) })) - -/* AC97 */ -#ifdef CONFIG_CPU_S3C2440 -static struct resource s3c_ac97_resource[] = { - [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97), - [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97), -}; - -struct platform_device s3c_device_ac97 = { - .name = "samsung-ac97", - .id = -1, - .num_resources = ARRAY_SIZE(s3c_ac97_resource), - .resource = s3c_ac97_resource, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - } -}; -#endif /* CONFIG_CPU_S3C2440 */ - -/* ADC */ - -#ifdef CONFIG_PLAT_S3C24XX -static struct resource s3c_adc_resource[] = { - [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC), - [1] = DEFINE_RES_IRQ(IRQ_TC), - [2] = DEFINE_RES_IRQ(IRQ_ADC), -}; - -struct platform_device s3c_device_adc = { - .name = "s3c24xx-adc", - .id = -1, - .num_resources = ARRAY_SIZE(s3c_adc_resource), - .resource = s3c_adc_resource, -}; -#endif /* CONFIG_PLAT_S3C24XX */ - -#if defined(CONFIG_SAMSUNG_DEV_ADC) -static struct resource s3c_adc_resource[] = { - [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256), - [1] = DEFINE_RES_IRQ(IRQ_ADC), - [2] = DEFINE_RES_IRQ(IRQ_TC), -}; - -struct platform_device s3c_device_adc = { - .name = "exynos-adc", - .id = -1, - .num_resources = ARRAY_SIZE(s3c_adc_resource), - .resource = s3c_adc_resource, -}; -#endif /* CONFIG_SAMSUNG_DEV_ADC */ - -/* Camif Controller */ - -#ifdef CONFIG_CPU_S3C2440 -static struct resource s3c_camif_resource[] = { - [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF), - [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C), - [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P), -}; - -struct platform_device s3c_device_camif = { - .name = "s3c2440-camif", - .id = -1, - .num_resources = ARRAY_SIZE(s3c_camif_resource), - .resource = s3c_camif_resource, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - } -}; -#endif /* CONFIG_CPU_S3C2440 */ - -/* FB */ - -#ifdef CONFIG_S3C_DEV_FB -static struct resource s3c_fb_resource[] = { - [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K), - [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC), - [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO), - [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM), -}; - -struct platform_device s3c_device_fb = { - .name = "s3c-fb", - .id = -1, - .num_resources = ARRAY_SIZE(s3c_fb_resource), - .resource = s3c_fb_resource, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; - -void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd) -{ - s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata), - &s3c_device_fb); -} -#endif /* CONFIG_S3C_DEV_FB */ - -/* HWMON */ - -#ifdef CONFIG_S3C_DEV_HWMON -struct platform_device s3c_device_hwmon = { - .name = "s3c-hwmon", - .id = -1, - .dev.parent = &s3c_device_adc.dev, -}; - -void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd) -{ - s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata), - &s3c_device_hwmon); -} -#endif /* CONFIG_S3C_DEV_HWMON */ - -/* HSMMC */ - -#ifdef CONFIG_S3C_DEV_HSMMC -static struct resource s3c_hsmmc_resource[] = { - [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K), - [1] = DEFINE_RES_IRQ(IRQ_HSMMC0), -}; - -struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = { - .max_width = 4, - .host_caps = (MMC_CAP_4_BIT_DATA | - MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), -}; - -struct platform_device s3c_device_hsmmc0 = { - .name = "s3c-sdhci", - .id = 0, - .num_resources = ARRAY_SIZE(s3c_hsmmc_resource), - .resource = s3c_hsmmc_resource, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &s3c_hsmmc0_def_platdata, - }, -}; - -void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd) -{ - s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata); -} -#endif /* CONFIG_S3C_DEV_HSMMC */ - -#ifdef CONFIG_S3C_DEV_HSMMC1 -static struct resource s3c_hsmmc1_resource[] = { - [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K), - [1] = DEFINE_RES_IRQ(IRQ_HSMMC1), -}; - -struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = { - .max_width = 4, - .host_caps = (MMC_CAP_4_BIT_DATA | - MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), -}; - -struct platform_device s3c_device_hsmmc1 = { - .name = "s3c-sdhci", - .id = 1, - .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource), - .resource = s3c_hsmmc1_resource, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &s3c_hsmmc1_def_platdata, - }, -}; - -void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd) -{ - s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata); -} -#endif /* CONFIG_S3C_DEV_HSMMC1 */ - -/* HSMMC2 */ - -#ifdef CONFIG_S3C_DEV_HSMMC2 -static struct resource s3c_hsmmc2_resource[] = { - [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K), - [1] = DEFINE_RES_IRQ(IRQ_HSMMC2), -}; - -struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = { - .max_width = 4, - .host_caps = (MMC_CAP_4_BIT_DATA | - MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), -}; - -struct platform_device s3c_device_hsmmc2 = { - .name = "s3c-sdhci", - .id = 2, - .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource), - .resource = s3c_hsmmc2_resource, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &s3c_hsmmc2_def_platdata, - }, -}; - -void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd) -{ - s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata); -} -#endif /* CONFIG_S3C_DEV_HSMMC2 */ - -#ifdef CONFIG_S3C_DEV_HSMMC3 -static struct resource s3c_hsmmc3_resource[] = { - [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K), - [1] = DEFINE_RES_IRQ(IRQ_HSMMC3), -}; - -struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = { - .max_width = 4, - .host_caps = (MMC_CAP_4_BIT_DATA | - MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED), -}; - -struct platform_device s3c_device_hsmmc3 = { - .name = "s3c-sdhci", - .id = 3, - .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource), - .resource = s3c_hsmmc3_resource, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - .platform_data = &s3c_hsmmc3_def_platdata, - }, -}; - -void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd) -{ - s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata); -} -#endif /* CONFIG_S3C_DEV_HSMMC3 */ - -/* I2C */ - -static struct resource s3c_i2c0_resource[] = { - [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K), - [1] = DEFINE_RES_IRQ(IRQ_IIC), -}; - -struct platform_device s3c_device_i2c0 = { - .name = "s3c2410-i2c", - .id = 0, - .num_resources = ARRAY_SIZE(s3c_i2c0_resource), - .resource = s3c_i2c0_resource, -}; - -struct s3c2410_platform_i2c default_i2c_data __initdata = { - .flags = 0, - .slave_addr = 0x10, - .frequency = 100*1000, - .sda_delay = 100, -}; - -void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd) -{ - struct s3c2410_platform_i2c *npd; - - if (!pd) { - pd = &default_i2c_data; - pd->bus_num = 0; - } - - npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c0); - - if (!npd->cfg_gpio) - npd->cfg_gpio = s3c_i2c0_cfg_gpio; -} - -#ifdef CONFIG_S3C_DEV_I2C1 -static struct resource s3c_i2c1_resource[] = { - [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K), - [1] = DEFINE_RES_IRQ(IRQ_IIC1), -}; - -struct platform_device s3c_device_i2c1 = { - .name = "s3c2410-i2c", - .id = 1, - .num_resources = ARRAY_SIZE(s3c_i2c1_resource), - .resource = s3c_i2c1_resource, -}; - -void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd) -{ - struct s3c2410_platform_i2c *npd; - - if (!pd) { - pd = &default_i2c_data; - pd->bus_num = 1; - } - - npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c1); - - if (!npd->cfg_gpio) - npd->cfg_gpio = s3c_i2c1_cfg_gpio; -} -#endif /* CONFIG_S3C_DEV_I2C1 */ - -#ifdef CONFIG_S3C_DEV_I2C2 -static struct resource s3c_i2c2_resource[] = { - [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K), - [1] = DEFINE_RES_IRQ(IRQ_IIC2), -}; - -struct platform_device s3c_device_i2c2 = { - .name = "s3c2410-i2c", - .id = 2, - .num_resources = ARRAY_SIZE(s3c_i2c2_resource), - .resource = s3c_i2c2_resource, -}; - -void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd) -{ - struct s3c2410_platform_i2c *npd; - - if (!pd) { - pd = &default_i2c_data; - pd->bus_num = 2; - } - - npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c2); - - if (!npd->cfg_gpio) - npd->cfg_gpio = s3c_i2c2_cfg_gpio; -} -#endif /* CONFIG_S3C_DEV_I2C2 */ - -#ifdef CONFIG_S3C_DEV_I2C3 -static struct resource s3c_i2c3_resource[] = { - [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K), - [1] = DEFINE_RES_IRQ(IRQ_IIC3), -}; - -struct platform_device s3c_device_i2c3 = { - .name = "s3c2440-i2c", - .id = 3, - .num_resources = ARRAY_SIZE(s3c_i2c3_resource), - .resource = s3c_i2c3_resource, -}; - -void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd) -{ - struct s3c2410_platform_i2c *npd; - - if (!pd) { - pd = &default_i2c_data; - pd->bus_num = 3; - } - - npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c3); - - if (!npd->cfg_gpio) - npd->cfg_gpio = s3c_i2c3_cfg_gpio; -} -#endif /*CONFIG_S3C_DEV_I2C3 */ - -#ifdef CONFIG_S3C_DEV_I2C4 -static struct resource s3c_i2c4_resource[] = { - [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K), - [1] = DEFINE_RES_IRQ(IRQ_IIC4), -}; - -struct platform_device s3c_device_i2c4 = { - .name = "s3c2440-i2c", - .id = 4, - .num_resources = ARRAY_SIZE(s3c_i2c4_resource), - .resource = s3c_i2c4_resource, -}; - -void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd) -{ - struct s3c2410_platform_i2c *npd; - - if (!pd) { - pd = &default_i2c_data; - pd->bus_num = 4; - } - - npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c4); - - if (!npd->cfg_gpio) - npd->cfg_gpio = s3c_i2c4_cfg_gpio; -} -#endif /*CONFIG_S3C_DEV_I2C4 */ - -#ifdef CONFIG_S3C_DEV_I2C5 -static struct resource s3c_i2c5_resource[] = { - [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K), - [1] = DEFINE_RES_IRQ(IRQ_IIC5), -}; - -struct platform_device s3c_device_i2c5 = { - .name = "s3c2440-i2c", - .id = 5, - .num_resources = ARRAY_SIZE(s3c_i2c5_resource), - .resource = s3c_i2c5_resource, -}; - -void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd) -{ - struct s3c2410_platform_i2c *npd; - - if (!pd) { - pd = &default_i2c_data; - pd->bus_num = 5; - } - - npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c5); - - if (!npd->cfg_gpio) - npd->cfg_gpio = s3c_i2c5_cfg_gpio; -} -#endif /*CONFIG_S3C_DEV_I2C5 */ - -#ifdef CONFIG_S3C_DEV_I2C6 -static struct resource s3c_i2c6_resource[] = { - [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K), - [1] = DEFINE_RES_IRQ(IRQ_IIC6), -}; - -struct platform_device s3c_device_i2c6 = { - .name = "s3c2440-i2c", - .id = 6, - .num_resources = ARRAY_SIZE(s3c_i2c6_resource), - .resource = s3c_i2c6_resource, -}; - -void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd) -{ - struct s3c2410_platform_i2c *npd; - - if (!pd) { - pd = &default_i2c_data; - pd->bus_num = 6; - } - - npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c6); - - if (!npd->cfg_gpio) - npd->cfg_gpio = s3c_i2c6_cfg_gpio; -} -#endif /* CONFIG_S3C_DEV_I2C6 */ - -#ifdef CONFIG_S3C_DEV_I2C7 -static struct resource s3c_i2c7_resource[] = { - [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K), - [1] = DEFINE_RES_IRQ(IRQ_IIC7), -}; - -struct platform_device s3c_device_i2c7 = { - .name = "s3c2440-i2c", - .id = 7, - .num_resources = ARRAY_SIZE(s3c_i2c7_resource), - .resource = s3c_i2c7_resource, -}; - -void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd) -{ - struct s3c2410_platform_i2c *npd; - - if (!pd) { - pd = &default_i2c_data; - pd->bus_num = 7; - } - - npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_i2c7); - - if (!npd->cfg_gpio) - npd->cfg_gpio = s3c_i2c7_cfg_gpio; -} -#endif /* CONFIG_S3C_DEV_I2C7 */ - -/* I2S */ - -#ifdef CONFIG_PLAT_S3C24XX -static struct resource s3c_iis_resource[] = { - [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS), -}; - -struct platform_device s3c_device_iis = { - .name = "s3c24xx-iis", - .id = -1, - .num_resources = ARRAY_SIZE(s3c_iis_resource), - .resource = s3c_iis_resource, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - } -}; -#endif /* CONFIG_PLAT_S3C24XX */ - -/* IDE CFCON */ - -#ifdef CONFIG_SAMSUNG_DEV_IDE -static struct resource s3c_cfcon_resource[] = { - [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K), - [1] = DEFINE_RES_IRQ(IRQ_CFCON), -}; - -struct platform_device s3c_device_cfcon = { - .id = 0, - .num_resources = ARRAY_SIZE(s3c_cfcon_resource), - .resource = s3c_cfcon_resource, -}; - -void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata) -{ - s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata), - &s3c_device_cfcon); -} -#endif /* CONFIG_SAMSUNG_DEV_IDE */ - -/* KEYPAD */ - -#ifdef CONFIG_SAMSUNG_DEV_KEYPAD -static struct resource samsung_keypad_resources[] = { - [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32), - [1] = DEFINE_RES_IRQ(IRQ_KEYPAD), -}; - -struct platform_device samsung_device_keypad = { - .name = "samsung-keypad", - .id = -1, - .num_resources = ARRAY_SIZE(samsung_keypad_resources), - .resource = samsung_keypad_resources, -}; - -void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd) -{ - struct samsung_keypad_platdata *npd; - - npd = s3c_set_platdata(pd, sizeof(*npd), &samsung_device_keypad); - - if (!npd->cfg_gpio) - npd->cfg_gpio = samsung_keypad_cfg_gpio; -} -#endif /* CONFIG_SAMSUNG_DEV_KEYPAD */ - -/* LCD Controller */ - -#ifdef CONFIG_PLAT_S3C24XX -static struct resource s3c_lcd_resource[] = { - [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD), - [1] = DEFINE_RES_IRQ(IRQ_LCD), -}; - -struct platform_device s3c_device_lcd = { - .name = "s3c2410-lcd", - .id = -1, - .num_resources = ARRAY_SIZE(s3c_lcd_resource), - .resource = s3c_lcd_resource, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - } -}; - -void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd) -{ - struct s3c2410fb_mach_info *npd; - - npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd); - if (npd) { - npd->displays = kmemdup(pd->displays, - sizeof(struct s3c2410fb_display) * npd->num_displays, - GFP_KERNEL); - if (!npd->displays) - printk(KERN_ERR "no memory for LCD display data\n"); - } else { - printk(KERN_ERR "no memory for LCD platform data\n"); - } -} -#endif /* CONFIG_PLAT_S3C24XX */ - -/* NAND */ - -#ifdef CONFIG_S3C_DEV_NAND -static struct resource s3c_nand_resource[] = { - [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M), -}; - -struct platform_device s3c_device_nand = { - .name = "s3c2410-nand", - .id = -1, - .num_resources = ARRAY_SIZE(s3c_nand_resource), - .resource = s3c_nand_resource, -}; - -/* - * s3c_nand_copy_set() - copy nand set data - * @set: The new structure, directly copied from the old. - * - * Copy all the fields from the NAND set field from what is probably __initdata - * to new kernel memory. The code returns 0 if the copy happened correctly or - * an error code for the calling function to display. - * - * Note, we currently do not try and look to see if we've already copied the - * data in a previous set. - */ -static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set) -{ - void *ptr; - int size; - - size = sizeof(struct mtd_partition) * set->nr_partitions; - if (size) { - ptr = kmemdup(set->partitions, size, GFP_KERNEL); - set->partitions = ptr; - - if (!ptr) - return -ENOMEM; - } - - if (set->nr_map && set->nr_chips) { - size = sizeof(int) * set->nr_chips; - ptr = kmemdup(set->nr_map, size, GFP_KERNEL); - set->nr_map = ptr; - - if (!ptr) - return -ENOMEM; - } - - return 0; -} - -void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand) -{ - struct s3c2410_platform_nand *npd; - int size; - int ret; - - /* note, if we get a failure in allocation, we simply drop out of the - * function. If there is so little memory available at initialisation - * time then there is little chance the system is going to run. - */ - - npd = s3c_set_platdata(nand, sizeof(*npd), &s3c_device_nand); - if (!npd) - return; - - /* now see if we need to copy any of the nand set data */ - - size = sizeof(struct s3c2410_nand_set) * npd->nr_sets; - if (size) { - struct s3c2410_nand_set *from = npd->sets; - struct s3c2410_nand_set *to; - int i; - - to = kmemdup(from, size, GFP_KERNEL); - npd->sets = to; /* set, even if we failed */ - - if (!to) { - printk(KERN_ERR "%s: no memory for sets\n", __func__); - return; - } - - for (i = 0; i < npd->nr_sets; i++) { - ret = s3c_nand_copy_set(to); - if (ret) { - printk(KERN_ERR "%s: failed to copy set %d\n", - __func__, i); - return; - } - to++; - } - } -} -#endif /* CONFIG_S3C_DEV_NAND */ - -/* ONENAND */ - -#ifdef CONFIG_S3C_DEV_ONENAND -static struct resource s3c_onenand_resources[] = { - [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K), - [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF), - [2] = DEFINE_RES_IRQ(IRQ_ONENAND), -}; - -struct platform_device s3c_device_onenand = { - .name = "samsung-onenand", - .id = 0, - .num_resources = ARRAY_SIZE(s3c_onenand_resources), - .resource = s3c_onenand_resources, -}; -#endif /* CONFIG_S3C_DEV_ONENAND */ - -#ifdef CONFIG_S3C64XX_DEV_ONENAND1 -static struct resource s3c64xx_onenand1_resources[] = { - [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K), - [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF), - [2] = DEFINE_RES_IRQ(IRQ_ONENAND1), -}; - -struct platform_device s3c64xx_device_onenand1 = { - .name = "samsung-onenand", - .id = 1, - .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources), - .resource = s3c64xx_onenand1_resources, -}; - -void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata) -{ - s3c_set_platdata(pdata, sizeof(struct onenand_platform_data), - &s3c64xx_device_onenand1); -} -#endif /* CONFIG_S3C64XX_DEV_ONENAND1 */ - -/* PWM Timer */ - -#ifdef CONFIG_SAMSUNG_DEV_PWM -static struct resource samsung_pwm_resource[] = { - DEFINE_RES_MEM(SAMSUNG_PA_TIMER, SZ_4K), -}; - -struct platform_device samsung_device_pwm = { - .name = "samsung-pwm", - .id = -1, - .num_resources = ARRAY_SIZE(samsung_pwm_resource), - .resource = samsung_pwm_resource, -}; - -void __init samsung_pwm_set_platdata(struct samsung_pwm_variant *pd) -{ - samsung_device_pwm.dev.platform_data = pd; -} -#endif /* CONFIG_SAMSUNG_DEV_PWM */ - -/* RTC */ - -#ifdef CONFIG_PLAT_S3C24XX -static struct resource s3c_rtc_resource[] = { - [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256), - [1] = DEFINE_RES_IRQ(IRQ_RTC), - [2] = DEFINE_RES_IRQ(IRQ_TICK), -}; - -struct platform_device s3c_device_rtc = { - .name = "s3c2410-rtc", - .id = -1, - .num_resources = ARRAY_SIZE(s3c_rtc_resource), - .resource = s3c_rtc_resource, -}; -#endif /* CONFIG_PLAT_S3C24XX */ - -#ifdef CONFIG_S3C_DEV_RTC -static struct resource s3c_rtc_resource[] = { - [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256), - [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM), - [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC), -}; - -struct platform_device s3c_device_rtc = { - .name = "s3c64xx-rtc", - .id = -1, - .num_resources = ARRAY_SIZE(s3c_rtc_resource), - .resource = s3c_rtc_resource, -}; -#endif /* CONFIG_S3C_DEV_RTC */ - -/* SDI */ - -#ifdef CONFIG_PLAT_S3C24XX -static struct resource s3c_sdi_resource[] = { - [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI), - [1] = DEFINE_RES_IRQ(IRQ_SDI), -}; - -struct platform_device s3c_device_sdi = { - .name = "s3c2410-sdi", - .id = -1, - .num_resources = ARRAY_SIZE(s3c_sdi_resource), - .resource = s3c_sdi_resource, -}; - -void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata) -{ - s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata), - &s3c_device_sdi); -} -#endif /* CONFIG_PLAT_S3C24XX */ - -/* SPI */ - -#ifdef CONFIG_PLAT_S3C24XX -static struct resource s3c_spi0_resource[] = { - [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32), - [1] = DEFINE_RES_IRQ(IRQ_SPI0), -}; - -struct platform_device s3c_device_spi0 = { - .name = "s3c2410-spi", - .id = 0, - .num_resources = ARRAY_SIZE(s3c_spi0_resource), - .resource = s3c_spi0_resource, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - } -}; - -static struct resource s3c_spi1_resource[] = { - [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32), - [1] = DEFINE_RES_IRQ(IRQ_SPI1), -}; - -struct platform_device s3c_device_spi1 = { - .name = "s3c2410-spi", - .id = 1, - .num_resources = ARRAY_SIZE(s3c_spi1_resource), - .resource = s3c_spi1_resource, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - } -}; -#endif /* CONFIG_PLAT_S3C24XX */ - -/* Touchscreen */ - -#ifdef CONFIG_PLAT_S3C24XX -static struct resource s3c_ts_resource[] = { - [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC), - [1] = DEFINE_RES_IRQ(IRQ_TC), -}; - -struct platform_device s3c_device_ts = { - .name = "s3c2410-ts", - .id = -1, - .dev.parent = &s3c_device_adc.dev, - .num_resources = ARRAY_SIZE(s3c_ts_resource), - .resource = s3c_ts_resource, -}; - -void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info) -{ - s3c_set_platdata(hard_s3c2410ts_info, - sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts); -} -#endif /* CONFIG_PLAT_S3C24XX */ - -#ifdef CONFIG_SAMSUNG_DEV_TS -static struct s3c2410_ts_mach_info default_ts_data __initdata = { - .delay = 10000, - .presc = 49, - .oversampling_shift = 2, -}; - -void __init s3c64xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd) -{ - if (!pd) - pd = &default_ts_data; - - s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info), - &s3c_device_adc); -} -#endif /* CONFIG_SAMSUNG_DEV_TS */ - -/* USB */ - -#ifdef CONFIG_S3C_DEV_USB_HOST -static struct resource s3c_usb_resource[] = { - [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256), - [1] = DEFINE_RES_IRQ(IRQ_USBH), -}; - -struct platform_device s3c_device_ohci = { - .name = "s3c2410-ohci", - .id = -1, - .num_resources = ARRAY_SIZE(s3c_usb_resource), - .resource = s3c_usb_resource, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - } -}; - -/* - * s3c_ohci_set_platdata - initialise OHCI device platform data - * @info: The platform data. - * - * This call copies the @info passed in and sets the device .platform_data - * field to that copy. The @info is copied so that the original can be marked - * __initdata. - */ - -void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info) -{ - s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info), - &s3c_device_ohci); -} -#endif /* CONFIG_S3C_DEV_USB_HOST */ - -/* USB Device (Gadget) */ - -#ifdef CONFIG_PLAT_S3C24XX -static struct resource s3c_usbgadget_resource[] = { - [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV), - [1] = DEFINE_RES_IRQ(IRQ_USBD), -}; - -struct platform_device s3c_device_usbgadget = { - .name = "s3c2410-usbgadget", - .id = -1, - .num_resources = ARRAY_SIZE(s3c_usbgadget_resource), - .resource = s3c_usbgadget_resource, -}; - -void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd) -{ - s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget); -} -#endif /* CONFIG_PLAT_S3C24XX */ - -/* USB HSOTG */ - -#ifdef CONFIG_S3C_DEV_USB_HSOTG -static struct resource s3c_usb_hsotg_resources[] = { - [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K), - [1] = DEFINE_RES_IRQ(IRQ_OTG), -}; - -struct platform_device s3c_device_usb_hsotg = { - .name = "s3c-hsotg", - .id = -1, - .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources), - .resource = s3c_usb_hsotg_resources, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; - -void __init dwc2_hsotg_set_platdata(struct dwc2_hsotg_plat *pd) -{ - struct dwc2_hsotg_plat *npd; - - npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_usb_hsotg); - - if (!npd->phy_init) - npd->phy_init = s3c_usb_phy_init; - if (!npd->phy_exit) - npd->phy_exit = s3c_usb_phy_exit; -} -#endif /* CONFIG_S3C_DEV_USB_HSOTG */ - -/* USB High Spped 2.0 Device (Gadget) */ - -#ifdef CONFIG_PLAT_S3C24XX -static struct resource s3c_hsudc_resource[] = { - [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC), - [1] = DEFINE_RES_IRQ(IRQ_USBD), -}; - -struct platform_device s3c_device_usb_hsudc = { - .name = "s3c-hsudc", - .id = -1, - .num_resources = ARRAY_SIZE(s3c_hsudc_resource), - .resource = s3c_hsudc_resource, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; - -void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd) -{ - s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc); -} -#endif /* CONFIG_PLAT_S3C24XX */ - -/* WDT */ - -#ifdef CONFIG_S3C_DEV_WDT -static struct resource s3c_wdt_resource[] = { - [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K), - [1] = DEFINE_RES_IRQ(IRQ_WDT), -}; - -struct platform_device s3c_device_wdt = { - .name = "s3c2410-wdt", - .id = -1, - .num_resources = ARRAY_SIZE(s3c_wdt_resource), - .resource = s3c_wdt_resource, -}; -#endif /* CONFIG_S3C_DEV_WDT */ - -#ifdef CONFIG_S3C64XX_DEV_SPI0 -static struct resource s3c64xx_spi0_resource[] = { - [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256), - [1] = DEFINE_RES_IRQ(IRQ_SPI0), -}; - -struct platform_device s3c64xx_device_spi0 = { - .name = "s3c6410-spi", - .id = 0, - .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource), - .resource = s3c64xx_spi0_resource, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; - -void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, - int num_cs) -{ - struct s3c64xx_spi_info pd; - - /* Reject invalid configuration */ - if (!num_cs || src_clk_nr < 0) { - pr_err("%s: Invalid SPI configuration\n", __func__); - return; - } - - pd.num_cs = num_cs; - pd.src_clk_nr = src_clk_nr; - pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio; - - s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0); -} -#endif /* CONFIG_S3C64XX_DEV_SPI0 */ - -#ifdef CONFIG_S3C64XX_DEV_SPI1 -static struct resource s3c64xx_spi1_resource[] = { - [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256), - [1] = DEFINE_RES_IRQ(IRQ_SPI1), -}; - -struct platform_device s3c64xx_device_spi1 = { - .name = "s3c6410-spi", - .id = 1, - .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource), - .resource = s3c64xx_spi1_resource, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; - -void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, - int num_cs) -{ - struct s3c64xx_spi_info pd; - - /* Reject invalid configuration */ - if (!num_cs || src_clk_nr < 0) { - pr_err("%s: Invalid SPI configuration\n", __func__); - return; - } - - pd.num_cs = num_cs; - pd.src_clk_nr = src_clk_nr; - pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio; - - s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1); -} -#endif /* CONFIG_S3C64XX_DEV_SPI1 */ - -#ifdef CONFIG_S3C64XX_DEV_SPI2 -static struct resource s3c64xx_spi2_resource[] = { - [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256), - [1] = DEFINE_RES_IRQ(IRQ_SPI2), -}; - -struct platform_device s3c64xx_device_spi2 = { - .name = "s3c6410-spi", - .id = 2, - .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource), - .resource = s3c64xx_spi2_resource, - .dev = { - .dma_mask = &samsung_device_dma_mask, - .coherent_dma_mask = DMA_BIT_MASK(32), - }, -}; - -void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr, - int num_cs) -{ - struct s3c64xx_spi_info pd; - - /* Reject invalid configuration */ - if (!num_cs || src_clk_nr < 0) { - pr_err("%s: Invalid SPI configuration\n", __func__); - return; - } - - pd.num_cs = num_cs; - pd.src_clk_nr = src_clk_nr; - pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio; - - s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2); -} -#endif /* CONFIG_S3C64XX_DEV_SPI2 */ diff --git a/arch/arm/plat-samsung/gpio-samsung.c b/arch/arm/plat-samsung/gpio-samsung.c deleted file mode 100644 index f66c820cd82b..000000000000 --- a/arch/arm/plat-samsung/gpio-samsung.c +++ /dev/null @@ -1,1324 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2009-2011 Samsung Electronics Co., Ltd. -// http://www.samsung.com/ -// -// Copyright 2008 Openmoko, Inc. -// Copyright 2008 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// http://armlinux.simtec.co.uk/ -// -// SAMSUNG - GPIOlib support - -#include <linux/kernel.h> -#include <linux/irq.h> -#include <linux/io.h> -#include <linux/gpio.h> -#include <linux/init.h> -#include <linux/spinlock.h> -#include <linux/module.h> -#include <linux/interrupt.h> -#include <linux/device.h> -#include <linux/ioport.h> -#include <linux/of.h> -#include <linux/slab.h> -#include <linux/of_address.h> - -#include <asm/irq.h> - -#include <mach/irqs.h> -#include <mach/map.h> -#include <mach/regs-gpio.h> -#include <mach/gpio-samsung.h> - -#include <plat/cpu.h> -#include <plat/gpio-core.h> -#include <plat/gpio-cfg.h> -#include <plat/gpio-cfg-helpers.h> -#include <plat/pm.h> - -int samsung_gpio_setpull_updown(struct samsung_gpio_chip *chip, - unsigned int off, samsung_gpio_pull_t pull) -{ - void __iomem *reg = chip->base + 0x08; - int shift = off * 2; - u32 pup; - - pup = __raw_readl(reg); - pup &= ~(3 << shift); - pup |= pull << shift; - __raw_writel(pup, reg); - - return 0; -} - -samsung_gpio_pull_t samsung_gpio_getpull_updown(struct samsung_gpio_chip *chip, - unsigned int off) -{ - void __iomem *reg = chip->base + 0x08; - int shift = off * 2; - u32 pup = __raw_readl(reg); - - pup >>= shift; - pup &= 0x3; - - return (__force samsung_gpio_pull_t)pup; -} - -int s3c2443_gpio_setpull(struct samsung_gpio_chip *chip, - unsigned int off, samsung_gpio_pull_t pull) -{ - switch (pull) { - case S3C_GPIO_PULL_NONE: - pull = 0x01; - break; - case S3C_GPIO_PULL_UP: - pull = 0x00; - break; - case S3C_GPIO_PULL_DOWN: - pull = 0x02; - break; - } - return samsung_gpio_setpull_updown(chip, off, pull); -} - -samsung_gpio_pull_t s3c2443_gpio_getpull(struct samsung_gpio_chip *chip, - unsigned int off) -{ - samsung_gpio_pull_t pull; - - pull = samsung_gpio_getpull_updown(chip, off); - - switch (pull) { - case 0x00: - pull = S3C_GPIO_PULL_UP; - break; - case 0x01: - case 0x03: - pull = S3C_GPIO_PULL_NONE; - break; - case 0x02: - pull = S3C_GPIO_PULL_DOWN; - break; - } - - return pull; -} - -static int s3c24xx_gpio_setpull_1(struct samsung_gpio_chip *chip, - unsigned int off, samsung_gpio_pull_t pull, - samsung_gpio_pull_t updown) -{ - void __iomem *reg = chip->base + 0x08; - u32 pup = __raw_readl(reg); - - if (pull == updown) - pup &= ~(1 << off); - else if (pull == S3C_GPIO_PULL_NONE) - pup |= (1 << off); - else - return -EINVAL; - - __raw_writel(pup, reg); - return 0; -} - -static samsung_gpio_pull_t s3c24xx_gpio_getpull_1(struct samsung_gpio_chip *chip, - unsigned int off, - samsung_gpio_pull_t updown) -{ - void __iomem *reg = chip->base + 0x08; - u32 pup = __raw_readl(reg); - - pup &= (1 << off); - return pup ? S3C_GPIO_PULL_NONE : updown; -} - -samsung_gpio_pull_t s3c24xx_gpio_getpull_1up(struct samsung_gpio_chip *chip, - unsigned int off) -{ - return s3c24xx_gpio_getpull_1(chip, off, S3C_GPIO_PULL_UP); -} - -int s3c24xx_gpio_setpull_1up(struct samsung_gpio_chip *chip, - unsigned int off, samsung_gpio_pull_t pull) -{ - return s3c24xx_gpio_setpull_1(chip, off, pull, S3C_GPIO_PULL_UP); -} - -samsung_gpio_pull_t s3c24xx_gpio_getpull_1down(struct samsung_gpio_chip *chip, - unsigned int off) -{ - return s3c24xx_gpio_getpull_1(chip, off, S3C_GPIO_PULL_DOWN); -} - -int s3c24xx_gpio_setpull_1down(struct samsung_gpio_chip *chip, - unsigned int off, samsung_gpio_pull_t pull) -{ - return s3c24xx_gpio_setpull_1(chip, off, pull, S3C_GPIO_PULL_DOWN); -} - -/* - * samsung_gpio_setcfg_2bit - Samsung 2bit style GPIO configuration. - * @chip: The gpio chip that is being configured. - * @off: The offset for the GPIO being configured. - * @cfg: The configuration value to set. - * - * This helper deal with the GPIO cases where the control register - * has two bits of configuration per gpio, which have the following - * functions: - * 00 = input - * 01 = output - * 1x = special function - */ - -static int samsung_gpio_setcfg_2bit(struct samsung_gpio_chip *chip, - unsigned int off, unsigned int cfg) -{ - void __iomem *reg = chip->base; - unsigned int shift = off * 2; - u32 con; - - if (samsung_gpio_is_cfg_special(cfg)) { - cfg &= 0xf; - if (cfg > 3) - return -EINVAL; - - cfg <<= shift; - } - - con = __raw_readl(reg); - con &= ~(0x3 << shift); - con |= cfg; - __raw_writel(con, reg); - - return 0; -} - -/* - * samsung_gpio_getcfg_2bit - Samsung 2bit style GPIO configuration read. - * @chip: The gpio chip that is being configured. - * @off: The offset for the GPIO being configured. - * - * The reverse of samsung_gpio_setcfg_2bit(). Will return a value which - * could be directly passed back to samsung_gpio_setcfg_2bit(), from the - * S3C_GPIO_SPECIAL() macro. - */ - -static unsigned int samsung_gpio_getcfg_2bit(struct samsung_gpio_chip *chip, - unsigned int off) -{ - u32 con; - - con = __raw_readl(chip->base); - con >>= off * 2; - con &= 3; - - /* this conversion works for IN and OUT as well as special mode */ - return S3C_GPIO_SPECIAL(con); -} - -/* - * samsung_gpio_setcfg_4bit - Samsung 4bit single register GPIO config. - * @chip: The gpio chip that is being configured. - * @off: The offset for the GPIO being configured. - * @cfg: The configuration value to set. - * - * This helper deal with the GPIO cases where the control register has 4 bits - * of control per GPIO, generally in the form of: - * 0000 = Input - * 0001 = Output - * others = Special functions (dependent on bank) - * - * Note, since the code to deal with the case where there are two control - * registers instead of one, we do not have a separate set of functions for - * each case. - */ - -static int samsung_gpio_setcfg_4bit(struct samsung_gpio_chip *chip, - unsigned int off, unsigned int cfg) -{ - void __iomem *reg = chip->base; - unsigned int shift = (off & 7) * 4; - u32 con; - - if (off < 8 && chip->chip.ngpio > 8) - reg -= 4; - - if (samsung_gpio_is_cfg_special(cfg)) { - cfg &= 0xf; - cfg <<= shift; - } - - con = __raw_readl(reg); - con &= ~(0xf << shift); - con |= cfg; - __raw_writel(con, reg); - - return 0; -} - -/* - * samsung_gpio_getcfg_4bit - Samsung 4bit single register GPIO config read. - * @chip: The gpio chip that is being configured. - * @off: The offset for the GPIO being configured. - * - * The reverse of samsung_gpio_setcfg_4bit(), turning a gpio configuration - * register setting into a value the software can use, such as could be passed - * to samsung_gpio_setcfg_4bit(). - * - * @sa samsung_gpio_getcfg_2bit - */ - -static unsigned samsung_gpio_getcfg_4bit(struct samsung_gpio_chip *chip, - unsigned int off) -{ - void __iomem *reg = chip->base; - unsigned int shift = (off & 7) * 4; - u32 con; - - if (off < 8 && chip->chip.ngpio > 8) - reg -= 4; - - con = __raw_readl(reg); - con >>= shift; - con &= 0xf; - - /* this conversion works for IN and OUT as well as special mode */ - return S3C_GPIO_SPECIAL(con); -} - -#ifdef CONFIG_PLAT_S3C24XX -/* - * s3c24xx_gpio_setcfg_abank - S3C24XX style GPIO configuration (Bank A) - * @chip: The gpio chip that is being configured. - * @off: The offset for the GPIO being configured. - * @cfg: The configuration value to set. - * - * This helper deal with the GPIO cases where the control register - * has one bit of configuration for the gpio, where setting the bit - * means the pin is in special function mode and unset means output. - */ - -static int s3c24xx_gpio_setcfg_abank(struct samsung_gpio_chip *chip, - unsigned int off, unsigned int cfg) -{ - void __iomem *reg = chip->base; - unsigned int shift = off; - u32 con; - - if (samsung_gpio_is_cfg_special(cfg)) { - cfg &= 0xf; - - /* Map output to 0, and SFN2 to 1 */ - cfg -= 1; - if (cfg > 1) - return -EINVAL; - - cfg <<= shift; - } - - con = __raw_readl(reg); - con &= ~(0x1 << shift); - con |= cfg; - __raw_writel(con, reg); - - return 0; -} - -/* - * s3c24xx_gpio_getcfg_abank - S3C24XX style GPIO configuration read (Bank A) - * @chip: The gpio chip that is being configured. - * @off: The offset for the GPIO being configured. - * - * The reverse of s3c24xx_gpio_setcfg_abank() turning an GPIO into a usable - * GPIO configuration value. - * - * @sa samsung_gpio_getcfg_2bit - * @sa samsung_gpio_getcfg_4bit - */ - -static unsigned s3c24xx_gpio_getcfg_abank(struct samsung_gpio_chip *chip, - unsigned int off) -{ - u32 con; - - con = __raw_readl(chip->base); - con >>= off; - con &= 1; - con++; - - return S3C_GPIO_SFN(con); -} -#endif - -static void __init samsung_gpiolib_set_cfg(struct samsung_gpio_cfg *chipcfg, - int nr_chips) -{ - for (; nr_chips > 0; nr_chips--, chipcfg++) { - if (!chipcfg->set_config) - chipcfg->set_config = samsung_gpio_setcfg_4bit; - if (!chipcfg->get_config) - chipcfg->get_config = samsung_gpio_getcfg_4bit; - if (!chipcfg->set_pull) - chipcfg->set_pull = samsung_gpio_setpull_updown; - if (!chipcfg->get_pull) - chipcfg->get_pull = samsung_gpio_getpull_updown; - } -} - -struct samsung_gpio_cfg s3c24xx_gpiocfg_default = { - .set_config = samsung_gpio_setcfg_2bit, - .get_config = samsung_gpio_getcfg_2bit, -}; - -#ifdef CONFIG_PLAT_S3C24XX -static struct samsung_gpio_cfg s3c24xx_gpiocfg_banka = { - .set_config = s3c24xx_gpio_setcfg_abank, - .get_config = s3c24xx_gpio_getcfg_abank, -}; -#endif - -static struct samsung_gpio_cfg samsung_gpio_cfgs[] = { - [0] = { - .cfg_eint = 0x0, - }, - [1] = { - .cfg_eint = 0x3, - }, - [2] = { - .cfg_eint = 0x7, - }, - [3] = { - .cfg_eint = 0xF, - }, - [4] = { - .cfg_eint = 0x0, - .set_config = samsung_gpio_setcfg_2bit, - .get_config = samsung_gpio_getcfg_2bit, - }, - [5] = { - .cfg_eint = 0x2, - .set_config = samsung_gpio_setcfg_2bit, - .get_config = samsung_gpio_getcfg_2bit, - }, - [6] = { - .cfg_eint = 0x3, - .set_config = samsung_gpio_setcfg_2bit, - .get_config = samsung_gpio_getcfg_2bit, - }, - [7] = { - .set_config = samsung_gpio_setcfg_2bit, - .get_config = samsung_gpio_getcfg_2bit, - }, -}; - -/* - * Default routines for controlling GPIO, based on the original S3C24XX - * GPIO functions which deal with the case where each gpio bank of the - * chip is as following: - * - * base + 0x00: Control register, 2 bits per gpio - * gpio n: 2 bits starting at (2*n) - * 00 = input, 01 = output, others mean special-function - * base + 0x04: Data register, 1 bit per gpio - * bit n: data bit n -*/ - -static int samsung_gpiolib_2bit_input(struct gpio_chip *chip, unsigned offset) -{ - struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip); - void __iomem *base = ourchip->base; - unsigned long flags; - unsigned long con; - - samsung_gpio_lock(ourchip, flags); - - con = __raw_readl(base + 0x00); - con &= ~(3 << (offset * 2)); - - __raw_writel(con, base + 0x00); - - samsung_gpio_unlock(ourchip, flags); - return 0; -} - -static int samsung_gpiolib_2bit_output(struct gpio_chip *chip, - unsigned offset, int value) -{ - struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip); - void __iomem *base = ourchip->base; - unsigned long flags; - unsigned long dat; - unsigned long con; - - samsung_gpio_lock(ourchip, flags); - - dat = __raw_readl(base + 0x04); - dat &= ~(1 << offset); - if (value) - dat |= 1 << offset; - __raw_writel(dat, base + 0x04); - - con = __raw_readl(base + 0x00); - con &= ~(3 << (offset * 2)); - con |= 1 << (offset * 2); - - __raw_writel(con, base + 0x00); - __raw_writel(dat, base + 0x04); - - samsung_gpio_unlock(ourchip, flags); - return 0; -} - -/* - * The samsung_gpiolib_4bit routines are to control the gpio banks where - * the gpio configuration register (GPxCON) has 4 bits per GPIO, as the - * following example: - * - * base + 0x00: Control register, 4 bits per gpio - * gpio n: 4 bits starting at (4*n) - * 0000 = input, 0001 = output, others mean special-function - * base + 0x04: Data register, 1 bit per gpio - * bit n: data bit n - * - * Note, since the data register is one bit per gpio and is at base + 0x4 - * we can use samsung_gpiolib_get and samsung_gpiolib_set to change the - * state of the output. - */ - -static int samsung_gpiolib_4bit_input(struct gpio_chip *chip, - unsigned int offset) -{ - struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip); - void __iomem *base = ourchip->base; - unsigned long con; - - con = __raw_readl(base + GPIOCON_OFF); - if (ourchip->bitmap_gpio_int & BIT(offset)) - con |= 0xf << con_4bit_shift(offset); - else - con &= ~(0xf << con_4bit_shift(offset)); - __raw_writel(con, base + GPIOCON_OFF); - - pr_debug("%s: %p: CON now %08lx\n", __func__, base, con); - - return 0; -} - -static int samsung_gpiolib_4bit_output(struct gpio_chip *chip, - unsigned int offset, int value) -{ - struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip); - void __iomem *base = ourchip->base; - unsigned long con; - unsigned long dat; - - con = __raw_readl(base + GPIOCON_OFF); - con &= ~(0xf << con_4bit_shift(offset)); - con |= 0x1 << con_4bit_shift(offset); - - dat = __raw_readl(base + GPIODAT_OFF); - - if (value) - dat |= 1 << offset; - else - dat &= ~(1 << offset); - - __raw_writel(dat, base + GPIODAT_OFF); - __raw_writel(con, base + GPIOCON_OFF); - __raw_writel(dat, base + GPIODAT_OFF); - - pr_debug("%s: %p: CON %08lx, DAT %08lx\n", __func__, base, con, dat); - - return 0; -} - -/* - * The next set of routines are for the case where the GPIO configuration - * registers are 4 bits per GPIO but there is more than one register (the - * bank has more than 8 GPIOs. - * - * This case is the similar to the 4 bit case, but the registers are as - * follows: - * - * base + 0x00: Control register, 4 bits per gpio (lower 8 GPIOs) - * gpio n: 4 bits starting at (4*n) - * 0000 = input, 0001 = output, others mean special-function - * base + 0x04: Control register, 4 bits per gpio (up to 8 additions GPIOs) - * gpio n: 4 bits starting at (4*n) - * 0000 = input, 0001 = output, others mean special-function - * base + 0x08: Data register, 1 bit per gpio - * bit n: data bit n - * - * To allow us to use the samsung_gpiolib_get and samsung_gpiolib_set - * routines we store the 'base + 0x4' address so that these routines see - * the data register at ourchip->base + 0x04. - */ - -static int samsung_gpiolib_4bit2_input(struct gpio_chip *chip, - unsigned int offset) -{ - struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip); - void __iomem *base = ourchip->base; - void __iomem *regcon = base; - unsigned long con; - - if (offset > 7) - offset -= 8; - else - regcon -= 4; - - con = __raw_readl(regcon); - con &= ~(0xf << con_4bit_shift(offset)); - __raw_writel(con, regcon); - - pr_debug("%s: %p: CON %08lx\n", __func__, base, con); - - return 0; -} - -static int samsung_gpiolib_4bit2_output(struct gpio_chip *chip, - unsigned int offset, int value) -{ - struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip); - void __iomem *base = ourchip->base; - void __iomem *regcon = base; - unsigned long con; - unsigned long dat; - unsigned con_offset = offset; - - if (con_offset > 7) - con_offset -= 8; - else - regcon -= 4; - - con = __raw_readl(regcon); - con &= ~(0xf << con_4bit_shift(con_offset)); - con |= 0x1 << con_4bit_shift(con_offset); - - dat = __raw_readl(base + GPIODAT_OFF); - - if (value) - dat |= 1 << offset; - else - dat &= ~(1 << offset); - - __raw_writel(dat, base + GPIODAT_OFF); - __raw_writel(con, regcon); - __raw_writel(dat, base + GPIODAT_OFF); - - pr_debug("%s: %p: CON %08lx, DAT %08lx\n", __func__, base, con, dat); - - return 0; -} - -#ifdef CONFIG_PLAT_S3C24XX -/* The next set of routines are for the case of s3c24xx bank a */ - -static int s3c24xx_gpiolib_banka_input(struct gpio_chip *chip, unsigned offset) -{ - return -EINVAL; -} - -static int s3c24xx_gpiolib_banka_output(struct gpio_chip *chip, - unsigned offset, int value) -{ - struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip); - void __iomem *base = ourchip->base; - unsigned long flags; - unsigned long dat; - unsigned long con; - - local_irq_save(flags); - - con = __raw_readl(base + 0x00); - dat = __raw_readl(base + 0x04); - - dat &= ~(1 << offset); - if (value) - dat |= 1 << offset; - - __raw_writel(dat, base + 0x04); - - con &= ~(1 << offset); - - __raw_writel(con, base + 0x00); - __raw_writel(dat, base + 0x04); - - local_irq_restore(flags); - return 0; -} -#endif - -static void samsung_gpiolib_set(struct gpio_chip *chip, - unsigned offset, int value) -{ - struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip); - void __iomem *base = ourchip->base; - unsigned long flags; - unsigned long dat; - - samsung_gpio_lock(ourchip, flags); - - dat = __raw_readl(base + 0x04); - dat &= ~(1 << offset); - if (value) - dat |= 1 << offset; - __raw_writel(dat, base + 0x04); - - samsung_gpio_unlock(ourchip, flags); -} - -static int samsung_gpiolib_get(struct gpio_chip *chip, unsigned offset) -{ - struct samsung_gpio_chip *ourchip = to_samsung_gpio(chip); - unsigned long val; - - val = __raw_readl(ourchip->base + 0x04); - val >>= offset; - val &= 1; - - return val; -} - -/* - * CONFIG_S3C_GPIO_TRACK enables the tracking of the s3c specific gpios - * for use with the configuration calls, and other parts of the s3c gpiolib - * support code. - * - * Not all s3c support code will need this, as some configurations of cpu - * may only support one or two different configuration options and have an - * easy gpio to samsung_gpio_chip mapping function. If this is the case, then - * the machine support file should provide its own samsung_gpiolib_getchip() - * and any other necessary functions. - */ - -#ifdef CONFIG_S3C_GPIO_TRACK -struct samsung_gpio_chip *s3c_gpios[S3C_GPIO_END]; - -static __init void s3c_gpiolib_track(struct samsung_gpio_chip *chip) -{ - unsigned int gpn; - int i; - - gpn = chip->chip.base; - for (i = 0; i < chip->chip.ngpio; i++, gpn++) { - BUG_ON(gpn >= ARRAY_SIZE(s3c_gpios)); - s3c_gpios[gpn] = chip; - } -} -#endif /* CONFIG_S3C_GPIO_TRACK */ - -/* - * samsung_gpiolib_add() - add the Samsung gpio_chip. - * @chip: The chip to register - * - * This is a wrapper to gpiochip_add() that takes our specific gpio chip - * information and makes the necessary alterations for the platform and - * notes the information for use with the configuration systems and any - * other parts of the system. - */ - -static void __init samsung_gpiolib_add(struct samsung_gpio_chip *chip) -{ - struct gpio_chip *gc = &chip->chip; - int ret; - - BUG_ON(!chip->base); - BUG_ON(!gc->label); - BUG_ON(!gc->ngpio); - - spin_lock_init(&chip->lock); - - if (!gc->direction_input) - gc->direction_input = samsung_gpiolib_2bit_input; - if (!gc->direction_output) - gc->direction_output = samsung_gpiolib_2bit_output; - if (!gc->set) - gc->set = samsung_gpiolib_set; - if (!gc->get) - gc->get = samsung_gpiolib_get; - -#ifdef CONFIG_PM - if (chip->pm != NULL) { - if (!chip->pm->save || !chip->pm->resume) - pr_err("gpio: %s has missing PM functions\n", - gc->label); - } else - pr_err("gpio: %s has no PM function\n", gc->label); -#endif - - /* gpiochip_add() prints own failure message on error. */ - ret = gpiochip_add_data(gc, chip); - if (ret >= 0) - s3c_gpiolib_track(chip); -} - -static void __init s3c24xx_gpiolib_add_chips(struct samsung_gpio_chip *chip, - int nr_chips, void __iomem *base) -{ - int i; - struct gpio_chip *gc = &chip->chip; - - for (i = 0 ; i < nr_chips; i++, chip++) { - /* skip banks not present on SoC */ - if (chip->chip.base >= S3C_GPIO_END) - continue; - - if (!chip->config) - chip->config = &s3c24xx_gpiocfg_default; - if (!chip->pm) - chip->pm = __gpio_pm(&samsung_gpio_pm_2bit); - if ((base != NULL) && (chip->base == NULL)) - chip->base = base + ((i) * 0x10); - - if (!gc->direction_input) - gc->direction_input = samsung_gpiolib_2bit_input; - if (!gc->direction_output) - gc->direction_output = samsung_gpiolib_2bit_output; - - samsung_gpiolib_add(chip); - } -} - -static void __init samsung_gpiolib_add_2bit_chips(struct samsung_gpio_chip *chip, - int nr_chips, void __iomem *base, - unsigned int offset) -{ - int i; - - for (i = 0 ; i < nr_chips; i++, chip++) { - chip->chip.direction_input = samsung_gpiolib_2bit_input; - chip->chip.direction_output = samsung_gpiolib_2bit_output; - - if (!chip->config) - chip->config = &samsung_gpio_cfgs[7]; - if (!chip->pm) - chip->pm = __gpio_pm(&samsung_gpio_pm_2bit); - if ((base != NULL) && (chip->base == NULL)) - chip->base = base + ((i) * offset); - - samsung_gpiolib_add(chip); - } -} - -/* - * samsung_gpiolib_add_4bit_chips - 4bit single register GPIO config. - * @chip: The gpio chip that is being configured. - * @nr_chips: The no of chips (gpio ports) for the GPIO being configured. - * - * This helper deal with the GPIO cases where the control register has 4 bits - * of control per GPIO, generally in the form of: - * 0000 = Input - * 0001 = Output - * others = Special functions (dependent on bank) - * - * Note, since the code to deal with the case where there are two control - * registers instead of one, we do not have a separate set of function - * (samsung_gpiolib_add_4bit2_chips)for each case. - */ - -static void __init samsung_gpiolib_add_4bit_chips(struct samsung_gpio_chip *chip, - int nr_chips, void __iomem *base) -{ - int i; - - for (i = 0 ; i < nr_chips; i++, chip++) { - chip->chip.direction_input = samsung_gpiolib_4bit_input; - chip->chip.direction_output = samsung_gpiolib_4bit_output; - - if (!chip->config) - chip->config = &samsung_gpio_cfgs[2]; - if (!chip->pm) - chip->pm = __gpio_pm(&samsung_gpio_pm_4bit); - if ((base != NULL) && (chip->base == NULL)) - chip->base = base + ((i) * 0x20); - - chip->bitmap_gpio_int = 0; - - samsung_gpiolib_add(chip); - } -} - -static void __init samsung_gpiolib_add_4bit2_chips(struct samsung_gpio_chip *chip, - int nr_chips) -{ - for (; nr_chips > 0; nr_chips--, chip++) { - chip->chip.direction_input = samsung_gpiolib_4bit2_input; - chip->chip.direction_output = samsung_gpiolib_4bit2_output; - - if (!chip->config) - chip->config = &samsung_gpio_cfgs[2]; - if (!chip->pm) - chip->pm = __gpio_pm(&samsung_gpio_pm_4bit); - - samsung_gpiolib_add(chip); - } -} - -int samsung_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset) -{ - struct samsung_gpio_chip *samsung_chip = gpiochip_get_data(chip); - - return samsung_chip->irq_base + offset; -} - -#ifdef CONFIG_PLAT_S3C24XX -static int s3c24xx_gpiolib_fbank_to_irq(struct gpio_chip *chip, unsigned offset) -{ - if (offset < 4) { - if (soc_is_s3c2412()) - return IRQ_EINT0_2412 + offset; - else - return IRQ_EINT0 + offset; - } - - if (offset < 8) - return IRQ_EINT4 + offset - 4; - - return -EINVAL; -} -#endif - -#ifdef CONFIG_ARCH_S3C64XX -static int s3c64xx_gpiolib_mbank_to_irq(struct gpio_chip *chip, unsigned pin) -{ - return pin < 5 ? IRQ_EINT(23) + pin : -ENXIO; -} - -static int s3c64xx_gpiolib_lbank_to_irq(struct gpio_chip *chip, unsigned pin) -{ - return pin >= 8 ? IRQ_EINT(16) + pin - 8 : -ENXIO; -} -#endif - -struct samsung_gpio_chip s3c24xx_gpios[] = { -#ifdef CONFIG_PLAT_S3C24XX - { - .config = &s3c24xx_gpiocfg_banka, - .chip = { - .base = S3C2410_GPA(0), - .owner = THIS_MODULE, - .label = "GPIOA", - .ngpio = 27, - .direction_input = s3c24xx_gpiolib_banka_input, - .direction_output = s3c24xx_gpiolib_banka_output, - }, - }, { - .chip = { - .base = S3C2410_GPB(0), - .owner = THIS_MODULE, - .label = "GPIOB", - .ngpio = 11, - }, - }, { - .chip = { - .base = S3C2410_GPC(0), - .owner = THIS_MODULE, - .label = "GPIOC", - .ngpio = 16, - }, - }, { - .chip = { - .base = S3C2410_GPD(0), - .owner = THIS_MODULE, - .label = "GPIOD", - .ngpio = 16, - }, - }, { - .chip = { - .base = S3C2410_GPE(0), - .label = "GPIOE", - .owner = THIS_MODULE, - .ngpio = 16, - }, - }, { - .chip = { - .base = S3C2410_GPF(0), - .owner = THIS_MODULE, - .label = "GPIOF", - .ngpio = 8, - .to_irq = s3c24xx_gpiolib_fbank_to_irq, - }, - }, { - .irq_base = IRQ_EINT8, - .chip = { - .base = S3C2410_GPG(0), - .owner = THIS_MODULE, - .label = "GPIOG", - .ngpio = 16, - .to_irq = samsung_gpiolib_to_irq, - }, - }, { - .chip = { - .base = S3C2410_GPH(0), - .owner = THIS_MODULE, - .label = "GPIOH", - .ngpio = 15, - }, - }, - /* GPIOS for the S3C2443 and later devices. */ - { - .base = S3C2440_GPJCON, - .chip = { - .base = S3C2410_GPJ(0), - .owner = THIS_MODULE, - .label = "GPIOJ", - .ngpio = 16, - }, - }, { - .base = S3C2443_GPKCON, - .chip = { - .base = S3C2410_GPK(0), - .owner = THIS_MODULE, - .label = "GPIOK", - .ngpio = 16, - }, - }, { - .base = S3C2443_GPLCON, - .chip = { - .base = S3C2410_GPL(0), - .owner = THIS_MODULE, - .label = "GPIOL", - .ngpio = 15, - }, - }, { - .base = S3C2443_GPMCON, - .chip = { - .base = S3C2410_GPM(0), - .owner = THIS_MODULE, - .label = "GPIOM", - .ngpio = 2, - }, - }, -#endif -}; - -/* - * GPIO bank summary: - * - * Bank GPIOs Style SlpCon ExtInt Group - * A 8 4Bit Yes 1 - * B 7 4Bit Yes 1 - * C 8 4Bit Yes 2 - * D 5 4Bit Yes 3 - * E 5 4Bit Yes None - * F 16 2Bit Yes 4 [1] - * G 7 4Bit Yes 5 - * H 10 4Bit[2] Yes 6 - * I 16 2Bit Yes None - * J 12 2Bit Yes None - * K 16 4Bit[2] No None - * L 15 4Bit[2] No None - * M 6 4Bit No IRQ_EINT - * N 16 2Bit No IRQ_EINT - * O 16 2Bit Yes 7 - * P 15 2Bit Yes 8 - * Q 9 2Bit Yes 9 - * - * [1] BANKF pins 14,15 do not form part of the external interrupt sources - * [2] BANK has two control registers, GPxCON0 and GPxCON1 - */ - -static struct samsung_gpio_chip s3c64xx_gpios_4bit[] = { -#ifdef CONFIG_ARCH_S3C64XX - { - .chip = { - .base = S3C64XX_GPA(0), - .ngpio = S3C64XX_GPIO_A_NR, - .label = "GPA", - }, - }, { - .chip = { - .base = S3C64XX_GPB(0), - .ngpio = S3C64XX_GPIO_B_NR, - .label = "GPB", - }, - }, { - .chip = { - .base = S3C64XX_GPC(0), - .ngpio = S3C64XX_GPIO_C_NR, - .label = "GPC", - }, - }, { - .chip = { - .base = S3C64XX_GPD(0), - .ngpio = S3C64XX_GPIO_D_NR, - .label = "GPD", - }, - }, { - .config = &samsung_gpio_cfgs[0], - .chip = { - .base = S3C64XX_GPE(0), - .ngpio = S3C64XX_GPIO_E_NR, - .label = "GPE", - }, - }, { - .base = S3C64XX_GPG_BASE, - .chip = { - .base = S3C64XX_GPG(0), - .ngpio = S3C64XX_GPIO_G_NR, - .label = "GPG", - }, - }, { - .base = S3C64XX_GPM_BASE, - .config = &samsung_gpio_cfgs[1], - .chip = { - .base = S3C64XX_GPM(0), - .ngpio = S3C64XX_GPIO_M_NR, - .label = "GPM", - .to_irq = s3c64xx_gpiolib_mbank_to_irq, - }, - }, -#endif -}; - -static struct samsung_gpio_chip s3c64xx_gpios_4bit2[] = { -#ifdef CONFIG_ARCH_S3C64XX - { - .base = S3C64XX_GPH_BASE + 0x4, - .chip = { - .base = S3C64XX_GPH(0), - .ngpio = S3C64XX_GPIO_H_NR, - .label = "GPH", - }, - }, { - .base = S3C64XX_GPK_BASE + 0x4, - .config = &samsung_gpio_cfgs[0], - .chip = { - .base = S3C64XX_GPK(0), - .ngpio = S3C64XX_GPIO_K_NR, - .label = "GPK", - }, - }, { - .base = S3C64XX_GPL_BASE + 0x4, - .config = &samsung_gpio_cfgs[1], - .chip = { - .base = S3C64XX_GPL(0), - .ngpio = S3C64XX_GPIO_L_NR, - .label = "GPL", - .to_irq = s3c64xx_gpiolib_lbank_to_irq, - }, - }, -#endif -}; - -static struct samsung_gpio_chip s3c64xx_gpios_2bit[] = { -#ifdef CONFIG_ARCH_S3C64XX - { - .base = S3C64XX_GPF_BASE, - .config = &samsung_gpio_cfgs[6], - .chip = { - .base = S3C64XX_GPF(0), - .ngpio = S3C64XX_GPIO_F_NR, - .label = "GPF", - }, - }, { - .config = &samsung_gpio_cfgs[7], - .chip = { - .base = S3C64XX_GPI(0), - .ngpio = S3C64XX_GPIO_I_NR, - .label = "GPI", - }, - }, { - .config = &samsung_gpio_cfgs[7], - .chip = { - .base = S3C64XX_GPJ(0), - .ngpio = S3C64XX_GPIO_J_NR, - .label = "GPJ", - }, - }, { - .config = &samsung_gpio_cfgs[6], - .chip = { - .base = S3C64XX_GPO(0), - .ngpio = S3C64XX_GPIO_O_NR, - .label = "GPO", - }, - }, { - .config = &samsung_gpio_cfgs[6], - .chip = { - .base = S3C64XX_GPP(0), - .ngpio = S3C64XX_GPIO_P_NR, - .label = "GPP", - }, - }, { - .config = &samsung_gpio_cfgs[6], - .chip = { - .base = S3C64XX_GPQ(0), - .ngpio = S3C64XX_GPIO_Q_NR, - .label = "GPQ", - }, - }, { - .base = S3C64XX_GPN_BASE, - .irq_base = IRQ_EINT(0), - .config = &samsung_gpio_cfgs[5], - .chip = { - .base = S3C64XX_GPN(0), - .ngpio = S3C64XX_GPIO_N_NR, - .label = "GPN", - .to_irq = samsung_gpiolib_to_irq, - }, - }, -#endif -}; - -/* TODO: cleanup soc_is_* */ -static __init int samsung_gpiolib_init(void) -{ - /* - * Currently there are two drivers that can provide GPIO support for - * Samsung SoCs. For device tree enabled platforms, the new - * pinctrl-samsung driver is used, providing both GPIO and pin control - * interfaces. For legacy (non-DT) platforms this driver is used. - */ - if (of_have_populated_dt()) - return 0; - - if (soc_is_s3c24xx()) { - samsung_gpiolib_set_cfg(samsung_gpio_cfgs, - ARRAY_SIZE(samsung_gpio_cfgs)); - s3c24xx_gpiolib_add_chips(s3c24xx_gpios, - ARRAY_SIZE(s3c24xx_gpios), S3C24XX_VA_GPIO); - } else if (soc_is_s3c64xx()) { - samsung_gpiolib_set_cfg(samsung_gpio_cfgs, - ARRAY_SIZE(samsung_gpio_cfgs)); - samsung_gpiolib_add_2bit_chips(s3c64xx_gpios_2bit, - ARRAY_SIZE(s3c64xx_gpios_2bit), - S3C64XX_VA_GPIO + 0xE0, 0x20); - samsung_gpiolib_add_4bit_chips(s3c64xx_gpios_4bit, - ARRAY_SIZE(s3c64xx_gpios_4bit), - S3C64XX_VA_GPIO); - samsung_gpiolib_add_4bit2_chips(s3c64xx_gpios_4bit2, - ARRAY_SIZE(s3c64xx_gpios_4bit2)); - } - - return 0; -} -core_initcall(samsung_gpiolib_init); - -int s3c_gpio_cfgpin(unsigned int pin, unsigned int config) -{ - struct samsung_gpio_chip *chip = samsung_gpiolib_getchip(pin); - unsigned long flags; - int offset; - int ret; - - if (!chip) - return -EINVAL; - - offset = pin - chip->chip.base; - - samsung_gpio_lock(chip, flags); - ret = samsung_gpio_do_setcfg(chip, offset, config); - samsung_gpio_unlock(chip, flags); - - return ret; -} -EXPORT_SYMBOL(s3c_gpio_cfgpin); - -int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr, - unsigned int cfg) -{ - int ret; - - for (; nr > 0; nr--, start++) { - ret = s3c_gpio_cfgpin(start, cfg); - if (ret != 0) - return ret; - } - - return 0; -} -EXPORT_SYMBOL_GPL(s3c_gpio_cfgpin_range); - -int s3c_gpio_cfgall_range(unsigned int start, unsigned int nr, - unsigned int cfg, samsung_gpio_pull_t pull) -{ - int ret; - - for (; nr > 0; nr--, start++) { - s3c_gpio_setpull(start, pull); - ret = s3c_gpio_cfgpin(start, cfg); - if (ret != 0) - return ret; - } - - return 0; -} -EXPORT_SYMBOL_GPL(s3c_gpio_cfgall_range); - -unsigned s3c_gpio_getcfg(unsigned int pin) -{ - struct samsung_gpio_chip *chip = samsung_gpiolib_getchip(pin); - unsigned long flags; - unsigned ret = 0; - int offset; - - if (chip) { - offset = pin - chip->chip.base; - - samsung_gpio_lock(chip, flags); - ret = samsung_gpio_do_getcfg(chip, offset); - samsung_gpio_unlock(chip, flags); - } - - return ret; -} -EXPORT_SYMBOL(s3c_gpio_getcfg); - -int s3c_gpio_setpull(unsigned int pin, samsung_gpio_pull_t pull) -{ - struct samsung_gpio_chip *chip = samsung_gpiolib_getchip(pin); - unsigned long flags; - int offset, ret; - - if (!chip) - return -EINVAL; - - offset = pin - chip->chip.base; - - samsung_gpio_lock(chip, flags); - ret = samsung_gpio_do_setpull(chip, offset, pull); - samsung_gpio_unlock(chip, flags); - - return ret; -} -EXPORT_SYMBOL(s3c_gpio_setpull); - -samsung_gpio_pull_t s3c_gpio_getpull(unsigned int pin) -{ - struct samsung_gpio_chip *chip = samsung_gpiolib_getchip(pin); - unsigned long flags; - int offset; - u32 pup = 0; - - if (chip) { - offset = pin - chip->chip.base; - - samsung_gpio_lock(chip, flags); - pup = samsung_gpio_do_getpull(chip, offset); - samsung_gpio_unlock(chip, flags); - } - - return (__force samsung_gpio_pull_t)pup; -} -EXPORT_SYMBOL(s3c_gpio_getpull); - -#ifdef CONFIG_PLAT_S3C24XX -unsigned int s3c2410_modify_misccr(unsigned int clear, unsigned int change) -{ - unsigned long flags; - unsigned long misccr; - - local_irq_save(flags); - misccr = __raw_readl(S3C24XX_MISCCR); - misccr &= ~clear; - misccr ^= change; - __raw_writel(misccr, S3C24XX_MISCCR); - local_irq_restore(flags); - - return misccr; -} -EXPORT_SYMBOL(s3c2410_modify_misccr); -#endif diff --git a/arch/arm/plat-samsung/include/plat/adc-core.h b/arch/arm/plat-samsung/include/plat/adc-core.h deleted file mode 100644 index 039f6862b6a7..000000000000 --- a/arch/arm/plat-samsung/include/plat/adc-core.h +++ /dev/null @@ -1,24 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Samsung ADC Controller core functions - */ - -#ifndef __ASM_PLAT_ADC_CORE_H -#define __ASM_PLAT_ADC_CORE_H __FILE__ - -/* These functions are only for use with the core support code, such as - * the cpu specific initialisation code - */ - -/* re-define device name depending on support. */ -static inline void s3c_adc_setname(char *name) -{ -#if defined(CONFIG_SAMSUNG_DEV_ADC) || defined(CONFIG_PLAT_S3C24XX) - s3c_device_adc.name = name; -#endif -} - -#endif /* __ASM_PLAT_ADC_CORE_H */ diff --git a/arch/arm/plat-samsung/include/plat/adc.h b/arch/arm/plat-samsung/include/plat/adc.h deleted file mode 100644 index 74d1a46408c1..000000000000 --- a/arch/arm/plat-samsung/include/plat/adc.h +++ /dev/null @@ -1,32 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2008 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks <ben@simtec.co.uk> - * - * S3C ADC driver information - */ - -#ifndef __ASM_PLAT_ADC_H -#define __ASM_PLAT_ADC_H __FILE__ - -struct s3c_adc_client; -struct platform_device; - -extern int s3c_adc_start(struct s3c_adc_client *client, - unsigned int channel, unsigned int nr_samples); - -extern int s3c_adc_read(struct s3c_adc_client *client, unsigned int ch); - -extern struct s3c_adc_client * - s3c_adc_register(struct platform_device *pdev, - void (*select)(struct s3c_adc_client *client, - unsigned selected), - void (*conv)(struct s3c_adc_client *client, - unsigned d0, unsigned d1, - unsigned *samples_left), - unsigned int is_ts); - -extern void s3c_adc_release(struct s3c_adc_client *client); - -#endif /* __ASM_PLAT_ADC_H */ diff --git a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h b/arch/arm/plat-samsung/include/plat/cpu-freq-core.h deleted file mode 100644 index 2c7cf2665634..000000000000 --- a/arch/arm/plat-samsung/include/plat/cpu-freq-core.h +++ /dev/null @@ -1,287 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2006-2009 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks <ben@simtec.co.uk> - * - * S3C CPU frequency scaling support - core support - */ - -#include <plat/cpu-freq.h> - -struct seq_file; - -#define MAX_BANKS (8) -#define S3C2412_MAX_IO (8) - -/** - * struct s3c2410_iobank_timing - IO bank timings for S3C2410 style timings - * @bankcon: The cached version of settings in this structure. - * @tacp: - * @tacs: Time from address valid to nCS asserted. - * @tcos: Time from nCS asserted to nOE or nWE asserted. - * @tacc: Time that nOE or nWE is asserted. - * @tcoh: Time nCS is held after nOE or nWE are released. - * @tcah: Time address is held for after - * @nwait_en: Whether nWAIT is enabled for this bank. - * - * This structure represents the IO timings for a S3C2410 style IO bank - * used by the CPU frequency support if it needs to change the settings - * of the IO. - */ -struct s3c2410_iobank_timing { - unsigned long bankcon; - unsigned int tacp; - unsigned int tacs; - unsigned int tcos; - unsigned int tacc; - unsigned int tcoh; /* nCS hold after nOE/nWE */ - unsigned int tcah; /* Address hold after nCS */ - unsigned char nwait_en; /* nWait enabled for bank. */ -}; - -/** - * struct s3c2412_iobank_timing - io timings for PL092 (S3C2412) style IO - * @idcy: The idle cycle time between transactions. - * @wstrd: nCS release to end of read cycle. - * @wstwr: nCS release to end of write cycle. - * @wstoen: nCS assertion to nOE assertion time. - * @wstwen: nCS assertion to nWE assertion time. - * @wstbrd: Burst ready delay. - * @smbidcyr: Register cache for smbidcyr value. - * @smbwstrd: Register cache for smbwstrd value. - * @smbwstwr: Register cache for smbwstwr value. - * @smbwstoen: Register cache for smbwstoen value. - * @smbwstwen: Register cache for smbwstwen value. - * @smbwstbrd: Register cache for smbwstbrd value. - * - * Timing information for a IO bank on an S3C2412 or similar system which - * uses a PL093 block. - */ -struct s3c2412_iobank_timing { - unsigned int idcy; - unsigned int wstrd; - unsigned int wstwr; - unsigned int wstoen; - unsigned int wstwen; - unsigned int wstbrd; - - /* register cache */ - unsigned char smbidcyr; - unsigned char smbwstrd; - unsigned char smbwstwr; - unsigned char smbwstoen; - unsigned char smbwstwen; - unsigned char smbwstbrd; -}; - -union s3c_iobank { - struct s3c2410_iobank_timing *io_2410; - struct s3c2412_iobank_timing *io_2412; -}; - -/** - * struct s3c_iotimings - Chip IO timings holder - * @bank: The timings for each IO bank. - */ -struct s3c_iotimings { - union s3c_iobank bank[MAX_BANKS]; -}; - -/** - * struct s3c_plltab - PLL table information. - * @vals: List of PLL values. - * @size: Size of the PLL table @vals. - */ -struct s3c_plltab { - struct s3c_pllval *vals; - int size; -}; - -/** - * struct s3c_cpufreq_config - current cpu frequency configuration - * @freq: The current settings for the core clocks. - * @max: Maxium settings, derived from core, board and user settings. - * @pll: The PLL table entry for the current PLL settings. - * @divs: The divisor settings for the core clocks. - * @info: The current core driver information. - * @board: The information for the board we are running on. - * @lock_pll: Set if the PLL settings cannot be changed. - * - * This is for the core drivers that need to know information about - * the current settings and values. It should not be needed by any - * device drivers. -*/ -struct s3c_cpufreq_config { - struct s3c_freq freq; - struct s3c_freq max; - struct clk *mpll; - struct cpufreq_frequency_table pll; - struct s3c_clkdivs divs; - struct s3c_cpufreq_info *info; /* for core, not drivers */ - struct s3c_cpufreq_board *board; - - unsigned int lock_pll:1; -}; - -/** - * struct s3c_cpufreq_info - Information for the CPU frequency driver. - * @name: The name of this implementation. - * @max: The maximum frequencies for the system. - * @latency: Transition latency to give to cpufreq. - * @locktime_m: The lock-time in uS for the MPLL. - * @locktime_u: The lock-time in uS for the UPLL. - * @locttime_bits: The number of bits each LOCKTIME field. - * @need_pll: Set if this driver needs to change the PLL values to achieve - * any frequency changes. This is really only need by devices like the - * S3C2410 where there is no or limited divider between the PLL and the - * ARMCLK. - * @get_iotiming: Get the current IO timing data, mainly for use at start. - * @set_iotiming: Update the IO timings from the cached copies calculated - * from the @calc_iotiming entry when changing the frequency. - * @calc_iotiming: Calculate and update the cached copies of the IO timings - * from the newly calculated frequencies. - * @calc_freqtable: Calculate (fill in) the given frequency table from the - * current frequency configuration. If the table passed in is NULL, - * then the return is the number of elements to be filled for allocation - * of the table. - * @set_refresh: Set the memory refresh configuration. - * @set_fvco: Set the PLL frequencies. - * @set_divs: Update the clock divisors. - * @calc_divs: Calculate the clock divisors. - */ -struct s3c_cpufreq_info { - const char *name; - struct s3c_freq max; - - unsigned int latency; - - unsigned int locktime_m; - unsigned int locktime_u; - unsigned char locktime_bits; - - unsigned int need_pll:1; - - /* driver routines */ - - int (*get_iotiming)(struct s3c_cpufreq_config *cfg, - struct s3c_iotimings *timings); - - void (*set_iotiming)(struct s3c_cpufreq_config *cfg, - struct s3c_iotimings *timings); - - int (*calc_iotiming)(struct s3c_cpufreq_config *cfg, - struct s3c_iotimings *timings); - - int (*calc_freqtable)(struct s3c_cpufreq_config *cfg, - struct cpufreq_frequency_table *t, - size_t table_size); - - void (*debug_io_show)(struct seq_file *seq, - struct s3c_cpufreq_config *cfg, - union s3c_iobank *iob); - - void (*set_refresh)(struct s3c_cpufreq_config *cfg); - void (*set_fvco)(struct s3c_cpufreq_config *cfg); - void (*set_divs)(struct s3c_cpufreq_config *cfg); - int (*calc_divs)(struct s3c_cpufreq_config *cfg); -}; - -extern int s3c_cpufreq_register(struct s3c_cpufreq_info *info); - -extern int s3c_plltab_register(struct cpufreq_frequency_table *plls, - unsigned int plls_no); - -/* exports and utilities for debugfs */ -extern struct s3c_cpufreq_config *s3c_cpufreq_getconfig(void); -extern struct s3c_iotimings *s3c_cpufreq_getiotimings(void); - -#ifdef CONFIG_ARM_S3C24XX_CPUFREQ_DEBUGFS -#define s3c_cpufreq_debugfs_call(x) x -#else -#define s3c_cpufreq_debugfs_call(x) NULL -#endif - -/* Useful utility functions. */ - -extern struct clk *s3c_cpufreq_clk_get(struct device *, const char *); - -/* S3C2410 and compatible exported functions */ - -extern void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg); -extern void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg); - -#ifdef CONFIG_S3C2410_IOTIMING -extern void s3c2410_iotiming_debugfs(struct seq_file *seq, - struct s3c_cpufreq_config *cfg, - union s3c_iobank *iob); - -extern int s3c2410_iotiming_calc(struct s3c_cpufreq_config *cfg, - struct s3c_iotimings *iot); - -extern int s3c2410_iotiming_get(struct s3c_cpufreq_config *cfg, - struct s3c_iotimings *timings); - -extern void s3c2410_iotiming_set(struct s3c_cpufreq_config *cfg, - struct s3c_iotimings *iot); -#else -#define s3c2410_iotiming_debugfs NULL -#define s3c2410_iotiming_calc NULL -#define s3c2410_iotiming_get NULL -#define s3c2410_iotiming_set NULL -#endif /* CONFIG_S3C2410_IOTIMING */ - -/* S3C2412 compatible routines */ - -#ifdef CONFIG_S3C2412_IOTIMING -extern void s3c2412_iotiming_debugfs(struct seq_file *seq, - struct s3c_cpufreq_config *cfg, - union s3c_iobank *iob); - -extern int s3c2412_iotiming_get(struct s3c_cpufreq_config *cfg, - struct s3c_iotimings *timings); - -extern int s3c2412_iotiming_calc(struct s3c_cpufreq_config *cfg, - struct s3c_iotimings *iot); - -extern void s3c2412_iotiming_set(struct s3c_cpufreq_config *cfg, - struct s3c_iotimings *iot); -#else -#define s3c2412_iotiming_debugfs NULL -#define s3c2412_iotiming_calc NULL -#define s3c2412_iotiming_get NULL -#define s3c2412_iotiming_set NULL -#endif /* CONFIG_S3C2412_IOTIMING */ - -#ifdef CONFIG_ARM_S3C24XX_CPUFREQ_DEBUG -#define s3c_freq_dbg(x...) printk(KERN_INFO x) -#else -#define s3c_freq_dbg(x...) do { if (0) printk(x); } while (0) -#endif /* CONFIG_ARM_S3C24XX_CPUFREQ_DEBUG */ - -#ifdef CONFIG_ARM_S3C24XX_CPUFREQ_IODEBUG -#define s3c_freq_iodbg(x...) printk(KERN_INFO x) -#else -#define s3c_freq_iodbg(x...) do { if (0) printk(x); } while (0) -#endif /* CONFIG_ARM_S3C24XX_CPUFREQ_IODEBUG */ - -static inline int s3c_cpufreq_addfreq(struct cpufreq_frequency_table *table, - int index, size_t table_size, - unsigned int freq) -{ - if (index < 0) - return index; - - if (table) { - if (index >= table_size) - return -ENOMEM; - - s3c_freq_dbg("%s: { %d = %u kHz }\n", - __func__, index, freq); - - table[index].driver_data = index; - table[index].frequency = freq; - } - - return index + 1; -} diff --git a/arch/arm/plat-samsung/include/plat/cpu-freq.h b/arch/arm/plat-samsung/include/plat/cpu-freq.h deleted file mode 100644 index 558892bcf9b6..000000000000 --- a/arch/arm/plat-samsung/include/plat/cpu-freq.h +++ /dev/null @@ -1,141 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2006-2007 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks <ben@simtec.co.uk> - * - * S3C CPU frequency scaling support - driver and board - */ - -#include <linux/cpufreq.h> - -struct s3c_cpufreq_info; -struct s3c_cpufreq_board; -struct s3c_iotimings; - -/** - * struct s3c_freq - frequency information (mainly for core drivers) - * @fclk: The FCLK frequency in Hz. - * @armclk: The ARMCLK frequency in Hz. - * @hclk_tns: HCLK cycle time in 10ths of nano-seconds. - * @hclk: The HCLK frequency in Hz. - * @pclk: The PCLK frequency in Hz. - * - * This contains the frequency information about the current configuration - * mainly for the core drivers to ensure we do not end up passing about - * a large number of parameters. - * - * The @hclk_tns field is a useful cache for the parts of the drivers that - * need to calculate IO timings and suchlike. - */ -struct s3c_freq { - unsigned long fclk; - unsigned long armclk; - unsigned long hclk_tns; /* in 10ths of ns */ - unsigned long hclk; - unsigned long pclk; -}; - -/** - * struct s3c_cpufreq_freqs - s3c cpufreq notification information. - * @freqs: The cpufreq setting information. - * @old: The old clock settings. - * @new: The new clock settings. - * @pll_changing: Set if the PLL is changing. - * - * Wrapper 'struct cpufreq_freqs' so that any drivers receiving the - * notification can use this information that is not provided by just - * having the core frequency alone. - * - * The pll_changing flag is used to indicate if the PLL itself is - * being set during this change. This is important as the clocks - * will temporarily be set to the XTAL clock during this time, so - * drivers may want to close down their output during this time. - * - * Note, this is not being used by any current drivers and therefore - * may be removed in the future. - */ -struct s3c_cpufreq_freqs { - struct cpufreq_freqs freqs; - struct s3c_freq old; - struct s3c_freq new; - - unsigned int pll_changing:1; -}; - -#define to_s3c_cpufreq(_cf) container_of(_cf, struct s3c_cpufreq_freqs, freqs) - -/** - * struct s3c_clkdivs - clock divisor information - * @p_divisor: Divisor from FCLK to PCLK. - * @h_divisor: Divisor from FCLK to HCLK. - * @arm_divisor: Divisor from FCLK to ARMCLK (not all CPUs). - * @dvs: Non-zero if using DVS mode for ARMCLK. - * - * Divisor settings for the core clocks. - */ -struct s3c_clkdivs { - int p_divisor; - int h_divisor; - int arm_divisor; - unsigned char dvs; -}; - -#define PLLVAL(_m, _p, _s) (((_m) << 12) | ((_p) << 4) | (_s)) - -/** - * struct s3c_pllval - PLL value entry. - * @freq: The frequency for this entry in Hz. - * @pll_reg: The PLL register setting for this PLL value. - */ -struct s3c_pllval { - unsigned long freq; - unsigned long pll_reg; -}; - -/** - * struct s3c_cpufreq_board - per-board cpu frequency informatin - * @refresh: The SDRAM refresh period in nanoseconds. - * @auto_io: Set if the IO timing settings should be generated from the - * initialisation time hardware registers. - * @need_io: Set if the board has external IO on any of the chipselect - * lines that will require the hardware timing registers to be - * updated on a clock change. - * @max: The maxium frequency limits for the system. Any field that - * is left at zero will use the CPU's settings. - * - * This contains the board specific settings that affect how the CPU - * drivers chose settings. These include the memory refresh and IO - * timing information. - * - * Registration depends on the driver being used, the ARMCLK only - * implementation does not currently need this but the older style - * driver requires this to be available. - */ -struct s3c_cpufreq_board { - unsigned int refresh; - unsigned int auto_io:1; /* automatically init io timings. */ - unsigned int need_io:1; /* set if needs io timing support. */ - - /* any non-zero field in here is taken as an upper limit. */ - struct s3c_freq max; /* frequency limits */ -}; - -/* Things depending on frequency scaling. */ -#ifdef CONFIG_ARM_S3C_CPUFREQ -#define __init_or_cpufreq -#else -#define __init_or_cpufreq __init -#endif - -/* Board functions */ - -#ifdef CONFIG_ARM_S3C_CPUFREQ -extern int s3c_cpufreq_setboard(struct s3c_cpufreq_board *board); -#else - -static inline int s3c_cpufreq_setboard(struct s3c_cpufreq_board *board) -{ - return 0; -} -#endif /* CONFIG_ARM_S3C_CPUFREQ */ diff --git a/arch/arm/plat-samsung/include/plat/cpu.h b/arch/arm/plat-samsung/include/plat/cpu.h deleted file mode 100644 index fadcddbea064..000000000000 --- a/arch/arm/plat-samsung/include/plat/cpu.h +++ /dev/null @@ -1,140 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Copyright (c) 2004-2005 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * Header file for Samsung CPU support - */ - -/* todo - fix when rmk changes iodescs to use `void __iomem *` */ - -#ifndef __SAMSUNG_PLAT_CPU_H -#define __SAMSUNG_PLAT_CPU_H - -extern unsigned long samsung_cpu_id; - -#define S3C2410_CPU_ID 0x32410000 -#define S3C2410_CPU_MASK 0xFFFFFFFF - -#define S3C24XX_CPU_ID 0x32400000 -#define S3C24XX_CPU_MASK 0xFFF00000 - -#define S3C2412_CPU_ID 0x32412000 -#define S3C2412_CPU_MASK 0xFFFFF000 - -#define S3C6400_CPU_ID 0x36400000 -#define S3C6410_CPU_ID 0x36410000 -#define S3C64XX_CPU_MASK 0xFFFFF000 - -#define S5PV210_CPU_ID 0x43110000 -#define S5PV210_CPU_MASK 0xFFFFF000 - -#define IS_SAMSUNG_CPU(name, id, mask) \ -static inline int is_samsung_##name(void) \ -{ \ - return ((samsung_cpu_id & mask) == (id & mask)); \ -} - -IS_SAMSUNG_CPU(s3c2410, S3C2410_CPU_ID, S3C2410_CPU_MASK) -IS_SAMSUNG_CPU(s3c24xx, S3C24XX_CPU_ID, S3C24XX_CPU_MASK) -IS_SAMSUNG_CPU(s3c2412, S3C2412_CPU_ID, S3C2412_CPU_MASK) -IS_SAMSUNG_CPU(s3c6400, S3C6400_CPU_ID, S3C64XX_CPU_MASK) -IS_SAMSUNG_CPU(s3c6410, S3C6410_CPU_ID, S3C64XX_CPU_MASK) - -#if defined(CONFIG_CPU_S3C2410) || defined(CONFIG_CPU_S3C2412) || \ - defined(CONFIG_CPU_S3C2416) || defined(CONFIG_CPU_S3C2440) || \ - defined(CONFIG_CPU_S3C2442) || defined(CONFIG_CPU_S3C244X) || \ - defined(CONFIG_CPU_S3C2443) -# define soc_is_s3c24xx() is_samsung_s3c24xx() -# define soc_is_s3c2410() is_samsung_s3c2410() -#else -# define soc_is_s3c24xx() 0 -# define soc_is_s3c2410() 0 -#endif - -#if defined(CONFIG_CPU_S3C2412) -# define soc_is_s3c2412() is_samsung_s3c2412() -#else -# define soc_is_s3c2412() 0 -#endif - -#if defined(CONFIG_CPU_S3C6400) || defined(CONFIG_CPU_S3C6410) -# define soc_is_s3c6400() is_samsung_s3c6400() -# define soc_is_s3c6410() is_samsung_s3c6410() -# define soc_is_s3c64xx() (is_samsung_s3c6400() || is_samsung_s3c6410()) -#else -# define soc_is_s3c6400() 0 -# define soc_is_s3c6410() 0 -# define soc_is_s3c64xx() 0 -#endif - -#define IODESC_ENT(x) { (unsigned long)S3C24XX_VA_##x, __phys_to_pfn(S3C24XX_PA_##x), S3C24XX_SZ_##x, MT_DEVICE } - -#ifndef KHZ -#define KHZ (1000) -#endif - -#ifndef MHZ -#define MHZ (1000*1000) -#endif - -#define print_mhz(m) ((m) / MHZ), (((m) / 1000) % 1000) - -/* forward declaration */ -struct s3c24xx_uart_resources; -struct platform_device; -struct s3c2410_uartcfg; -struct map_desc; - -/* per-cpu initialisation function table. */ - -struct cpu_table { - unsigned long idcode; - unsigned long idmask; - void (*map_io)(void); - void (*init_uarts)(struct s3c2410_uartcfg *cfg, int no); - void (*init_clocks)(int xtal); - int (*init)(void); - const char *name; -}; - -extern void s3c_init_cpu(unsigned long idcode, - struct cpu_table *cpus, unsigned int cputab_size); - -/* core initialisation functions */ - -extern void s3c24xx_init_io(struct map_desc *mach_desc, int size); - -extern void s3c64xx_init_cpu(void); -extern void s5p_init_cpu(const void __iomem *cpuid_addr); - -extern unsigned int samsung_rev(void); - -extern void s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no); - -extern void s3c24xx_init_clocks(int xtal); - -extern void s3c24xx_init_uartdevs(char *name, - struct s3c24xx_uart_resources *res, - struct s3c2410_uartcfg *cfg, int no); - -extern struct syscore_ops s3c2410_pm_syscore_ops; -extern struct syscore_ops s3c2412_pm_syscore_ops; -extern struct syscore_ops s3c2416_pm_syscore_ops; -extern struct syscore_ops s3c244x_pm_syscore_ops; - -/* system device subsystems */ - -extern struct bus_type s3c2410_subsys; -extern struct bus_type s3c2410a_subsys; -extern struct bus_type s3c2412_subsys; -extern struct bus_type s3c2416_subsys; -extern struct bus_type s3c2440_subsys; -extern struct bus_type s3c2442_subsys; -extern struct bus_type s3c2443_subsys; -extern struct bus_type s3c6410_subsys; - -#endif diff --git a/arch/arm/plat-samsung/include/plat/devs.h b/arch/arm/plat-samsung/include/plat/devs.h deleted file mode 100644 index 02b0c5750572..000000000000 --- a/arch/arm/plat-samsung/include/plat/devs.h +++ /dev/null @@ -1,96 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Copyright (c) 2004 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * Header file for s3c2410 standard platform devices - */ - -#ifndef __PLAT_DEVS_H -#define __PLAT_DEVS_H __FILE__ - -#include <linux/platform_device.h> - -struct s3c24xx_uart_resources { - struct resource *resources; - unsigned long nr_resources; -}; - -extern struct s3c24xx_uart_resources s3c2410_uart_resources[]; -extern struct s3c24xx_uart_resources s3c64xx_uart_resources[]; - -extern struct platform_device *s3c24xx_uart_devs[]; -extern struct platform_device *s3c24xx_uart_src[]; - -extern struct platform_device s3c64xx_device_ac97; -extern struct platform_device s3c64xx_device_iis0; -extern struct platform_device s3c64xx_device_iis1; -extern struct platform_device s3c64xx_device_iisv4; -extern struct platform_device s3c64xx_device_onenand1; -extern struct platform_device s3c64xx_device_pcm0; -extern struct platform_device s3c64xx_device_pcm1; -extern struct platform_device s3c64xx_device_spi0; -extern struct platform_device s3c64xx_device_spi1; -extern struct platform_device s3c64xx_device_spi2; - -extern struct platform_device s3c_device_adc; -extern struct platform_device s3c_device_cfcon; -extern struct platform_device s3c_device_fb; -extern struct platform_device s3c_device_hwmon; -extern struct platform_device s3c_device_hsmmc0; -extern struct platform_device s3c_device_hsmmc1; -extern struct platform_device s3c_device_hsmmc2; -extern struct platform_device s3c_device_hsmmc3; -extern struct platform_device s3c_device_i2c0; -extern struct platform_device s3c_device_i2c1; -extern struct platform_device s3c_device_i2c2; -extern struct platform_device s3c_device_i2c3; -extern struct platform_device s3c_device_i2c4; -extern struct platform_device s3c_device_i2c5; -extern struct platform_device s3c_device_i2c6; -extern struct platform_device s3c_device_i2c7; -extern struct platform_device s3c_device_iis; -extern struct platform_device s3c_device_lcd; -extern struct platform_device s3c_device_nand; -extern struct platform_device s3c_device_ohci; -extern struct platform_device s3c_device_onenand; -extern struct platform_device s3c_device_rtc; -extern struct platform_device s3c_device_sdi; -extern struct platform_device s3c_device_spi0; -extern struct platform_device s3c_device_spi1; -extern struct platform_device s3c_device_ts; -extern struct platform_device s3c_device_timer[]; -extern struct platform_device s3c_device_usbgadget; -extern struct platform_device s3c_device_usb_hsotg; -extern struct platform_device s3c_device_usb_hsudc; -extern struct platform_device s3c_device_wdt; - -extern struct platform_device samsung_asoc_idma; -extern struct platform_device samsung_device_keypad; -extern struct platform_device samsung_device_pwm; - -/* s3c2440 specific devices */ - -#ifdef CONFIG_CPU_S3C2440 - -extern struct platform_device s3c_device_camif; -extern struct platform_device s3c_device_ac97; - -#endif - -/** - * s3c_set_platdata() - helper for setting platform data - * @pd: The default platform data for this device. - * @pdsize: The size of the platform data. - * @pdev: Pointer to the device to fill in. - * - * This helper replaces a number of calls that copy and then set the - * platform data of the device. - */ -extern void *s3c_set_platdata(void *pd, size_t pdsize, - struct platform_device *pdev); - -#endif /* __PLAT_DEVS_H */ diff --git a/arch/arm/plat-samsung/include/plat/fb-s3c2410.h b/arch/arm/plat-samsung/include/plat/fb-s3c2410.h deleted file mode 100644 index 614240d768b4..000000000000 --- a/arch/arm/plat-samsung/include/plat/fb-s3c2410.h +++ /dev/null @@ -1,68 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2004 Arnaud Patard <arnaud.patard@rtp-net.org> - * - * Inspired by pxafb.h -*/ - -#ifndef __ASM_PLAT_FB_S3C2410_H -#define __ASM_PLAT_FB_S3C2410_H __FILE__ - -struct s3c2410fb_hw { - unsigned long lcdcon1; - unsigned long lcdcon2; - unsigned long lcdcon3; - unsigned long lcdcon4; - unsigned long lcdcon5; -}; - -/* LCD description */ -struct s3c2410fb_display { - /* LCD type */ - unsigned type; - - /* Screen size */ - unsigned short width; - unsigned short height; - - /* Screen info */ - unsigned short xres; - unsigned short yres; - unsigned short bpp; - - unsigned pixclock; /* pixclock in picoseconds */ - unsigned short left_margin; /* value in pixels (TFT) or HCLKs (STN) */ - unsigned short right_margin; /* value in pixels (TFT) or HCLKs (STN) */ - unsigned short hsync_len; /* value in pixels (TFT) or HCLKs (STN) */ - unsigned short upper_margin; /* value in lines (TFT) or 0 (STN) */ - unsigned short lower_margin; /* value in lines (TFT) or 0 (STN) */ - unsigned short vsync_len; /* value in lines (TFT) or 0 (STN) */ - - /* lcd configuration registers */ - unsigned long lcdcon5; -}; - -struct s3c2410fb_mach_info { - - struct s3c2410fb_display *displays; /* attached displays info */ - unsigned num_displays; /* number of defined displays */ - unsigned default_display; - - /* GPIOs */ - - unsigned long gpcup; - unsigned long gpcup_mask; - unsigned long gpccon; - unsigned long gpccon_mask; - unsigned long gpdup; - unsigned long gpdup_mask; - unsigned long gpdcon; - unsigned long gpdcon_mask; - - /* lpc3600 control register */ - unsigned long lpcsel; -}; - -extern void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *); - -#endif /* __ASM_PLAT_FB_S3C2410_H */ diff --git a/arch/arm/plat-samsung/include/plat/fb.h b/arch/arm/plat-samsung/include/plat/fb.h deleted file mode 100644 index 615d381ae32e..000000000000 --- a/arch/arm/plat-samsung/include/plat/fb.h +++ /dev/null @@ -1,31 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks <ben@simtec.co.uk> - * - * S3C - FB platform data definitions - */ - -#ifndef __PLAT_S3C_FB_H -#define __PLAT_S3C_FB_H __FILE__ - -#include <linux/platform_data/video_s3c.h> - -/** - * s3c_fb_set_platdata() - Setup the FB device with platform data. - * @pd: The platform data to set. The data is copied from the passed structure - * so the machine data can mark the data __initdata so that any unused - * machines will end up dumping their data at runtime. - */ -extern void s3c_fb_set_platdata(struct s3c_fb_platdata *pd); - -/** - * s3c64xx_fb_gpio_setup_24bpp() - S3C64XX setup function for 24bpp LCD - * - * Initialise the GPIO for an 24bpp LCD display on the RGB interface. - */ -extern void s3c64xx_fb_gpio_setup_24bpp(void); - -#endif /* __PLAT_S3C_FB_H */ diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h b/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h deleted file mode 100644 index db0c56f5ca15..000000000000 --- a/arch/arm/plat-samsung/include/plat/gpio-cfg-helpers.h +++ /dev/null @@ -1,159 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks <ben@simtec.co.uk> - * - * Samsung Platform - GPIO pin configuration helper definitions - */ - -/* This is meant for core cpu support, machine or other driver files - * should not be including this header. - */ - -#ifndef __PLAT_GPIO_CFG_HELPERS_H -#define __PLAT_GPIO_CFG_HELPERS_H __FILE__ - -/* As a note, all gpio configuration functions are entered exclusively, either - * with the relevant lock held or the system prevented from doing anything else - * by disabling interrupts. -*/ - -static inline int samsung_gpio_do_setcfg(struct samsung_gpio_chip *chip, - unsigned int off, unsigned int config) -{ - return (chip->config->set_config)(chip, off, config); -} - -static inline unsigned samsung_gpio_do_getcfg(struct samsung_gpio_chip *chip, - unsigned int off) -{ - return (chip->config->get_config)(chip, off); -} - -static inline int samsung_gpio_do_setpull(struct samsung_gpio_chip *chip, - unsigned int off, samsung_gpio_pull_t pull) -{ - return (chip->config->set_pull)(chip, off, pull); -} - -static inline samsung_gpio_pull_t samsung_gpio_do_getpull(struct samsung_gpio_chip *chip, - unsigned int off) -{ - return chip->config->get_pull(chip, off); -} - -/* Pull-{up,down} resistor controls. - * - * S3C2410,S3C2440 = Pull-UP, - * S3C2412,S3C2413 = Pull-Down - * S3C6400,S3C6410 = Pull-Both [None,Down,Up,Undef] - * S3C2443 = Pull-Both [not same as S3C6400] - */ - -/** - * s3c24xx_gpio_setpull_1up() - Pull configuration for choice of up or none. - * @chip: The gpio chip that is being configured. - * @off: The offset for the GPIO being configured. - * @param: pull: The pull mode being requested. - * - * This is a helper function for the case where we have GPIOs with one - * bit configuring the presence of a pull-up resistor. - */ -extern int s3c24xx_gpio_setpull_1up(struct samsung_gpio_chip *chip, - unsigned int off, samsung_gpio_pull_t pull); - -/** - * s3c24xx_gpio_setpull_1down() - Pull configuration for choice of down or none - * @chip: The gpio chip that is being configured - * @off: The offset for the GPIO being configured - * @param: pull: The pull mode being requested - * - * This is a helper function for the case where we have GPIOs with one - * bit configuring the presence of a pull-down resistor. - */ -extern int s3c24xx_gpio_setpull_1down(struct samsung_gpio_chip *chip, - unsigned int off, samsung_gpio_pull_t pull); - -/** - * samsung_gpio_setpull_upown() - Pull configuration for choice of up, - * down or none - * - * @chip: The gpio chip that is being configured. - * @off: The offset for the GPIO being configured. - * @param: pull: The pull mode being requested. - * - * This is a helper function for the case where we have GPIOs with two - * bits configuring the presence of a pull resistor, in the following - * order: - * 00 = No pull resistor connected - * 01 = Pull-up resistor connected - * 10 = Pull-down resistor connected - */ -extern int samsung_gpio_setpull_updown(struct samsung_gpio_chip *chip, - unsigned int off, samsung_gpio_pull_t pull); - -/** - * samsung_gpio_getpull_updown() - Get configuration for choice of up, - * down or none - * - * @chip: The gpio chip that the GPIO pin belongs to - * @off: The offset to the pin to get the configuration of. - * - * This helper function reads the state of the pull-{up,down} resistor - * for the given GPIO in the same case as samsung_gpio_setpull_upown. -*/ -extern samsung_gpio_pull_t samsung_gpio_getpull_updown(struct samsung_gpio_chip *chip, - unsigned int off); - -/** - * s3c24xx_gpio_getpull_1up() - Get configuration for choice of up or none - * @chip: The gpio chip that the GPIO pin belongs to - * @off: The offset to the pin to get the configuration of. - * - * This helper function reads the state of the pull-up resistor for the - * given GPIO in the same case as s3c24xx_gpio_setpull_1up. -*/ -extern samsung_gpio_pull_t s3c24xx_gpio_getpull_1up(struct samsung_gpio_chip *chip, - unsigned int off); - -/** - * s3c24xx_gpio_getpull_1down() - Get configuration for choice of down or none - * @chip: The gpio chip that the GPIO pin belongs to - * @off: The offset to the pin to get the configuration of. - * - * This helper function reads the state of the pull-down resistor for the - * given GPIO in the same case as s3c24xx_gpio_setpull_1down. -*/ -extern samsung_gpio_pull_t s3c24xx_gpio_getpull_1down(struct samsung_gpio_chip *chip, - unsigned int off); - -/** - * s3c2443_gpio_setpull() - Pull configuration for s3c2443. - * @chip: The gpio chip that is being configured. - * @off: The offset for the GPIO being configured. - * @param: pull: The pull mode being requested. - * - * This is a helper function for the case where we have GPIOs with two - * bits configuring the presence of a pull resistor, in the following - * order: - * 00 = Pull-up resistor connected - * 10 = Pull-down resistor connected - * x1 = No pull up resistor - */ -extern int s3c2443_gpio_setpull(struct samsung_gpio_chip *chip, - unsigned int off, samsung_gpio_pull_t pull); - -/** - * s3c2443_gpio_getpull() - Get configuration for s3c2443 pull resistors - * @chip: The gpio chip that the GPIO pin belongs to. - * @off: The offset to the pin to get the configuration of. - * - * This helper function reads the state of the pull-{up,down} resistor for the - * given GPIO in the same case as samsung_gpio_setpull_upown. -*/ -extern samsung_gpio_pull_t s3c2443_gpio_getpull(struct samsung_gpio_chip *chip, - unsigned int off); - -#endif /* __PLAT_GPIO_CFG_HELPERS_H */ diff --git a/arch/arm/plat-samsung/include/plat/gpio-cfg.h b/arch/arm/plat-samsung/include/plat/gpio-cfg.h deleted file mode 100644 index 469c220e092b..000000000000 --- a/arch/arm/plat-samsung/include/plat/gpio-cfg.h +++ /dev/null @@ -1,178 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks <ben@simtec.co.uk> - * - * S3C Platform - GPIO pin configuration - */ - -/* This file contains the necessary definitions to get the basic gpio - * pin configuration done such as setting a pin to input or output or - * changing the pull-{up,down} configurations. - */ - -/* Note, this interface is being added to the s3c64xx arch first and will - * be added to the s3c24xx systems later. - */ - -#ifndef __PLAT_GPIO_CFG_H -#define __PLAT_GPIO_CFG_H __FILE__ - -#include <linux/types.h> - -typedef unsigned int __bitwise samsung_gpio_pull_t; - -/* forward declaration if gpio-core.h hasn't been included */ -struct samsung_gpio_chip; - -/** - * struct samsung_gpio_cfg GPIO configuration - * @cfg_eint: Configuration setting when used for external interrupt source - * @get_pull: Read the current pull configuration for the GPIO - * @set_pull: Set the current pull configuration for the GPIO - * @set_config: Set the current configuration for the GPIO - * @get_config: Read the current configuration for the GPIO - * - * Each chip can have more than one type of GPIO bank available and some - * have different capabilites even when they have the same control register - * layouts. Provide an point to vector control routine and provide any - * per-bank configuration information that other systems such as the - * external interrupt code will need. - * - * @sa samsung_gpio_cfgpin - * @sa s3c_gpio_getcfg - * @sa s3c_gpio_setpull - * @sa s3c_gpio_getpull - */ -struct samsung_gpio_cfg { - unsigned int cfg_eint; - - samsung_gpio_pull_t (*get_pull)(struct samsung_gpio_chip *chip, unsigned offs); - int (*set_pull)(struct samsung_gpio_chip *chip, unsigned offs, - samsung_gpio_pull_t pull); - - unsigned (*get_config)(struct samsung_gpio_chip *chip, unsigned offs); - int (*set_config)(struct samsung_gpio_chip *chip, unsigned offs, - unsigned config); -}; - -#define S3C_GPIO_SPECIAL_MARK (0xfffffff0) -#define S3C_GPIO_SPECIAL(x) (S3C_GPIO_SPECIAL_MARK | (x)) - -/* Defines for generic pin configurations */ -#define S3C_GPIO_INPUT (S3C_GPIO_SPECIAL(0)) -#define S3C_GPIO_OUTPUT (S3C_GPIO_SPECIAL(1)) -#define S3C_GPIO_SFN(x) (S3C_GPIO_SPECIAL(x)) - -#define samsung_gpio_is_cfg_special(_cfg) \ - (((_cfg) & S3C_GPIO_SPECIAL_MARK) == S3C_GPIO_SPECIAL_MARK) - -/** - * s3c_gpio_cfgpin() - Change the GPIO function of a pin. - * @pin pin The pin number to configure. - * @to to The configuration for the pin's function. - * - * Configure which function is actually connected to the external - * pin, such as an gpio input, output or some form of special function - * connected to an internal peripheral block. - * - * The @to parameter can be one of the generic S3C_GPIO_INPUT, S3C_GPIO_OUTPUT - * or S3C_GPIO_SFN() to indicate one of the possible values that the helper - * will then generate the correct bit mask and shift for the configuration. - * - * If a bank of GPIOs all needs to be set to special-function 2, then - * the following code will work: - * - * for (gpio = start; gpio < end; gpio++) - * s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(2)); - * - * The @to parameter can also be a specific value already shifted to the - * correct position in the control register, although these are discouraged - * in newer kernels and are only being kept for compatibility. - */ -extern int s3c_gpio_cfgpin(unsigned int pin, unsigned int to); - -/** - * s3c_gpio_getcfg - Read the current function for a GPIO pin - * @pin: The pin to read the configuration value for. - * - * Read the configuration state of the given @pin, returning a value that - * could be passed back to s3c_gpio_cfgpin(). - * - * @sa s3c_gpio_cfgpin - */ -extern unsigned s3c_gpio_getcfg(unsigned int pin); - -/** - * s3c_gpio_cfgpin_range() - Change the GPIO function for configuring pin range - * @start: The pin number to start at - * @nr: The number of pins to configure from @start. - * @cfg: The configuration for the pin's function - * - * Call s3c_gpio_cfgpin() for the @nr pins starting at @start. - * - * @sa s3c_gpio_cfgpin. - */ -extern int s3c_gpio_cfgpin_range(unsigned int start, unsigned int nr, - unsigned int cfg); - -/* Define values for the pull-{up,down} available for each gpio pin. - * - * These values control the state of the weak pull-{up,down} resistors - * available on most pins on the S3C series. Not all chips support both - * up or down settings, and it may be dependent on the chip that is being - * used to whether the particular mode is available. - */ -#define S3C_GPIO_PULL_NONE ((__force samsung_gpio_pull_t)0x00) -#define S3C_GPIO_PULL_DOWN ((__force samsung_gpio_pull_t)0x01) -#define S3C_GPIO_PULL_UP ((__force samsung_gpio_pull_t)0x02) - -/** - * s3c_gpio_setpull() - set the state of a gpio pin pull resistor - * @pin: The pin number to configure the pull resistor. - * @pull: The configuration for the pull resistor. - * - * This function sets the state of the pull-{up,down} resistor for the - * specified pin. It will return 0 if successful, or a negative error - * code if the pin cannot support the requested pull setting. - * - * @pull is one of S3C_GPIO_PULL_NONE, S3C_GPIO_PULL_DOWN or S3C_GPIO_PULL_UP. -*/ -extern int s3c_gpio_setpull(unsigned int pin, samsung_gpio_pull_t pull); - -/** - * s3c_gpio_getpull() - get the pull resistor state of a gpio pin - * @pin: The pin number to get the settings for - * - * Read the pull resistor value for the specified pin. -*/ -extern samsung_gpio_pull_t s3c_gpio_getpull(unsigned int pin); - -/* configure `all` aspects of an gpio */ - -/** - * s3c_gpio_cfgall_range() - configure range of gpio functtion and pull. - * @start: The gpio number to start at. - * @nr: The number of gpio to configure from @start. - * @cfg: The configuration to use - * @pull: The pull setting to use. - * - * Run s3c_gpio_cfgpin() and s3c_gpio_setpull() over the gpio range starting - * @gpio and running for @size. - * - * @sa s3c_gpio_cfgpin - * @sa s3c_gpio_setpull - * @sa s3c_gpio_cfgpin_range - */ -extern int s3c_gpio_cfgall_range(unsigned int start, unsigned int nr, - unsigned int cfg, samsung_gpio_pull_t pull); - -static inline int s3c_gpio_cfgrange_nopull(unsigned int pin, unsigned int size, - unsigned int cfg) -{ - return s3c_gpio_cfgall_range(pin, size, cfg, S3C_GPIO_PULL_NONE); -} - -#endif /* __PLAT_GPIO_CFG_H */ diff --git a/arch/arm/plat-samsung/include/plat/gpio-core.h b/arch/arm/plat-samsung/include/plat/gpio-core.h deleted file mode 100644 index c0bfceb88340..000000000000 --- a/arch/arm/plat-samsung/include/plat/gpio-core.h +++ /dev/null @@ -1,142 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright 2008 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks <ben@simtec.co.uk> - * - * S3C Platform - GPIO core - */ - -#ifndef __PLAT_SAMSUNG_GPIO_CORE_H -#define __PLAT_SAMSUNG_GPIO_CORE_H - -/* Bring in machine-local definitions, especially S3C_GPIO_END */ -#include <mach/gpio-samsung.h> -#include <linux/gpio/driver.h> - -#define GPIOCON_OFF (0x00) -#define GPIODAT_OFF (0x04) - -#define con_4bit_shift(__off) ((__off) * 4) - -/* Define the core gpiolib support functions that the s3c platforms may - * need to extend or change depending on the hardware and the s3c chip - * selected at build or found at run time. - * - * These definitions are not intended for driver inclusion, there is - * nothing here that should not live outside the platform and core - * specific code. -*/ - -struct samsung_gpio_chip; - -/** - * struct samsung_gpio_pm - power management (suspend/resume) information - * @save: Routine to save the state of the GPIO block - * @resume: Routine to resume the GPIO block. - */ -struct samsung_gpio_pm { - void (*save)(struct samsung_gpio_chip *chip); - void (*resume)(struct samsung_gpio_chip *chip); -}; - -struct samsung_gpio_cfg; - -/** - * struct samsung_gpio_chip - wrapper for specific implementation of gpio - * @chip: The chip structure to be exported via gpiolib. - * @base: The base pointer to the gpio configuration registers. - * @group: The group register number for gpio interrupt support. - * @irq_base: The base irq number. - * @config: special function and pull-resistor control information. - * @lock: Lock for exclusive access to this gpio bank. - * @pm_save: Save information for suspend/resume support. - * @bitmap_gpio_int: Bitmap for representing GPIO interrupt or not. - * - * This wrapper provides the necessary information for the Samsung - * specific gpios being registered with gpiolib. - * - * The lock protects each gpio bank from multiple access of the shared - * configuration registers, or from reading of data whilst another thread - * is writing to the register set. - * - * Each chip has its own lock to avoid any contention between different - * CPU cores trying to get one lock for different GPIO banks, where each - * bank of GPIO has its own register space and configuration registers. - */ -struct samsung_gpio_chip { - struct gpio_chip chip; - struct samsung_gpio_cfg *config; - struct samsung_gpio_pm *pm; - void __iomem *base; - int irq_base; - int group; - spinlock_t lock; -#ifdef CONFIG_PM - u32 pm_save[4]; -#endif - u32 bitmap_gpio_int; -}; - -static inline struct samsung_gpio_chip *to_samsung_gpio(struct gpio_chip *gpc) -{ - return container_of(gpc, struct samsung_gpio_chip, chip); -} - -/** - * samsung_gpiolib_to_irq - convert gpio pin to irq number - * @chip: The gpio chip that the pin belongs to. - * @offset: The offset of the pin in the chip. - * - * This helper returns the irq number calculated from the chip->irq_base and - * the provided offset. - */ -extern int samsung_gpiolib_to_irq(struct gpio_chip *chip, unsigned int offset); - -/* exported for core SoC support to change */ -extern struct samsung_gpio_cfg s3c24xx_gpiocfg_default; - -#ifdef CONFIG_S3C_GPIO_TRACK -extern struct samsung_gpio_chip *s3c_gpios[S3C_GPIO_END]; - -static inline struct samsung_gpio_chip *samsung_gpiolib_getchip(unsigned int chip) -{ - return (chip < S3C_GPIO_END) ? s3c_gpios[chip] : NULL; -} -#else -/* machine specific code should provide samsung_gpiolib_getchip */ - -extern struct samsung_gpio_chip s3c24xx_gpios[]; - -static inline struct samsung_gpio_chip *samsung_gpiolib_getchip(unsigned int pin) -{ - struct samsung_gpio_chip *chip; - - if (pin > S3C_GPIO_END) - return NULL; - - chip = &s3c24xx_gpios[pin/32]; - return ((pin - chip->chip.base) < chip->chip.ngpio) ? chip : NULL; -} - -static inline void s3c_gpiolib_track(struct samsung_gpio_chip *chip) { } -#endif - -#ifdef CONFIG_PM -extern struct samsung_gpio_pm samsung_gpio_pm_1bit; -extern struct samsung_gpio_pm samsung_gpio_pm_2bit; -extern struct samsung_gpio_pm samsung_gpio_pm_4bit; -#define __gpio_pm(x) x -#else -#define samsung_gpio_pm_1bit NULL -#define samsung_gpio_pm_2bit NULL -#define samsung_gpio_pm_4bit NULL -#define __gpio_pm(x) NULL - -#endif /* CONFIG_PM */ - -/* locking wrappers to deal with multiple access to the same gpio bank */ -#define samsung_gpio_lock(_oc, _fl) spin_lock_irqsave(&(_oc)->lock, _fl) -#define samsung_gpio_unlock(_oc, _fl) spin_unlock_irqrestore(&(_oc)->lock, _fl) - -#endif /* __PLAT_SAMSUNG_GPIO_CORE_H */ diff --git a/arch/arm/plat-samsung/include/plat/iic-core.h b/arch/arm/plat-samsung/include/plat/iic-core.h deleted file mode 100644 index c5cfd5af3874..000000000000 --- a/arch/arm/plat-samsung/include/plat/iic-core.h +++ /dev/null @@ -1,38 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * S3C - I2C Controller core functions - */ - -#ifndef __ASM_ARCH_IIC_CORE_H -#define __ASM_ARCH_IIC_CORE_H __FILE__ - -/* These functions are only for use with the core support code, such as - * the cpu specific initialisation code - */ - -/* re-define device name depending on support. */ -static inline void s3c_i2c0_setname(char *name) -{ - /* currently this device is always compiled in */ - s3c_device_i2c0.name = name; -} - -static inline void s3c_i2c1_setname(char *name) -{ -#ifdef CONFIG_S3C_DEV_I2C1 - s3c_device_i2c1.name = name; -#endif -} - -static inline void s3c_i2c2_setname(char *name) -{ -#ifdef CONFIG_S3C_DEV_I2C2 - s3c_device_i2c2.name = name; -#endif -} - -#endif /* __ASM_ARCH_IIC_H */ diff --git a/arch/arm/plat-samsung/include/plat/keypad.h b/arch/arm/plat-samsung/include/plat/keypad.h deleted file mode 100644 index 9754b9a29945..000000000000 --- a/arch/arm/plat-samsung/include/plat/keypad.h +++ /dev/null @@ -1,27 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Samsung Platform - Keypad platform data definitions - * - * Copyright (C) 2010 Samsung Electronics Co.Ltd - * Author: Joonyoung Shim <jy0922.shim@samsung.com> - */ - -#ifndef __PLAT_SAMSUNG_KEYPAD_H -#define __PLAT_SAMSUNG_KEYPAD_H - -#include <linux/input/samsung-keypad.h> - -/** - * samsung_keypad_set_platdata - Set platform data for Samsung Keypad device. - * @pd: Platform data to register to device. - * - * Register the given platform data for use with Samsung Keypad device. - * The call will copy the platform data, so the board definitions can - * make the structure itself __initdata. - */ -extern void samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd); - -/* defined by architecture to configure gpio. */ -extern void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols); - -#endif /* __PLAT_SAMSUNG_KEYPAD_H */ diff --git a/arch/arm/plat-samsung/include/plat/map-base.h b/arch/arm/plat-samsung/include/plat/map-base.h deleted file mode 100644 index 34b39ded0e2e..000000000000 --- a/arch/arm/plat-samsung/include/plat/map-base.h +++ /dev/null @@ -1,42 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright 2003, 2007 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks <ben@simtec.co.uk> - * - * S3C - Memory map definitions (virtual addresses) - */ - -#ifndef __ASM_PLAT_MAP_H -#define __ASM_PLAT_MAP_H __FILE__ - -/* Fit all our registers in at 0xF6000000 upwards, trying to use as - * little of the VA space as possible so vmalloc and friends have a - * better chance of getting memory. - * - * we try to ensure stuff like the IRQ registers are available for - * an single MOVS instruction (ie, only 8 bits of set data) - */ - -#define S3C_ADDR_BASE 0xF6000000 - -#ifndef __ASSEMBLY__ -#define S3C_ADDR(x) ((void __iomem __force *)S3C_ADDR_BASE + (x)) -#else -#define S3C_ADDR(x) (S3C_ADDR_BASE + (x)) -#endif - -#define S3C_VA_IRQ S3C_ADDR(0x00000000) /* irq controller(s) */ -#define S3C_VA_SYS S3C_ADDR(0x00100000) /* system control */ -#define S3C_VA_MEM S3C_ADDR(0x00200000) /* memory control */ -#define S3C_VA_TIMER S3C_ADDR(0x00300000) /* timer block */ -#define S3C_VA_WATCHDOG S3C_ADDR(0x00400000) /* watchdog */ -#define S3C_VA_UART S3C_ADDR(0x01000000) /* UART */ - -/* This is used for the CPU specific mappings that may be needed, so that - * they do not need to directly used S3C_ADDR() and thus make it easier to - * modify the space for mapping. - */ -#define S3C_ADDR_CPU(x) S3C_ADDR(0x00500000 + (x)) - -#endif /* __ASM_PLAT_MAP_H */ diff --git a/arch/arm/plat-samsung/include/plat/map-s3c.h b/arch/arm/plat-samsung/include/plat/map-s3c.h deleted file mode 100644 index 4244acbf4b65..000000000000 --- a/arch/arm/plat-samsung/include/plat/map-s3c.h +++ /dev/null @@ -1,76 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2008 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * - * S3C24XX - Memory map definitions - */ - -#ifndef __ASM_PLAT_MAP_S3C_H -#define __ASM_PLAT_MAP_S3C_H __FILE__ - -#define S3C24XX_VA_IRQ S3C_VA_IRQ -#define S3C24XX_VA_MEMCTRL S3C_VA_MEM -#define S3C24XX_VA_UART S3C_VA_UART - -#define S3C24XX_VA_TIMER S3C_VA_TIMER -#define S3C24XX_VA_CLKPWR S3C_VA_SYS -#define S3C24XX_VA_WATCHDOG S3C_VA_WATCHDOG - -#define S3C2412_VA_SSMC S3C_ADDR_CPU(0x00000000) -#define S3C2412_VA_EBI S3C_ADDR_CPU(0x00100000) - -#define S3C2410_PA_UART (0x50000000) -#define S3C24XX_PA_UART S3C2410_PA_UART - -/* - * GPIO ports - * - * the calculation for the VA of this must ensure that - * it is the same distance apart from the UART in the - * phsyical address space, as the initial mapping for the IO - * is done as a 1:1 mapping. This puts it (currently) at - * 0xFA800000, which is not in the way of any current mapping - * by the base system. -*/ - -#define S3C2410_PA_GPIO (0x56000000) -#define S3C24XX_PA_GPIO S3C2410_PA_GPIO - -#define S3C24XX_VA_GPIO ((S3C24XX_PA_GPIO - S3C24XX_PA_UART) + S3C24XX_VA_UART) -#define S3C64XX_VA_GPIO S3C_ADDR_CPU(0x00000000) - -#define S3C64XX_VA_MODEM S3C_ADDR_CPU(0x00100000) -#define S3C64XX_VA_USB_HSPHY S3C_ADDR_CPU(0x00200000) - -#define S3C_VA_USB_HSPHY S3C64XX_VA_USB_HSPHY - -/* - * ISA style IO, for each machine to sort out mappings for, - * if it implements it. We reserve two 16M regions for ISA. - */ - -#define S3C2410_ADDR(x) S3C_ADDR(x) - -#define S3C24XX_VA_ISA_WORD S3C2410_ADDR(0x02000000) -#define S3C24XX_VA_ISA_BYTE S3C2410_ADDR(0x03000000) - -/* deal with the registers that move under the 2412/2413 */ - -#if defined(CONFIG_CPU_S3C2412) -#ifndef __ASSEMBLY__ -extern void __iomem *s3c24xx_va_gpio2; -#endif -#ifdef CONFIG_CPU_S3C2412_ONLY -#define S3C24XX_VA_GPIO2 (S3C24XX_VA_GPIO + 0x10) -#else -#define S3C24XX_VA_GPIO2 s3c24xx_va_gpio2 -#endif -#else -#define s3c24xx_va_gpio2 S3C24XX_VA_GPIO -#define S3C24XX_VA_GPIO2 S3C24XX_VA_GPIO -#endif - -#include <plat/map-s5p.h> - -#endif /* __ASM_PLAT_MAP_S3C_H */ diff --git a/arch/arm/plat-samsung/include/plat/map-s5p.h b/arch/arm/plat-samsung/include/plat/map-s5p.h deleted file mode 100644 index d69a0ca09fb5..000000000000 --- a/arch/arm/plat-samsung/include/plat/map-s5p.h +++ /dev/null @@ -1,22 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2010 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * S5P - Memory map definitions - */ - -#ifndef __ASM_PLAT_MAP_S5P_H -#define __ASM_PLAT_MAP_S5P_H __FILE__ - -#define S5P_VA_CHIPID S3C_ADDR(0x02000000) - -#define VA_VIC(x) (S3C_VA_IRQ + ((x) * 0x10000)) -#define VA_VIC0 VA_VIC(0) -#define VA_VIC1 VA_VIC(1) -#define VA_VIC2 VA_VIC(2) -#define VA_VIC3 VA_VIC(3) - -#include <plat/map-s3c.h> - -#endif /* __ASM_PLAT_MAP_S5P_H */ diff --git a/arch/arm/plat-samsung/include/plat/pm-common.h b/arch/arm/plat-samsung/include/plat/pm-common.h deleted file mode 100644 index 1268bae04234..000000000000 --- a/arch/arm/plat-samsung/include/plat/pm-common.h +++ /dev/null @@ -1,107 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (C) 2013 Samsung Electronics Co., Ltd. - * Tomasz Figa <t.figa@samsung.com> - * Copyright (c) 2004 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Written by Ben Dooks, <ben@simtec.co.uk> - */ - -#ifndef __PLAT_SAMSUNG_PM_COMMON_H -#define __PLAT_SAMSUNG_PM_COMMON_H __FILE__ - -#include <linux/irq.h> - -/* sleep save info */ - -/** - * struct sleep_save - save information for shared peripherals. - * @reg: Pointer to the register to save. - * @val: Holder for the value saved from reg. - * - * This describes a list of registers which is used by the pm core and - * other subsystem to save and restore register values over suspend. - */ -struct sleep_save { - void __iomem *reg; - unsigned long val; -}; - -#define SAVE_ITEM(x) \ - { .reg = (x) } - -/* helper functions to save/restore lists of registers. */ - -extern void s3c_pm_do_save(struct sleep_save *ptr, int count); -extern void s3c_pm_do_restore(const struct sleep_save *ptr, int count); -extern void s3c_pm_do_restore_core(const struct sleep_save *ptr, int count); - -/* PM debug functions */ - -/** - * struct pm_uart_save - save block for core UART - * @ulcon: Save value for S3C2410_ULCON - * @ucon: Save value for S3C2410_UCON - * @ufcon: Save value for S3C2410_UFCON - * @umcon: Save value for S3C2410_UMCON - * @ubrdiv: Save value for S3C2410_UBRDIV - * - * Save block for UART registers to be held over sleep and restored if they - * are needed (say by debug). -*/ -struct pm_uart_save { - u32 ulcon; - u32 ucon; - u32 ufcon; - u32 umcon; - u32 ubrdiv; - u32 udivslot; -}; - -#ifdef CONFIG_SAMSUNG_PM_DEBUG -/** - * s3c_pm_dbg() - low level debug function for use in suspend/resume. - * @msg: The message to print. - * - * This function is used mainly to debug the resume process before the system - * can rely on printk/console output. It uses the low-level debugging output - * routine printascii() to do its work. - */ -extern void s3c_pm_dbg(const char *msg, ...); - -/** - * s3c_pm_debug_init() - suspend/resume low level debug initialization. - * @base: Virtual base of UART to use for suspend/resume debugging. - * - * This function needs to be called before S3C_PMDBG() can be used, to set up - * UART port base address and configuration. - */ -extern void s3c_pm_debug_init(void); - -#define S3C_PMDBG(fmt...) s3c_pm_dbg(fmt) - -extern void s3c_pm_save_uarts(void); -extern void s3c_pm_restore_uarts(void); -#else -#define S3C_PMDBG(fmt...) pr_debug(fmt) -#define s3c_pm_debug_init() do { } while (0) - -static inline void s3c_pm_save_uarts(void) { } -static inline void s3c_pm_restore_uarts(void) { } -#endif - -/* suspend memory checking */ - -#ifdef CONFIG_SAMSUNG_PM_CHECK -extern void s3c_pm_check_prepare(void); -extern void s3c_pm_check_restore(void); -extern void s3c_pm_check_cleanup(void); -extern void s3c_pm_check_store(void); -#else -#define s3c_pm_check_prepare() do { } while (0) -#define s3c_pm_check_restore() do { } while (0) -#define s3c_pm_check_cleanup() do { } while (0) -#define s3c_pm_check_store() do { } while (0) -#endif - -#endif diff --git a/arch/arm/plat-samsung/include/plat/pm.h b/arch/arm/plat-samsung/include/plat/pm.h deleted file mode 100644 index 2746137f9794..000000000000 --- a/arch/arm/plat-samsung/include/plat/pm.h +++ /dev/null @@ -1,109 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2004 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Written by Ben Dooks, <ben@simtec.co.uk> - */ - -/* s3c_pm_init - * - * called from board at initialisation time to setup the power - * management -*/ - -#include <plat/pm-common.h> - -struct device; - -#ifdef CONFIG_SAMSUNG_PM - -extern __init int s3c_pm_init(void); -extern __init int s3c64xx_pm_init(void); - -#else - -static inline int s3c_pm_init(void) -{ - return 0; -} - -static inline int s3c64xx_pm_init(void) -{ - return 0; -} -#endif - -/* configuration for the IRQ mask over sleep */ -extern unsigned long s3c_irqwake_intmask; -extern unsigned long s3c_irqwake_eintmask; - -/* per-cpu sleep functions */ - -extern void (*pm_cpu_prep)(void); -extern int (*pm_cpu_sleep)(unsigned long); - -/* Flags for PM Control */ - -extern unsigned long s3c_pm_flags; - -/* from sleep.S */ - -extern int s3c2410_cpu_suspend(unsigned long); - -#ifdef CONFIG_PM_SLEEP -extern int s3c_irq_wake(struct irq_data *data, unsigned int state); -extern void s3c_cpu_resume(void); -#else -#define s3c_irq_wake NULL -#define s3c_cpu_resume NULL -#endif - -#ifdef CONFIG_SAMSUNG_PM -extern int s3c_irqext_wake(struct irq_data *data, unsigned int state); -#else -#define s3c_irqext_wake NULL -#endif - -#ifdef CONFIG_S3C_PM_DEBUG_LED_SMDK -/** - * s3c_pm_debug_smdkled() - Debug PM suspend/resume via SMDK Board LEDs - * @set: set bits for the state of the LEDs - * @clear: clear bits for the state of the LEDs. - */ -extern void s3c_pm_debug_smdkled(u32 set, u32 clear); - -#else -static inline void s3c_pm_debug_smdkled(u32 set, u32 clear) { } -#endif /* CONFIG_S3C_PM_DEBUG_LED_SMDK */ - -/** - * s3c_pm_configure_extint() - ensure pins are correctly set for IRQ - * - * Setup all the necessary GPIO pins for waking the system on external - * interrupt. - */ -extern void s3c_pm_configure_extint(void); - -#ifdef CONFIG_GPIO_SAMSUNG -/** - * samsung_pm_restore_gpios() - restore the state of the gpios after sleep. - * - * Restore the state of the GPIO pins after sleep, which may involve ensuring - * that we do not glitch the state of the pins from that the bootloader's - * resume code has done. -*/ -extern void samsung_pm_restore_gpios(void); - -/** - * samsung_pm_save_gpios() - save the state of the GPIOs for restoring after sleep. - * - * Save the GPIO states for resotration on resume. See samsung_pm_restore_gpios(). - */ -extern void samsung_pm_save_gpios(void); -#else -static inline void samsung_pm_restore_gpios(void) {} -static inline void samsung_pm_save_gpios(void) {} -#endif - -extern void s3c_pm_save_core(void); -extern void s3c_pm_restore_core(void); diff --git a/arch/arm/plat-samsung/include/plat/pwm-core.h b/arch/arm/plat-samsung/include/plat/pwm-core.h deleted file mode 100644 index 05e3448642a1..000000000000 --- a/arch/arm/plat-samsung/include/plat/pwm-core.h +++ /dev/null @@ -1,19 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright 2013 Tomasz Figa <tomasz.figa@gmail.com> - * - * Samsung PWM controller platform data helpers. - */ - -#ifndef __ASM_ARCH_PWM_CORE_H -#define __ASM_ARCH_PWM_CORE_H __FILE__ - -#include <clocksource/samsung_pwm.h> - -#ifdef CONFIG_SAMSUNG_DEV_PWM -extern void samsung_pwm_set_platdata(struct samsung_pwm_variant *pd); -#else -static inline void samsung_pwm_set_platdata(struct samsung_pwm_variant *pd) { } -#endif - -#endif /* __ASM_ARCH_PWM_CORE_H */ diff --git a/arch/arm/plat-samsung/include/plat/regs-adc.h b/arch/arm/plat-samsung/include/plat/regs-adc.h deleted file mode 100644 index 58953c7381dd..000000000000 --- a/arch/arm/plat-samsung/include/plat/regs-adc.h +++ /dev/null @@ -1,64 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2004 Shannon Holland <holland@loser.net> - * - * S3C2410 ADC registers - */ - -#ifndef __ASM_ARCH_REGS_ADC_H -#define __ASM_ARCH_REGS_ADC_H "regs-adc.h" - -#define S3C2410_ADCREG(x) (x) - -#define S3C2410_ADCCON S3C2410_ADCREG(0x00) -#define S3C2410_ADCTSC S3C2410_ADCREG(0x04) -#define S3C2410_ADCDLY S3C2410_ADCREG(0x08) -#define S3C2410_ADCDAT0 S3C2410_ADCREG(0x0C) -#define S3C2410_ADCDAT1 S3C2410_ADCREG(0x10) -#define S3C64XX_ADCUPDN S3C2410_ADCREG(0x14) -#define S3C2443_ADCMUX S3C2410_ADCREG(0x18) -#define S3C64XX_ADCCLRINT S3C2410_ADCREG(0x18) -#define S5P_ADCMUX S3C2410_ADCREG(0x1C) -#define S3C64XX_ADCCLRINTPNDNUP S3C2410_ADCREG(0x20) - - -/* ADCCON Register Bits */ -#define S3C64XX_ADCCON_RESSEL (1<<16) -#define S3C2410_ADCCON_ECFLG (1<<15) -#define S3C2410_ADCCON_PRSCEN (1<<14) -#define S3C2410_ADCCON_PRSCVL(x) (((x)&0xFF)<<6) -#define S3C2410_ADCCON_PRSCVLMASK (0xFF<<6) -#define S3C2410_ADCCON_SELMUX(x) (((x)&0x7)<<3) -#define S3C2410_ADCCON_MUXMASK (0x7<<3) -#define S3C2416_ADCCON_RESSEL (1 << 3) -#define S3C2410_ADCCON_STDBM (1<<2) -#define S3C2410_ADCCON_READ_START (1<<1) -#define S3C2410_ADCCON_ENABLE_START (1<<0) -#define S3C2410_ADCCON_STARTMASK (0x3<<0) - - -/* ADCTSC Register Bits */ -#define S3C2443_ADCTSC_UD_SEN (1 << 8) -#define S3C2410_ADCTSC_YM_SEN (1<<7) -#define S3C2410_ADCTSC_YP_SEN (1<<6) -#define S3C2410_ADCTSC_XM_SEN (1<<5) -#define S3C2410_ADCTSC_XP_SEN (1<<4) -#define S3C2410_ADCTSC_PULL_UP_DISABLE (1<<3) -#define S3C2410_ADCTSC_AUTO_PST (1<<2) -#define S3C2410_ADCTSC_XY_PST(x) (((x)&0x3)<<0) - -/* ADCDAT0 Bits */ -#define S3C2410_ADCDAT0_UPDOWN (1<<15) -#define S3C2410_ADCDAT0_AUTO_PST (1<<14) -#define S3C2410_ADCDAT0_XY_PST (0x3<<12) -#define S3C2410_ADCDAT0_XPDATA_MASK (0x03FF) - -/* ADCDAT1 Bits */ -#define S3C2410_ADCDAT1_UPDOWN (1<<15) -#define S3C2410_ADCDAT1_AUTO_PST (1<<14) -#define S3C2410_ADCDAT1_XY_PST (0x3<<12) -#define S3C2410_ADCDAT1_YPDATA_MASK (0x03FF) - -#endif /* __ASM_ARCH_REGS_ADC_H */ - - diff --git a/arch/arm/plat-samsung/include/plat/regs-irqtype.h b/arch/arm/plat-samsung/include/plat/regs-irqtype.h deleted file mode 100644 index ec5c4c5fdd8f..000000000000 --- a/arch/arm/plat-samsung/include/plat/regs-irqtype.h +++ /dev/null @@ -1,17 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright 2008 Simtec Electronics - * Ben Dooks <ben@simtec.co.uk> - * http://armlinux.simtec.co.uk/ - * - * S3C - IRQ detection types. - */ - -/* values for S3C2410_EXTINT0/1/2 and other cpus in the series, including - * the S3C64XX -*/ -#define S3C2410_EXTINT_LOWLEV (0x00) -#define S3C2410_EXTINT_HILEV (0x01) -#define S3C2410_EXTINT_FALLEDGE (0x02) -#define S3C2410_EXTINT_RISEEDGE (0x04) -#define S3C2410_EXTINT_BOTHEDGE (0x06) diff --git a/arch/arm/plat-samsung/include/plat/regs-spi.h b/arch/arm/plat-samsung/include/plat/regs-spi.h deleted file mode 100644 index 607844311566..000000000000 --- a/arch/arm/plat-samsung/include/plat/regs-spi.h +++ /dev/null @@ -1,44 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2004 Fetron GmbH - * - * S3C2410 SPI register definition - */ - -#ifndef __ASM_ARCH_REGS_SPI_H -#define __ASM_ARCH_REGS_SPI_H - -#define S3C2410_SPI1 (0x20) -#define S3C2412_SPI1 (0x100) - -#define S3C2410_SPCON (0x00) - -#define S3C2410_SPCON_SMOD_DMA (2 << 5) /* DMA mode */ -#define S3C2410_SPCON_SMOD_INT (1 << 5) /* interrupt mode */ -#define S3C2410_SPCON_SMOD_POLL (0 << 5) /* polling mode */ -#define S3C2410_SPCON_ENSCK (1 << 4) /* Enable SCK */ -#define S3C2410_SPCON_MSTR (1 << 3) /* Master:1, Slave:0 select */ -#define S3C2410_SPCON_CPOL_HIGH (1 << 2) /* Clock polarity select */ -#define S3C2410_SPCON_CPOL_LOW (0 << 2) /* Clock polarity select */ - -#define S3C2410_SPCON_CPHA_FMTB (1 << 1) /* Clock Phase Select */ -#define S3C2410_SPCON_CPHA_FMTA (0 << 1) /* Clock Phase Select */ - -#define S3C2410_SPSTA (0x04) - -#define S3C2410_SPSTA_DCOL (1 << 2) /* Data Collision Error */ -#define S3C2410_SPSTA_MULD (1 << 1) /* Multi Master Error */ -#define S3C2410_SPSTA_READY (1 << 0) /* Data Tx/Rx ready */ -#define S3C2412_SPSTA_READY_ORG (1 << 3) - -#define S3C2410_SPPIN (0x08) - -#define S3C2410_SPPIN_ENMUL (1 << 2) /* Multi Master Error detect */ -#define S3C2410_SPPIN_RESERVED (1 << 1) -#define S3C2410_SPPIN_KEEP (1 << 0) /* Master Out keep */ - -#define S3C2410_SPPRE (0x0C) -#define S3C2410_SPTDAT (0x10) -#define S3C2410_SPRDAT (0x14) - -#endif /* __ASM_ARCH_REGS_SPI_H */ diff --git a/arch/arm/plat-samsung/include/plat/regs-udc.h b/arch/arm/plat-samsung/include/plat/regs-udc.h deleted file mode 100644 index d8d2eeaca088..000000000000 --- a/arch/arm/plat-samsung/include/plat/regs-udc.h +++ /dev/null @@ -1,146 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2004 Herbert Poetzl <herbert@13thfloor.at> - */ - -#ifndef __ASM_ARCH_REGS_UDC_H -#define __ASM_ARCH_REGS_UDC_H - -#define S3C2410_USBDREG(x) (x) - -#define S3C2410_UDC_FUNC_ADDR_REG S3C2410_USBDREG(0x0140) -#define S3C2410_UDC_PWR_REG S3C2410_USBDREG(0x0144) -#define S3C2410_UDC_EP_INT_REG S3C2410_USBDREG(0x0148) - -#define S3C2410_UDC_USB_INT_REG S3C2410_USBDREG(0x0158) -#define S3C2410_UDC_EP_INT_EN_REG S3C2410_USBDREG(0x015c) - -#define S3C2410_UDC_USB_INT_EN_REG S3C2410_USBDREG(0x016c) - -#define S3C2410_UDC_FRAME_NUM1_REG S3C2410_USBDREG(0x0170) -#define S3C2410_UDC_FRAME_NUM2_REG S3C2410_USBDREG(0x0174) - -#define S3C2410_UDC_EP0_FIFO_REG S3C2410_USBDREG(0x01c0) -#define S3C2410_UDC_EP1_FIFO_REG S3C2410_USBDREG(0x01c4) -#define S3C2410_UDC_EP2_FIFO_REG S3C2410_USBDREG(0x01c8) -#define S3C2410_UDC_EP3_FIFO_REG S3C2410_USBDREG(0x01cc) -#define S3C2410_UDC_EP4_FIFO_REG S3C2410_USBDREG(0x01d0) - -#define S3C2410_UDC_EP1_DMA_CON S3C2410_USBDREG(0x0200) -#define S3C2410_UDC_EP1_DMA_UNIT S3C2410_USBDREG(0x0204) -#define S3C2410_UDC_EP1_DMA_FIFO S3C2410_USBDREG(0x0208) -#define S3C2410_UDC_EP1_DMA_TTC_L S3C2410_USBDREG(0x020c) -#define S3C2410_UDC_EP1_DMA_TTC_M S3C2410_USBDREG(0x0210) -#define S3C2410_UDC_EP1_DMA_TTC_H S3C2410_USBDREG(0x0214) - -#define S3C2410_UDC_EP2_DMA_CON S3C2410_USBDREG(0x0218) -#define S3C2410_UDC_EP2_DMA_UNIT S3C2410_USBDREG(0x021c) -#define S3C2410_UDC_EP2_DMA_FIFO S3C2410_USBDREG(0x0220) -#define S3C2410_UDC_EP2_DMA_TTC_L S3C2410_USBDREG(0x0224) -#define S3C2410_UDC_EP2_DMA_TTC_M S3C2410_USBDREG(0x0228) -#define S3C2410_UDC_EP2_DMA_TTC_H S3C2410_USBDREG(0x022c) - -#define S3C2410_UDC_EP3_DMA_CON S3C2410_USBDREG(0x0240) -#define S3C2410_UDC_EP3_DMA_UNIT S3C2410_USBDREG(0x0244) -#define S3C2410_UDC_EP3_DMA_FIFO S3C2410_USBDREG(0x0248) -#define S3C2410_UDC_EP3_DMA_TTC_L S3C2410_USBDREG(0x024c) -#define S3C2410_UDC_EP3_DMA_TTC_M S3C2410_USBDREG(0x0250) -#define S3C2410_UDC_EP3_DMA_TTC_H S3C2410_USBDREG(0x0254) - -#define S3C2410_UDC_EP4_DMA_CON S3C2410_USBDREG(0x0258) -#define S3C2410_UDC_EP4_DMA_UNIT S3C2410_USBDREG(0x025c) -#define S3C2410_UDC_EP4_DMA_FIFO S3C2410_USBDREG(0x0260) -#define S3C2410_UDC_EP4_DMA_TTC_L S3C2410_USBDREG(0x0264) -#define S3C2410_UDC_EP4_DMA_TTC_M S3C2410_USBDREG(0x0268) -#define S3C2410_UDC_EP4_DMA_TTC_H S3C2410_USBDREG(0x026c) - -#define S3C2410_UDC_INDEX_REG S3C2410_USBDREG(0x0178) - -/* indexed registers */ - -#define S3C2410_UDC_MAXP_REG S3C2410_USBDREG(0x0180) - -#define S3C2410_UDC_EP0_CSR_REG S3C2410_USBDREG(0x0184) - -#define S3C2410_UDC_IN_CSR1_REG S3C2410_USBDREG(0x0184) -#define S3C2410_UDC_IN_CSR2_REG S3C2410_USBDREG(0x0188) - -#define S3C2410_UDC_OUT_CSR1_REG S3C2410_USBDREG(0x0190) -#define S3C2410_UDC_OUT_CSR2_REG S3C2410_USBDREG(0x0194) -#define S3C2410_UDC_OUT_FIFO_CNT1_REG S3C2410_USBDREG(0x0198) -#define S3C2410_UDC_OUT_FIFO_CNT2_REG S3C2410_USBDREG(0x019c) - -#define S3C2410_UDC_FUNCADDR_UPDATE (1 << 7) - -#define S3C2410_UDC_PWR_ISOUP (1 << 7) /* R/W */ -#define S3C2410_UDC_PWR_RESET (1 << 3) /* R */ -#define S3C2410_UDC_PWR_RESUME (1 << 2) /* R/W */ -#define S3C2410_UDC_PWR_SUSPEND (1 << 1) /* R */ -#define S3C2410_UDC_PWR_ENSUSPEND (1 << 0) /* R/W */ - -#define S3C2410_UDC_PWR_DEFAULT (0x00) - -#define S3C2410_UDC_INT_EP4 (1 << 4) /* R/W (clear only) */ -#define S3C2410_UDC_INT_EP3 (1 << 3) /* R/W (clear only) */ -#define S3C2410_UDC_INT_EP2 (1 << 2) /* R/W (clear only) */ -#define S3C2410_UDC_INT_EP1 (1 << 1) /* R/W (clear only) */ -#define S3C2410_UDC_INT_EP0 (1 << 0) /* R/W (clear only) */ - -#define S3C2410_UDC_USBINT_RESET (1 << 2) /* R/W (clear only) */ -#define S3C2410_UDC_USBINT_RESUME (1 << 1) /* R/W (clear only) */ -#define S3C2410_UDC_USBINT_SUSPEND (1 << 0) /* R/W (clear only) */ - -#define S3C2410_UDC_INTE_EP4 (1 << 4) /* R/W */ -#define S3C2410_UDC_INTE_EP3 (1 << 3) /* R/W */ -#define S3C2410_UDC_INTE_EP2 (1 << 2) /* R/W */ -#define S3C2410_UDC_INTE_EP1 (1 << 1) /* R/W */ -#define S3C2410_UDC_INTE_EP0 (1 << 0) /* R/W */ - -#define S3C2410_UDC_USBINTE_RESET (1 << 2) /* R/W */ -#define S3C2410_UDC_USBINTE_SUSPEND (1 << 0) /* R/W */ - -#define S3C2410_UDC_INDEX_EP0 (0x00) -#define S3C2410_UDC_INDEX_EP1 (0x01) -#define S3C2410_UDC_INDEX_EP2 (0x02) -#define S3C2410_UDC_INDEX_EP3 (0x03) -#define S3C2410_UDC_INDEX_EP4 (0x04) - -#define S3C2410_UDC_ICSR1_CLRDT (1 << 6) /* R/W */ -#define S3C2410_UDC_ICSR1_SENTSTL (1 << 5) /* R/W (clear only) */ -#define S3C2410_UDC_ICSR1_SENDSTL (1 << 4) /* R/W */ -#define S3C2410_UDC_ICSR1_FFLUSH (1 << 3) /* W (set only) */ -#define S3C2410_UDC_ICSR1_UNDRUN (1 << 2) /* R/W (clear only) */ -#define S3C2410_UDC_ICSR1_PKTRDY (1 << 0) /* R/W (set only) */ - -#define S3C2410_UDC_ICSR2_AUTOSET (1 << 7) /* R/W */ -#define S3C2410_UDC_ICSR2_ISO (1 << 6) /* R/W */ -#define S3C2410_UDC_ICSR2_MODEIN (1 << 5) /* R/W */ -#define S3C2410_UDC_ICSR2_DMAIEN (1 << 4) /* R/W */ - -#define S3C2410_UDC_OCSR1_CLRDT (1 << 7) /* R/W */ -#define S3C2410_UDC_OCSR1_SENTSTL (1 << 6) /* R/W (clear only) */ -#define S3C2410_UDC_OCSR1_SENDSTL (1 << 5) /* R/W */ -#define S3C2410_UDC_OCSR1_FFLUSH (1 << 4) /* R/W */ -#define S3C2410_UDC_OCSR1_DERROR (1 << 3) /* R */ -#define S3C2410_UDC_OCSR1_OVRRUN (1 << 2) /* R/W (clear only) */ -#define S3C2410_UDC_OCSR1_PKTRDY (1 << 0) /* R/W (clear only) */ - -#define S3C2410_UDC_OCSR2_AUTOCLR (1 << 7) /* R/W */ -#define S3C2410_UDC_OCSR2_ISO (1 << 6) /* R/W */ -#define S3C2410_UDC_OCSR2_DMAIEN (1 << 5) /* R/W */ - -#define S3C2410_UDC_EP0_CSR_OPKRDY (1 << 0) -#define S3C2410_UDC_EP0_CSR_IPKRDY (1 << 1) -#define S3C2410_UDC_EP0_CSR_SENTSTL (1 << 2) -#define S3C2410_UDC_EP0_CSR_DE (1 << 3) -#define S3C2410_UDC_EP0_CSR_SE (1 << 4) -#define S3C2410_UDC_EP0_CSR_SENDSTL (1 << 5) -#define S3C2410_UDC_EP0_CSR_SOPKTRDY (1 << 6) -#define S3C2410_UDC_EP0_CSR_SSE (1 << 7) - -#define S3C2410_UDC_MAXP_8 (1 << 0) -#define S3C2410_UDC_MAXP_16 (1 << 1) -#define S3C2410_UDC_MAXP_32 (1 << 2) -#define S3C2410_UDC_MAXP_64 (1 << 3) - -#endif diff --git a/arch/arm/plat-samsung/include/plat/samsung-time.h b/arch/arm/plat-samsung/include/plat/samsung-time.h deleted file mode 100644 index d16eefe9ae78..000000000000 --- a/arch/arm/plat-samsung/include/plat/samsung-time.h +++ /dev/null @@ -1,26 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com/ - * - * Header file for samsung s3c and s5p time support - */ - -#ifndef __ASM_PLAT_SAMSUNG_TIME_H -#define __ASM_PLAT_SAMSUNG_TIME_H __FILE__ - -/* SAMSUNG HR-Timer Clock mode */ -enum samsung_timer_mode { - SAMSUNG_PWM0, - SAMSUNG_PWM1, - SAMSUNG_PWM2, - SAMSUNG_PWM3, - SAMSUNG_PWM4, -}; - -extern void __init samsung_set_timer_source(enum samsung_timer_mode event, - enum samsung_timer_mode source); - -extern void __init samsung_timer_init(void); - -#endif /* __ASM_PLAT_SAMSUNG_TIME_H */ diff --git a/arch/arm/plat-samsung/include/plat/sdhci.h b/arch/arm/plat-samsung/include/plat/sdhci.h deleted file mode 100644 index 5731e42ea208..000000000000 --- a/arch/arm/plat-samsung/include/plat/sdhci.h +++ /dev/null @@ -1,162 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright (c) 2011 Samsung Electronics Co., Ltd. - * http://www.samsung.com - * - * Copyright 2008 Openmoko, Inc. - * Copyright 2008 Simtec Electronics - * http://armlinux.simtec.co.uk/ - * Ben Dooks <ben@simtec.co.uk> - * - * S3C Platform - SDHCI (HSMMC) platform data definitions - */ - -#ifndef __PLAT_S3C_SDHCI_H -#define __PLAT_S3C_SDHCI_H __FILE__ - -#include <linux/platform_data/mmc-sdhci-s3c.h> -#include <plat/devs.h> - -/* s3c_sdhci_set_platdata() - common helper for setting SDHCI platform data - * @pd: The default platform data for this device. - * @set: Pointer to the platform data to fill in. - */ -extern void s3c_sdhci_set_platdata(struct s3c_sdhci_platdata *pd, - struct s3c_sdhci_platdata *set); - -/** - * s3c_sdhci0_set_platdata - Set platform data for S3C SDHCI device. - * @pd: Platform data to register to device. - * - * Register the given platform data for use withe S3C SDHCI device. - * The call will copy the platform data, so the board definitions can - * make the structure itself __initdata. - */ -extern void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd); -extern void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd); -extern void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd); -extern void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd); - -/* Default platform data, exported so that per-cpu initialisation can - * set the correct one when there are more than one cpu type selected. -*/ - -extern struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata; -extern struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata; -extern struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata; -extern struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata; - -/* Helper function availability */ - -extern void s3c2416_setup_sdhci0_cfg_gpio(struct platform_device *, int w); -extern void s3c2416_setup_sdhci1_cfg_gpio(struct platform_device *, int w); -extern void s3c64xx_setup_sdhci0_cfg_gpio(struct platform_device *, int w); -extern void s3c64xx_setup_sdhci1_cfg_gpio(struct platform_device *, int w); -extern void s3c64xx_setup_sdhci2_cfg_gpio(struct platform_device *, int w); - -/* S3C2416 SDHCI setup */ - -#ifdef CONFIG_S3C2416_SETUP_SDHCI -static inline void s3c2416_default_sdhci0(void) -{ -#ifdef CONFIG_S3C_DEV_HSMMC - s3c_hsmmc0_def_platdata.cfg_gpio = s3c2416_setup_sdhci0_cfg_gpio; -#endif /* CONFIG_S3C_DEV_HSMMC */ -} - -static inline void s3c2416_default_sdhci1(void) -{ -#ifdef CONFIG_S3C_DEV_HSMMC1 - s3c_hsmmc1_def_platdata.cfg_gpio = s3c2416_setup_sdhci1_cfg_gpio; -#endif /* CONFIG_S3C_DEV_HSMMC1 */ -} - -#else -static inline void s3c2416_default_sdhci0(void) { } -static inline void s3c2416_default_sdhci1(void) { } - -#endif /* CONFIG_S3C2416_SETUP_SDHCI */ - -/* S3C64XX SDHCI setup */ - -#ifdef CONFIG_S3C64XX_SETUP_SDHCI -static inline void s3c6400_default_sdhci0(void) -{ -#ifdef CONFIG_S3C_DEV_HSMMC - s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; -#endif -} - -static inline void s3c6400_default_sdhci1(void) -{ -#ifdef CONFIG_S3C_DEV_HSMMC1 - s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; -#endif -} - -static inline void s3c6400_default_sdhci2(void) -{ -#ifdef CONFIG_S3C_DEV_HSMMC2 - s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; -#endif -} - -static inline void s3c6410_default_sdhci0(void) -{ -#ifdef CONFIG_S3C_DEV_HSMMC - s3c_hsmmc0_def_platdata.cfg_gpio = s3c64xx_setup_sdhci0_cfg_gpio; -#endif -} - -static inline void s3c6410_default_sdhci1(void) -{ -#ifdef CONFIG_S3C_DEV_HSMMC1 - s3c_hsmmc1_def_platdata.cfg_gpio = s3c64xx_setup_sdhci1_cfg_gpio; -#endif -} - -static inline void s3c6410_default_sdhci2(void) -{ -#ifdef CONFIG_S3C_DEV_HSMMC2 - s3c_hsmmc2_def_platdata.cfg_gpio = s3c64xx_setup_sdhci2_cfg_gpio; -#endif -} - -#else -static inline void s3c6410_default_sdhci0(void) { } -static inline void s3c6410_default_sdhci1(void) { } -static inline void s3c6410_default_sdhci2(void) { } -static inline void s3c6400_default_sdhci0(void) { } -static inline void s3c6400_default_sdhci1(void) { } -static inline void s3c6400_default_sdhci2(void) { } - -#endif /* CONFIG_S3C64XX_SETUP_SDHCI */ - -static inline void s3c_sdhci_setname(int id, char *name) -{ - switch (id) { -#ifdef CONFIG_S3C_DEV_HSMMC - case 0: - s3c_device_hsmmc0.name = name; - break; -#endif -#ifdef CONFIG_S3C_DEV_HSMMC1 - case 1: - s3c_device_hsmmc1.name = name; - break; -#endif -#ifdef CONFIG_S3C_DEV_HSMMC2 - case 2: - s3c_device_hsmmc2.name = name; - break; -#endif -#ifdef CONFIG_S3C_DEV_HSMMC3 - case 3: - s3c_device_hsmmc3.name = name; - break; -#endif - default: - break; - } -} -#endif /* __PLAT_S3C_SDHCI_H */ diff --git a/arch/arm/plat-samsung/include/plat/usb-phy.h b/arch/arm/plat-samsung/include/plat/usb-phy.h deleted file mode 100644 index 759d66a0773a..000000000000 --- a/arch/arm/plat-samsung/include/plat/usb-phy.h +++ /dev/null @@ -1,13 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0+ */ -/* - * Copyright (C) 2011 Samsung Electronics Co.Ltd - * Author: Joonyoung Shim <jy0922.shim@samsung.com> - */ - -#ifndef __PLAT_SAMSUNG_USB_PHY_H -#define __PLAT_SAMSUNG_USB_PHY_H __FILE__ - -extern int s3c_usb_phy_init(struct platform_device *pdev, int type); -extern int s3c_usb_phy_exit(struct platform_device *pdev, int type); - -#endif /* __PLAT_SAMSUNG_USB_PHY_H */ diff --git a/arch/arm/plat-samsung/include/plat/wakeup-mask.h b/arch/arm/plat-samsung/include/plat/wakeup-mask.h deleted file mode 100644 index 630909e6630b..000000000000 --- a/arch/arm/plat-samsung/include/plat/wakeup-mask.h +++ /dev/null @@ -1,39 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0 */ -/* - * Copyright 2010 Ben Dooks <ben-linux@fluff.org> - * - * Support for wakeup mask interrupts on newer SoCs - */ - -#ifndef __PLAT_WAKEUP_MASK_H -#define __PLAT_WAKEUP_MASK_H __file__ - -/* if no irq yet defined, but still want to mask */ -#define NO_WAKEUP_IRQ (0x90000000) - -/** - * struct samsung_wakeup_mask - wakeup mask information - * @irq: The interrupt associated with this wakeup. - * @bit: The bit, as a (1 << bitno) controlling this source. - */ -struct samsung_wakeup_mask { - unsigned int irq; - u32 bit; -}; - -/** - * samsung_sync_wakemask - sync wakeup mask information for pm - * @reg: The register that is used. - * @masks: The list of masks to use. - * @nr_masks: The number of entries pointed to buy @masks. - * - * Synchronise the wakeup mask information at suspend time from the list - * of interrupts and control bits in @masks. We do this at suspend time - * as overriding the relevant irq chips is harder and the register is only - * required to be correct before we enter sleep. - */ -extern void samsung_sync_wakemask(void __iomem *reg, - const struct samsung_wakeup_mask *masks, - int nr_masks); - -#endif /* __PLAT_WAKEUP_MASK_H */ diff --git a/arch/arm/plat-samsung/init.c b/arch/arm/plat-samsung/init.c deleted file mode 100644 index e9acf02ef3c3..000000000000 --- a/arch/arm/plat-samsung/init.c +++ /dev/null @@ -1,173 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2008 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// http://armlinux.simtec.co.uk/ -// -// S3C series CPU initialisation - -/* - * NOTE: Code in this file is not used on S3C64xx when booting with - * Device Tree support. - */ - -#include <linux/init.h> -#include <linux/module.h> -#include <linux/interrupt.h> -#include <linux/ioport.h> -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/platform_device.h> -#include <linux/of.h> - -#include <asm/mach/arch.h> -#include <asm/mach/map.h> - -#include <plat/cpu.h> -#include <plat/devs.h> - -static struct cpu_table *cpu; - -static struct cpu_table * __init s3c_lookup_cpu(unsigned long idcode, - struct cpu_table *tab, - unsigned int count) -{ - for (; count != 0; count--, tab++) { - if ((idcode & tab->idmask) == (tab->idcode & tab->idmask)) - return tab; - } - - return NULL; -} - -void __init s3c_init_cpu(unsigned long idcode, - struct cpu_table *cputab, unsigned int cputab_size) -{ - cpu = s3c_lookup_cpu(idcode, cputab, cputab_size); - - if (cpu == NULL) { - printk(KERN_ERR "Unknown CPU type 0x%08lx\n", idcode); - panic("Unknown S3C24XX CPU"); - } - - printk("CPU %s (id 0x%08lx)\n", cpu->name, idcode); - - if (cpu->init == NULL) { - printk(KERN_ERR "CPU %s support not enabled\n", cpu->name); - panic("Unsupported Samsung CPU"); - } - - if (cpu->map_io) - cpu->map_io(); -} - -/* s3c24xx_init_clocks - * - * Initialise the clock subsystem and associated information from the - * given master crystal value. - * - * xtal = 0 -> use default PLL crystal value (normally 12MHz) - * != 0 -> PLL crystal value in Hz -*/ - -void __init s3c24xx_init_clocks(int xtal) -{ - if (xtal == 0) - xtal = 12*1000*1000; - - if (cpu == NULL) - panic("s3c24xx_init_clocks: no cpu setup?\n"); - - if (cpu->init_clocks == NULL) - panic("s3c24xx_init_clocks: cpu has no clock init\n"); - else - (cpu->init_clocks)(xtal); -} - -/* uart management */ -#if IS_ENABLED(CONFIG_SAMSUNG_ATAGS) -static int nr_uarts __initdata = 0; - -#ifdef CONFIG_SERIAL_SAMSUNG_UARTS -static struct s3c2410_uartcfg uart_cfgs[CONFIG_SERIAL_SAMSUNG_UARTS]; -#endif - -/* s3c24xx_init_uartdevs - * - * copy the specified platform data and configuration into our central - * set of devices, before the data is thrown away after the init process. - * - * This also fills in the array passed to the serial driver for the - * early initialisation of the console. -*/ - -void __init s3c24xx_init_uartdevs(char *name, - struct s3c24xx_uart_resources *res, - struct s3c2410_uartcfg *cfg, int no) -{ -#ifdef CONFIG_SERIAL_SAMSUNG_UARTS - struct platform_device *platdev; - struct s3c2410_uartcfg *cfgptr = uart_cfgs; - struct s3c24xx_uart_resources *resp; - int uart; - - memcpy(cfgptr, cfg, sizeof(struct s3c2410_uartcfg) * no); - - for (uart = 0; uart < no; uart++, cfg++, cfgptr++) { - platdev = s3c24xx_uart_src[cfgptr->hwport]; - - resp = res + cfgptr->hwport; - - s3c24xx_uart_devs[uart] = platdev; - - platdev->name = name; - platdev->resource = resp->resources; - platdev->num_resources = resp->nr_resources; - - platdev->dev.platform_data = cfgptr; - } - - nr_uarts = no; -#endif -} - -void __init s3c24xx_init_uarts(struct s3c2410_uartcfg *cfg, int no) -{ - if (cpu == NULL) - return; - - if (cpu->init_uarts == NULL && IS_ENABLED(CONFIG_SAMSUNG_ATAGS)) { - printk(KERN_ERR "s3c24xx_init_uarts: cpu has no uart init\n"); - } else - (cpu->init_uarts)(cfg, no); -} -#endif - -static int __init s3c_arch_init(void) -{ - int ret; - - /* init is only needed for ATAGS based platforms */ - if (!IS_ENABLED(CONFIG_ATAGS) || - (!soc_is_s3c24xx() && !soc_is_s3c64xx())) - return 0; - - // do the correct init for cpu - - if (cpu == NULL) { - /* Not needed when booting with device tree. */ - if (of_have_populated_dt()) - return 0; - panic("s3c_arch_init: NULL cpu\n"); - } - - ret = (cpu->init)(); - if (ret != 0) - return ret; -#if IS_ENABLED(CONFIG_SAMSUNG_ATAGS) - ret = platform_add_devices(s3c24xx_uart_devs, nr_uarts); -#endif - return ret; -} - -arch_initcall(s3c_arch_init); diff --git a/arch/arm/plat-samsung/platformdata.c b/arch/arm/plat-samsung/platformdata.c deleted file mode 100644 index cbc3b4b45c74..000000000000 --- a/arch/arm/plat-samsung/platformdata.c +++ /dev/null @@ -1,53 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright 2010 Ben Dooks <ben-linux <at> fluff.org> -// -// Helper for platform data setting - -#include <linux/kernel.h> -#include <linux/slab.h> -#include <linux/string.h> -#include <linux/platform_device.h> - -#include <plat/devs.h> -#include <plat/sdhci.h> - -void __init *s3c_set_platdata(void *pd, size_t pdsize, - struct platform_device *pdev) -{ - void *npd; - - if (!pd) { - /* too early to use dev_name(), may not be registered */ - printk(KERN_ERR "%s: no platform data supplied\n", pdev->name); - return NULL; - } - - npd = kmemdup(pd, pdsize, GFP_KERNEL); - if (!npd) - return NULL; - - pdev->dev.platform_data = npd; - return npd; -} - -void s3c_sdhci_set_platdata(struct s3c_sdhci_platdata *pd, - struct s3c_sdhci_platdata *set) -{ - set->cd_type = pd->cd_type; - set->ext_cd_init = pd->ext_cd_init; - set->ext_cd_cleanup = pd->ext_cd_cleanup; - set->ext_cd_gpio = pd->ext_cd_gpio; - set->ext_cd_gpio_invert = pd->ext_cd_gpio_invert; - - if (pd->max_width) - set->max_width = pd->max_width; - if (pd->cfg_gpio) - set->cfg_gpio = pd->cfg_gpio; - if (pd->host_caps) - set->host_caps |= pd->host_caps; - if (pd->host_caps2) - set->host_caps2 |= pd->host_caps2; - if (pd->pm_caps) - set->pm_caps |= pd->pm_caps; -} diff --git a/arch/arm/plat-samsung/pm-check.c b/arch/arm/plat-samsung/pm-check.c deleted file mode 100644 index cd2c02c68bc3..000000000000 --- a/arch/arm/plat-samsung/pm-check.c +++ /dev/null @@ -1,233 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// originally in linux/arch/arm/plat-s3c24xx/pm.c -// -// Copyright (c) 2004-2008 Simtec Electronics -// http://armlinux.simtec.co.uk -// Ben Dooks <ben@simtec.co.uk> -// -// S3C Power Mangament - suspend/resume memory corruption check. - -#include <linux/kernel.h> -#include <linux/suspend.h> -#include <linux/init.h> -#include <linux/crc32.h> -#include <linux/ioport.h> -#include <linux/slab.h> - -#include <plat/pm-common.h> - -#if CONFIG_SAMSUNG_PM_CHECK_CHUNKSIZE < 1 -#error CONFIG_SAMSUNG_PM_CHECK_CHUNKSIZE must be a positive non-zero value -#endif - -/* suspend checking code... - * - * this next area does a set of crc checks over all the installed - * memory, so the system can verify if the resume was ok. - * - * CONFIG_SAMSUNG_PM_CHECK_CHUNKSIZE defines the block-size for the CRC, - * increasing it will mean that the area corrupted will be less easy to spot, - * and reducing the size will cause the CRC save area to grow -*/ - -#define CHECK_CHUNKSIZE (CONFIG_SAMSUNG_PM_CHECK_CHUNKSIZE * 1024) - -static u32 crc_size; /* size needed for the crc block */ -static u32 *crcs; /* allocated over suspend/resume */ - -typedef u32 *(run_fn_t)(struct resource *ptr, u32 *arg); - -/* s3c_pm_run_res - * - * go through the given resource list, and look for system ram -*/ - -static void s3c_pm_run_res(struct resource *ptr, run_fn_t fn, u32 *arg) -{ - while (ptr != NULL) { - if (ptr->child != NULL) - s3c_pm_run_res(ptr->child, fn, arg); - - if ((ptr->flags & IORESOURCE_SYSTEM_RAM) - == IORESOURCE_SYSTEM_RAM) { - S3C_PMDBG("Found system RAM at %08lx..%08lx\n", - (unsigned long)ptr->start, - (unsigned long)ptr->end); - arg = (fn)(ptr, arg); - } - - ptr = ptr->sibling; - } -} - -static void s3c_pm_run_sysram(run_fn_t fn, u32 *arg) -{ - s3c_pm_run_res(&iomem_resource, fn, arg); -} - -static u32 *s3c_pm_countram(struct resource *res, u32 *val) -{ - u32 size = (u32)resource_size(res); - - size += CHECK_CHUNKSIZE-1; - size /= CHECK_CHUNKSIZE; - - S3C_PMDBG("Area %08lx..%08lx, %d blocks\n", - (unsigned long)res->start, (unsigned long)res->end, size); - - *val += size * sizeof(u32); - return val; -} - -/* s3c_pm_prepare_check - * - * prepare the necessary information for creating the CRCs. This - * must be done before the final save, as it will require memory - * allocating, and thus touching bits of the kernel we do not - * know about. -*/ - -void s3c_pm_check_prepare(void) -{ - crc_size = 0; - - s3c_pm_run_sysram(s3c_pm_countram, &crc_size); - - S3C_PMDBG("s3c_pm_prepare_check: %u checks needed\n", crc_size); - - crcs = kmalloc(crc_size+4, GFP_KERNEL); - if (crcs == NULL) - printk(KERN_ERR "Cannot allocated CRC save area\n"); -} - -static u32 *s3c_pm_makecheck(struct resource *res, u32 *val) -{ - unsigned long addr, left; - - for (addr = res->start; addr < res->end; - addr += CHECK_CHUNKSIZE) { - left = res->end - addr; - - if (left > CHECK_CHUNKSIZE) - left = CHECK_CHUNKSIZE; - - *val = crc32_le(~0, phys_to_virt(addr), left); - val++; - } - - return val; -} - -/* s3c_pm_check_store - * - * compute the CRC values for the memory blocks before the final - * sleep. -*/ - -void s3c_pm_check_store(void) -{ - if (crcs != NULL) - s3c_pm_run_sysram(s3c_pm_makecheck, crcs); -} - -/* in_region - * - * return TRUE if the area defined by ptr..ptr+size contains the - * what..what+whatsz -*/ - -static inline int in_region(void *ptr, int size, void *what, size_t whatsz) -{ - if ((what+whatsz) < ptr) - return 0; - - if (what > (ptr+size)) - return 0; - - return 1; -} - -/** - * s3c_pm_runcheck() - helper to check a resource on restore. - * @res: The resource to check - * @vak: Pointer to list of CRC32 values to check. - * - * Called from the s3c_pm_check_restore() via s3c_pm_run_sysram(), this - * function runs the given memory resource checking it against the stored - * CRC to ensure that memory is restored. The function tries to skip as - * many of the areas used during the suspend process. - */ -static u32 *s3c_pm_runcheck(struct resource *res, u32 *val) -{ - unsigned long addr; - unsigned long left; - void *stkpage; - void *ptr; - u32 calc; - - stkpage = (void *)((u32)&calc & ~PAGE_MASK); - - for (addr = res->start; addr < res->end; - addr += CHECK_CHUNKSIZE) { - left = res->end - addr; - - if (left > CHECK_CHUNKSIZE) - left = CHECK_CHUNKSIZE; - - ptr = phys_to_virt(addr); - - if (in_region(ptr, left, stkpage, 4096)) { - S3C_PMDBG("skipping %08lx, has stack in\n", addr); - goto skip_check; - } - - if (in_region(ptr, left, crcs, crc_size)) { - S3C_PMDBG("skipping %08lx, has crc block in\n", addr); - goto skip_check; - } - - /* calculate and check the checksum */ - - calc = crc32_le(~0, ptr, left); - if (calc != *val) { - printk(KERN_ERR "Restore CRC error at " - "%08lx (%08x vs %08x)\n", addr, calc, *val); - - S3C_PMDBG("Restore CRC error at %08lx (%08x vs %08x)\n", - addr, calc, *val); - } - - skip_check: - val++; - } - - return val; -} - -/** - * s3c_pm_check_restore() - memory check called on resume - * - * check the CRCs after the restore event and free the memory used - * to hold them -*/ -void s3c_pm_check_restore(void) -{ - if (crcs != NULL) - s3c_pm_run_sysram(s3c_pm_runcheck, crcs); -} - -/** - * s3c_pm_check_cleanup() - free memory resources - * - * Free the resources that where allocated by the suspend - * memory check code. We do this separately from the - * s3c_pm_check_restore() function as we cannot call any - * functions that might sleep during that resume. - */ -void s3c_pm_check_cleanup(void) -{ - kfree(crcs); - crcs = NULL; -} - diff --git a/arch/arm/plat-samsung/pm-common.c b/arch/arm/plat-samsung/pm-common.c deleted file mode 100644 index 59a10c6dcba1..000000000000 --- a/arch/arm/plat-samsung/pm-common.c +++ /dev/null @@ -1,71 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (C) 2013 Samsung Electronics Co., Ltd. -// Tomasz Figa <t.figa@samsung.com> -// Copyright (C) 2008 Openmoko, Inc. -// Copyright (C) 2004-2008 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// http://armlinux.simtec.co.uk/ -// -// Samsung common power management helper functions. - -#include <linux/io.h> -#include <linux/kernel.h> - -#include <plat/pm-common.h> - -/* helper functions to save and restore register state */ - -/** - * s3c_pm_do_save() - save a set of registers for restoration on resume. - * @ptr: Pointer to an array of registers. - * @count: Size of the ptr array. - * - * Run through the list of registers given, saving their contents in the - * array for later restoration when we wakeup. - */ -void s3c_pm_do_save(struct sleep_save *ptr, int count) -{ - for (; count > 0; count--, ptr++) { - ptr->val = readl_relaxed(ptr->reg); - S3C_PMDBG("saved %p value %08lx\n", ptr->reg, ptr->val); - } -} - -/** - * s3c_pm_do_restore() - restore register values from the save list. - * @ptr: Pointer to an array of registers. - * @count: Size of the ptr array. - * - * Restore the register values saved from s3c_pm_do_save(). - * - * Note, we do not use S3C_PMDBG() in here, as the system may not have - * restore the UARTs state yet -*/ - -void s3c_pm_do_restore(const struct sleep_save *ptr, int count) -{ - for (; count > 0; count--, ptr++) { - pr_debug("restore %p (restore %08lx, was %08x)\n", - ptr->reg, ptr->val, readl_relaxed(ptr->reg)); - - writel_relaxed(ptr->val, ptr->reg); - } -} - -/** - * s3c_pm_do_restore_core() - early restore register values from save list. - * - * This is similar to s3c_pm_do_restore() except we try and minimise the - * side effects of the function in case registers that hardware might need - * to work has been restored. - * - * WARNING: Do not put any debug in here that may effect memory or use - * peripherals, as things may be changing! -*/ - -void s3c_pm_do_restore_core(const struct sleep_save *ptr, int count) -{ - for (; count > 0; count--, ptr++) - writel_relaxed(ptr->val, ptr->reg); -} diff --git a/arch/arm/plat-samsung/pm-debug.c b/arch/arm/plat-samsung/pm-debug.c deleted file mode 100644 index b76b1e9ba4ae..000000000000 --- a/arch/arm/plat-samsung/pm-debug.c +++ /dev/null @@ -1,95 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (C) 2013 Samsung Electronics Co., Ltd. -// Tomasz Figa <t.figa@samsung.com> -// Copyright (C) 2008 Openmoko, Inc. -// Copyright (C) 2004-2008 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// http://armlinux.simtec.co.uk/ -// -// Samsung common power management (suspend to RAM) debug support - -#include <linux/serial_core.h> -#include <linux/serial_s3c.h> -#include <linux/io.h> - -#include <asm/mach/map.h> - -#include <plat/cpu.h> -#include <plat/pm-common.h> - -#ifdef CONFIG_SAMSUNG_ATAGS -#include <plat/pm.h> -#include <mach/pm-core.h> -#else -static inline void s3c_pm_debug_init_uart(void) {} -static inline void s3c_pm_arch_update_uart(void __iomem *regs, - struct pm_uart_save *save) {} -#endif - -static struct pm_uart_save uart_save; - -extern void printascii(const char *); - -void s3c_pm_dbg(const char *fmt, ...) -{ - va_list va; - char buff[256]; - - va_start(va, fmt); - vsnprintf(buff, sizeof(buff), fmt, va); - va_end(va); - - printascii(buff); -} - -void s3c_pm_debug_init(void) -{ - /* restart uart clocks so we can use them to output */ - s3c_pm_debug_init_uart(); -} - -static inline void __iomem *s3c_pm_uart_base(void) -{ - unsigned long paddr; - unsigned long vaddr; - - debug_ll_addr(&paddr, &vaddr); - - return (void __iomem *)vaddr; -} - -void s3c_pm_save_uarts(void) -{ - void __iomem *regs = s3c_pm_uart_base(); - struct pm_uart_save *save = &uart_save; - - save->ulcon = __raw_readl(regs + S3C2410_ULCON); - save->ucon = __raw_readl(regs + S3C2410_UCON); - save->ufcon = __raw_readl(regs + S3C2410_UFCON); - save->umcon = __raw_readl(regs + S3C2410_UMCON); - save->ubrdiv = __raw_readl(regs + S3C2410_UBRDIV); - - if (!soc_is_s3c2410()) - save->udivslot = __raw_readl(regs + S3C2443_DIVSLOT); - - S3C_PMDBG("UART[%p]: ULCON=%04x, UCON=%04x, UFCON=%04x, UBRDIV=%04x\n", - regs, save->ulcon, save->ucon, save->ufcon, save->ubrdiv); -} - -void s3c_pm_restore_uarts(void) -{ - void __iomem *regs = s3c_pm_uart_base(); - struct pm_uart_save *save = &uart_save; - - s3c_pm_arch_update_uart(regs, save); - - __raw_writel(save->ulcon, regs + S3C2410_ULCON); - __raw_writel(save->ucon, regs + S3C2410_UCON); - __raw_writel(save->ufcon, regs + S3C2410_UFCON); - __raw_writel(save->umcon, regs + S3C2410_UMCON); - __raw_writel(save->ubrdiv, regs + S3C2410_UBRDIV); - - if (!soc_is_s3c2410()) - __raw_writel(save->udivslot, regs + S3C2443_DIVSLOT); -} diff --git a/arch/arm/plat-samsung/pm-gpio.c b/arch/arm/plat-samsung/pm-gpio.c deleted file mode 100644 index cb2e3bc79336..000000000000 --- a/arch/arm/plat-samsung/pm-gpio.c +++ /dev/null @@ -1,380 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0+ -// -// Copyright 2008 Openmoko, Inc. -// Copyright 2008 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// http://armlinux.simtec.co.uk/ -// -// S3C series GPIO PM code - -#include <linux/kernel.h> -#include <linux/device.h> -#include <linux/init.h> -#include <linux/io.h> -#include <linux/gpio.h> - -#include <mach/gpio-samsung.h> - -#include <plat/gpio-core.h> -#include <plat/pm.h> - -/* PM GPIO helpers */ - -#define OFFS_CON (0x00) -#define OFFS_DAT (0x04) -#define OFFS_UP (0x08) - -static void samsung_gpio_pm_1bit_save(struct samsung_gpio_chip *chip) -{ - chip->pm_save[0] = __raw_readl(chip->base + OFFS_CON); - chip->pm_save[1] = __raw_readl(chip->base + OFFS_DAT); -} - -static void samsung_gpio_pm_1bit_resume(struct samsung_gpio_chip *chip) -{ - void __iomem *base = chip->base; - u32 old_gpcon = __raw_readl(base + OFFS_CON); - u32 old_gpdat = __raw_readl(base + OFFS_DAT); - u32 gps_gpcon = chip->pm_save[0]; - u32 gps_gpdat = chip->pm_save[1]; - u32 gpcon; - - /* GPACON only has one bit per control / data and no PULLUPs. - * GPACON[x] = 0 => Output, 1 => SFN */ - - /* first set all SFN bits to SFN */ - - gpcon = old_gpcon | gps_gpcon; - __raw_writel(gpcon, base + OFFS_CON); - - /* now set all the other bits */ - - __raw_writel(gps_gpdat, base + OFFS_DAT); - __raw_writel(gps_gpcon, base + OFFS_CON); - - S3C_PMDBG("%s: CON %08x => %08x, DAT %08x => %08x\n", - chip->chip.label, old_gpcon, gps_gpcon, old_gpdat, gps_gpdat); -} - -struct samsung_gpio_pm samsung_gpio_pm_1bit = { - .save = samsung_gpio_pm_1bit_save, - .resume = samsung_gpio_pm_1bit_resume, -}; - -static void samsung_gpio_pm_2bit_save(struct samsung_gpio_chip *chip) -{ - chip->pm_save[0] = __raw_readl(chip->base + OFFS_CON); - chip->pm_save[1] = __raw_readl(chip->base + OFFS_DAT); - chip->pm_save[2] = __raw_readl(chip->base + OFFS_UP); -} - -/* Test whether the given masked+shifted bits of an GPIO configuration - * are one of the SFN (special function) modes. */ - -static inline int is_sfn(unsigned long con) -{ - return con >= 2; -} - -/* Test if the given masked+shifted GPIO configuration is an input */ - -static inline int is_in(unsigned long con) -{ - return con == 0; -} - -/* Test if the given masked+shifted GPIO configuration is an output */ - -static inline int is_out(unsigned long con) -{ - return con == 1; -} - -/** - * samsung_gpio_pm_2bit_resume() - restore the given GPIO bank - * @chip: The chip information to resume. - * - * Restore one of the GPIO banks that was saved during suspend. This is - * not as simple as once thought, due to the possibility of glitches - * from the order that the CON and DAT registers are set in. - * - * The three states the pin can be are {IN,OUT,SFN} which gives us 9 - * combinations of changes to check. Three of these, if the pin stays - * in the same configuration can be discounted. This leaves us with - * the following: - * - * { IN => OUT } Change DAT first - * { IN => SFN } Change CON first - * { OUT => SFN } Change CON first, so new data will not glitch - * { OUT => IN } Change CON first, so new data will not glitch - * { SFN => IN } Change CON first - * { SFN => OUT } Change DAT first, so new data will not glitch [1] - * - * We do not currently deal with the UP registers as these control - * weak resistors, so a small delay in change should not need to bring - * these into the calculations. - * - * [1] this assumes that writing to a pin DAT whilst in SFN will set the - * state for when it is next output. - */ -static void samsung_gpio_pm_2bit_resume(struct samsung_gpio_chip *chip) -{ - void __iomem *base = chip->base; - u32 old_gpcon = __raw_readl(base + OFFS_CON); - u32 old_gpdat = __raw_readl(base + OFFS_DAT); - u32 gps_gpcon = chip->pm_save[0]; - u32 gps_gpdat = chip->pm_save[1]; - u32 gpcon, old, new, mask; - u32 change_mask = 0x0; - int nr; - - /* restore GPIO pull-up settings */ - __raw_writel(chip->pm_save[2], base + OFFS_UP); - - /* Create a change_mask of all the items that need to have - * their CON value changed before their DAT value, so that - * we minimise the work between the two settings. - */ - - for (nr = 0, mask = 0x03; nr < 32; nr += 2, mask <<= 2) { - old = (old_gpcon & mask) >> nr; - new = (gps_gpcon & mask) >> nr; - - /* If there is no change, then skip */ - - if (old == new) - continue; - - /* If both are special function, then skip */ - - if (is_sfn(old) && is_sfn(new)) - continue; - - /* Change is IN => OUT, do not change now */ - - if (is_in(old) && is_out(new)) - continue; - - /* Change is SFN => OUT, do not change now */ - - if (is_sfn(old) && is_out(new)) - continue; - - /* We should now be at the case of IN=>SFN, - * OUT=>SFN, OUT=>IN, SFN=>IN. */ - - change_mask |= mask; - } - - - /* Write the new CON settings */ - - gpcon = old_gpcon & ~change_mask; - gpcon |= gps_gpcon & change_mask; - - __raw_writel(gpcon, base + OFFS_CON); - - /* Now change any items that require DAT,CON */ - - __raw_writel(gps_gpdat, base + OFFS_DAT); - __raw_writel(gps_gpcon, base + OFFS_CON); - - S3C_PMDBG("%s: CON %08x => %08x, DAT %08x => %08x\n", - chip->chip.label, old_gpcon, gps_gpcon, old_gpdat, gps_gpdat); -} - -struct samsung_gpio_pm samsung_gpio_pm_2bit = { - .save = samsung_gpio_pm_2bit_save, - .resume = samsung_gpio_pm_2bit_resume, -}; - -#if defined(CONFIG_ARCH_S3C64XX) -static void samsung_gpio_pm_4bit_save(struct samsung_gpio_chip *chip) -{ - chip->pm_save[1] = __raw_readl(chip->base + OFFS_CON); - chip->pm_save[2] = __raw_readl(chip->base + OFFS_DAT); - chip->pm_save[3] = __raw_readl(chip->base + OFFS_UP); - - if (chip->chip.ngpio > 8) - chip->pm_save[0] = __raw_readl(chip->base - 4); -} - -static u32 samsung_gpio_pm_4bit_mask(u32 old_gpcon, u32 gps_gpcon) -{ - u32 old, new, mask; - u32 change_mask = 0x0; - int nr; - - for (nr = 0, mask = 0x0f; nr < 16; nr += 4, mask <<= 4) { - old = (old_gpcon & mask) >> nr; - new = (gps_gpcon & mask) >> nr; - - /* If there is no change, then skip */ - - if (old == new) - continue; - - /* If both are special function, then skip */ - - if (is_sfn(old) && is_sfn(new)) - continue; - - /* Change is IN => OUT, do not change now */ - - if (is_in(old) && is_out(new)) - continue; - - /* Change is SFN => OUT, do not change now */ - - if (is_sfn(old) && is_out(new)) - continue; - - /* We should now be at the case of IN=>SFN, - * OUT=>SFN, OUT=>IN, SFN=>IN. */ - - change_mask |= mask; - } - - return change_mask; -} - -static void samsung_gpio_pm_4bit_con(struct samsung_gpio_chip *chip, int index) -{ - void __iomem *con = chip->base + (index * 4); - u32 old_gpcon = __raw_readl(con); - u32 gps_gpcon = chip->pm_save[index + 1]; - u32 gpcon, mask; - - mask = samsung_gpio_pm_4bit_mask(old_gpcon, gps_gpcon); - - gpcon = old_gpcon & ~mask; - gpcon |= gps_gpcon & mask; - - __raw_writel(gpcon, con); -} - -static void samsung_gpio_pm_4bit_resume(struct samsung_gpio_chip *chip) -{ - void __iomem *base = chip->base; - u32 old_gpcon[2]; - u32 old_gpdat = __raw_readl(base + OFFS_DAT); - u32 gps_gpdat = chip->pm_save[2]; - - /* First, modify the CON settings */ - - old_gpcon[0] = 0; - old_gpcon[1] = __raw_readl(base + OFFS_CON); - - samsung_gpio_pm_4bit_con(chip, 0); - if (chip->chip.ngpio > 8) { - old_gpcon[0] = __raw_readl(base - 4); - samsung_gpio_pm_4bit_con(chip, -1); - } - - /* Now change the configurations that require DAT,CON */ - - __raw_writel(chip->pm_save[2], base + OFFS_DAT); - __raw_writel(chip->pm_save[1], base + OFFS_CON); - if (chip->chip.ngpio > 8) - __raw_writel(chip->pm_save[0], base - 4); - - __raw_writel(chip->pm_save[2], base + OFFS_DAT); - __raw_writel(chip->pm_save[3], base + OFFS_UP); - - if (chip->chip.ngpio > 8) { - S3C_PMDBG("%s: CON4 %08x,%08x => %08x,%08x, DAT %08x => %08x\n", - chip->chip.label, old_gpcon[0], old_gpcon[1], - __raw_readl(base - 4), - __raw_readl(base + OFFS_CON), - old_gpdat, gps_gpdat); - } else - S3C_PMDBG("%s: CON4 %08x => %08x, DAT %08x => %08x\n", - chip->chip.label, old_gpcon[1], - __raw_readl(base + OFFS_CON), - old_gpdat, gps_gpdat); -} - -struct samsung_gpio_pm samsung_gpio_pm_4bit = { - .save = samsung_gpio_pm_4bit_save, - .resume = samsung_gpio_pm_4bit_resume, -}; -#endif /* CONFIG_ARCH_S3C64XX */ - -/** - * samsung_pm_save_gpio() - save gpio chip data for suspend - * @ourchip: The chip for suspend. - */ -static void samsung_pm_save_gpio(struct samsung_gpio_chip *ourchip) -{ - struct samsung_gpio_pm *pm = ourchip->pm; - - if (pm == NULL || pm->save == NULL) - S3C_PMDBG("%s: no pm for %s\n", __func__, ourchip->chip.label); - else - pm->save(ourchip); -} - -/** - * samsung_pm_save_gpios() - Save the state of the GPIO banks. - * - * For all the GPIO banks, save the state of each one ready for going - * into a suspend mode. - */ -void samsung_pm_save_gpios(void) -{ - struct samsung_gpio_chip *ourchip; - unsigned int gpio_nr; - - for (gpio_nr = 0; gpio_nr < S3C_GPIO_END;) { - ourchip = samsung_gpiolib_getchip(gpio_nr); - if (!ourchip) { - gpio_nr++; - continue; - } - - samsung_pm_save_gpio(ourchip); - - S3C_PMDBG("%s: save %08x,%08x,%08x,%08x\n", - ourchip->chip.label, - ourchip->pm_save[0], - ourchip->pm_save[1], - ourchip->pm_save[2], - ourchip->pm_save[3]); - - gpio_nr += ourchip->chip.ngpio; - gpio_nr += CONFIG_S3C_GPIO_SPACE; - } -} - -/** - * samsung_pm_resume_gpio() - restore gpio chip data after suspend - * @ourchip: The suspended chip. - */ -static void samsung_pm_resume_gpio(struct samsung_gpio_chip *ourchip) -{ - struct samsung_gpio_pm *pm = ourchip->pm; - - if (pm == NULL || pm->resume == NULL) - S3C_PMDBG("%s: no pm for %s\n", __func__, ourchip->chip.label); - else - pm->resume(ourchip); -} - -void samsung_pm_restore_gpios(void) -{ - struct samsung_gpio_chip *ourchip; - unsigned int gpio_nr; - - for (gpio_nr = 0; gpio_nr < S3C_GPIO_END;) { - ourchip = samsung_gpiolib_getchip(gpio_nr); - if (!ourchip) { - gpio_nr++; - continue; - } - - samsung_pm_resume_gpio(ourchip); - - gpio_nr += ourchip->chip.ngpio; - gpio_nr += CONFIG_S3C_GPIO_SPACE; - } -} diff --git a/arch/arm/plat-samsung/pm.c b/arch/arm/plat-samsung/pm.c deleted file mode 100644 index d6bfd66592b0..000000000000 --- a/arch/arm/plat-samsung/pm.c +++ /dev/null @@ -1,199 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright 2008 Openmoko, Inc. -// Copyright 2004-2008 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// http://armlinux.simtec.co.uk/ -// -// S3C common power management (suspend to ram) support. - -#include <linux/init.h> -#include <linux/suspend.h> -#include <linux/errno.h> -#include <linux/delay.h> -#include <linux/of.h> -#include <linux/serial_s3c.h> -#include <linux/io.h> - -#include <asm/cacheflush.h> -#include <asm/suspend.h> - -#include <mach/map.h> -#include <mach/regs-clock.h> -#include <mach/regs-irq.h> -#include <mach/irqs.h> - -#include <asm/irq.h> - -#include <plat/pm.h> -#include <mach/pm-core.h> - -/* for external use */ - -unsigned long s3c_pm_flags; - -/* The IRQ ext-int code goes here, it is too small to currently bother - * with its own file. */ - -unsigned long s3c_irqwake_intmask = 0xffffffffL; -unsigned long s3c_irqwake_eintmask = 0xffffffffL; - -int s3c_irqext_wake(struct irq_data *data, unsigned int state) -{ - unsigned long bit = 1L << IRQ_EINT_BIT(data->irq); - - if (!(s3c_irqwake_eintallow & bit)) - return -ENOENT; - - printk(KERN_INFO "wake %s for irq %d\n", - state ? "enabled" : "disabled", data->irq); - - if (!state) - s3c_irqwake_eintmask |= bit; - else - s3c_irqwake_eintmask &= ~bit; - - return 0; -} - -void (*pm_cpu_prep)(void); -int (*pm_cpu_sleep)(unsigned long); - -#define any_allowed(mask, allow) (((mask) & (allow)) != (allow)) - -/* s3c_pm_enter - * - * central control for sleep/resume process -*/ - -static int s3c_pm_enter(suspend_state_t state) -{ - int ret; - /* ensure the debug is initialised (if enabled) */ - - s3c_pm_debug_init(); - - S3C_PMDBG("%s(%d)\n", __func__, state); - - if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) { - printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__); - return -EINVAL; - } - - /* check if we have anything to wake-up with... bad things seem - * to happen if you suspend with no wakeup (system will often - * require a full power-cycle) - */ - - if (!of_have_populated_dt() && - !any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) && - !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) { - printk(KERN_ERR "%s: No wake-up sources!\n", __func__); - printk(KERN_ERR "%s: Aborting sleep\n", __func__); - return -EINVAL; - } - - /* save all necessary core registers not covered by the drivers */ - - if (!of_have_populated_dt()) { - samsung_pm_save_gpios(); - samsung_pm_saved_gpios(); - } - - s3c_pm_save_uarts(); - s3c_pm_save_core(); - - /* set the irq configuration for wake */ - - s3c_pm_configure_extint(); - - S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n", - s3c_irqwake_intmask, s3c_irqwake_eintmask); - - s3c_pm_arch_prepare_irqs(); - - /* call cpu specific preparation */ - - pm_cpu_prep(); - - /* flush cache back to ram */ - - flush_cache_all(); - - s3c_pm_check_store(); - - /* send the cpu to sleep... */ - - s3c_pm_arch_stop_clocks(); - - /* this will also act as our return point from when - * we resume as it saves its own register state and restores it - * during the resume. */ - - ret = cpu_suspend(0, pm_cpu_sleep); - if (ret) - return ret; - - /* restore the system state */ - - s3c_pm_restore_core(); - s3c_pm_restore_uarts(); - - if (!of_have_populated_dt()) { - samsung_pm_restore_gpios(); - s3c_pm_restored_gpios(); - } - - s3c_pm_debug_init(); - - /* check what irq (if any) restored the system */ - - s3c_pm_arch_show_resume_irqs(); - - S3C_PMDBG("%s: post sleep, preparing to return\n", __func__); - - /* LEDs should now be 1110 */ - s3c_pm_debug_smdkled(1 << 1, 0); - - s3c_pm_check_restore(); - - /* ok, let's return from sleep */ - - S3C_PMDBG("S3C PM Resume (post-restore)\n"); - return 0; -} - -static int s3c_pm_prepare(void) -{ - /* prepare check area if configured */ - - s3c_pm_check_prepare(); - return 0; -} - -static void s3c_pm_finish(void) -{ - s3c_pm_check_cleanup(); -} - -static const struct platform_suspend_ops s3c_pm_ops = { - .enter = s3c_pm_enter, - .prepare = s3c_pm_prepare, - .finish = s3c_pm_finish, - .valid = suspend_valid_only_mem, -}; - -/* s3c_pm_init - * - * Attach the power management functions. This should be called - * from the board specific initialisation if the board supports - * it. -*/ - -int __init s3c_pm_init(void) -{ - printk("S3C Power Management, Copyright 2004 Simtec Electronics\n"); - - suspend_set_ops(&s3c_pm_ops); - return 0; -} diff --git a/arch/arm/plat-samsung/wakeup-mask.c b/arch/arm/plat-samsung/wakeup-mask.c deleted file mode 100644 index 24f96fb80738..000000000000 --- a/arch/arm/plat-samsung/wakeup-mask.c +++ /dev/null @@ -1,42 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright 2010 Ben Dooks <ben-linux@fluff.org> -// -// Support for wakeup mask interrupts on newer SoCs - -#include <linux/kernel.h> -#include <linux/spinlock.h> -#include <linux/device.h> -#include <linux/types.h> -#include <linux/irq.h> -#include <linux/io.h> - -#include <plat/wakeup-mask.h> -#include <plat/pm.h> - -void samsung_sync_wakemask(void __iomem *reg, - const struct samsung_wakeup_mask *mask, int nr_mask) -{ - struct irq_data *data; - u32 val; - - val = __raw_readl(reg); - - for (; nr_mask > 0; nr_mask--, mask++) { - if (mask->irq == NO_WAKEUP_IRQ) { - val |= mask->bit; - continue; - } - - data = irq_get_irq_data(mask->irq); - - /* bit of a liberty to read this directly from irq_data. */ - if (irqd_is_wakeup_set(data)) - val &= ~mask->bit; - else - val |= mask->bit; - } - - printk(KERN_INFO "wakemask %08x => %08x\n", __raw_readl(reg), val); - __raw_writel(val, reg); -} diff --git a/arch/arm/plat-samsung/watchdog-reset.c b/arch/arm/plat-samsung/watchdog-reset.c deleted file mode 100644 index 71d85ff323f7..000000000000 --- a/arch/arm/plat-samsung/watchdog-reset.c +++ /dev/null @@ -1,93 +0,0 @@ -// SPDX-License-Identifier: GPL-2.0 -// -// Copyright (c) 2008 Simtec Electronics -// Ben Dooks <ben@simtec.co.uk> -// -// Copyright (c) 2013 Tomasz Figa <tomasz.figa@gmail.com> -// -// Watchdog reset support for Samsung SoCs. - -#include <linux/clk.h> -#include <linux/err.h> -#include <linux/io.h> -#include <linux/delay.h> -#include <linux/of.h> -#include <linux/of_address.h> - -#define S3C2410_WTCON 0x00 -#define S3C2410_WTDAT 0x04 -#define S3C2410_WTCNT 0x08 - -#define S3C2410_WTCON_ENABLE (1 << 5) -#define S3C2410_WTCON_DIV16 (0 << 3) -#define S3C2410_WTCON_RSTEN (1 << 0) -#define S3C2410_WTCON_PRESCALE(x) ((x) << 8) - -static void __iomem *wdt_base; -static struct clk *wdt_clock; - -void samsung_wdt_reset(void) -{ - if (!wdt_base) { - pr_err("%s: wdt reset not initialized\n", __func__); - /* delay to allow the serial port to show the message */ - mdelay(50); - return; - } - - if (!IS_ERR(wdt_clock)) - clk_prepare_enable(wdt_clock); - - /* disable watchdog, to be safe */ - __raw_writel(0, wdt_base + S3C2410_WTCON); - - /* put initial values into count and data */ - __raw_writel(0x80, wdt_base + S3C2410_WTCNT); - __raw_writel(0x80, wdt_base + S3C2410_WTDAT); - - /* set the watchdog to go and reset... */ - __raw_writel(S3C2410_WTCON_ENABLE | S3C2410_WTCON_DIV16 | - S3C2410_WTCON_RSTEN | S3C2410_WTCON_PRESCALE(0x20), - wdt_base + S3C2410_WTCON); - - /* wait for reset to assert... */ - mdelay(500); - - pr_err("Watchdog reset failed to assert reset\n"); - - /* delay to allow the serial port to show the message */ - mdelay(50); -} - -#ifdef CONFIG_OF -static const struct of_device_id s3c2410_wdt_match[] = { - { .compatible = "samsung,s3c2410-wdt" }, - { .compatible = "samsung,s3c6410-wdt" }, - {}, -}; - -void __init samsung_wdt_reset_of_init(void) -{ - struct device_node *np; - - np = of_find_matching_node(NULL, s3c2410_wdt_match); - if (!np) { - pr_err("%s: failed to find watchdog node\n", __func__); - return; - } - - wdt_base = of_iomap(np, 0); - if (!wdt_base) { - pr_err("%s: failed to map watchdog registers\n", __func__); - return; - } - - wdt_clock = of_clk_get(np, 0); -} -#endif - -void __init samsung_wdt_reset_init(void __iomem *base) -{ - wdt_base = base; - wdt_clock = clk_get(NULL, "watchdog"); -} |