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Diffstat (limited to 'arch/arm64/boot/dts/arm/juno-r2.dts')
-rw-r--r--arch/arm64/boot/dts/arm/juno-r2.dts18
1 files changed, 12 insertions, 6 deletions
diff --git a/arch/arm64/boot/dts/arm/juno-r2.dts b/arch/arm64/boot/dts/arm/juno-r2.dts
index ab77adb4f3c2..305300dd521c 100644
--- a/arch/arm64/boot/dts/arm/juno-r2.dts
+++ b/arch/arm64/boot/dts/arm/juno-r2.dts
@@ -85,7 +85,7 @@
};
A72_0: cpu@0 {
- compatible = "arm,cortex-a72","arm,armv8";
+ compatible = "arm,cortex-a72";
reg = <0x0 0x0>;
device_type = "cpu";
enable-method = "psci";
@@ -99,10 +99,11 @@
clocks = <&scpi_dvfs 0>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
capacity-dmips-mhz = <1024>;
+ dynamic-power-coefficient = <450>;
};
A72_1: cpu@1 {
- compatible = "arm,cortex-a72","arm,armv8";
+ compatible = "arm,cortex-a72";
reg = <0x0 0x1>;
device_type = "cpu";
enable-method = "psci";
@@ -116,10 +117,11 @@
clocks = <&scpi_dvfs 0>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
capacity-dmips-mhz = <1024>;
+ dynamic-power-coefficient = <450>;
};
A53_0: cpu@100 {
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x0 0x100>;
device_type = "cpu";
enable-method = "psci";
@@ -133,10 +135,11 @@
clocks = <&scpi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
capacity-dmips-mhz = <485>;
+ dynamic-power-coefficient = <140>;
};
A53_1: cpu@101 {
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x0 0x101>;
device_type = "cpu";
enable-method = "psci";
@@ -150,10 +153,11 @@
clocks = <&scpi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
capacity-dmips-mhz = <485>;
+ dynamic-power-coefficient = <140>;
};
A53_2: cpu@102 {
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x0 0x102>;
device_type = "cpu";
enable-method = "psci";
@@ -167,10 +171,11 @@
clocks = <&scpi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
capacity-dmips-mhz = <485>;
+ dynamic-power-coefficient = <140>;
};
A53_3: cpu@103 {
- compatible = "arm,cortex-a53","arm,armv8";
+ compatible = "arm,cortex-a53";
reg = <0x0 0x103>;
device_type = "cpu";
enable-method = "psci";
@@ -184,6 +189,7 @@
clocks = <&scpi_dvfs 1>;
cpu-idle-states = <&CPU_SLEEP_0 &CLUSTER_SLEEP_0>;
capacity-dmips-mhz = <485>;
+ dynamic-power-coefficient = <140>;
};
A72_L2: l2-cache0 {