diff options
Diffstat (limited to 'arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts')
-rw-r--r-- | arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts | 160 |
1 files changed, 144 insertions, 16 deletions
diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts index 9720a190049f..ecd2c1ea177f 100644 --- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts +++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-rdb.dts @@ -2,7 +2,7 @@ /* * Device Tree file for NXP LS1028A RDB Board. * - * Copyright 2018 NXP + * Copyright 2018-2021 NXP * * Harninder Rai <harninder.rai@nxp.com> * @@ -19,6 +19,19 @@ crypto = &crypto; serial0 = &duart0; serial1 = &duart1; + mmc0 = &esdhc; + mmc1 = &esdhc1; + rtc1 = &ftm_alarm1; + spi0 = &fspi; + ethernet0 = &enetc_port0; + ethernet1 = &enetc_port2; + ethernet2 = &mscc_felix_port0; + ethernet3 = &mscc_felix_port1; + ethernet4 = &mscc_felix_port2; + ethernet5 = &mscc_felix_port3; + ethernet6 = &mscc_felix_port4; + ethernet7 = &mscc_felix_port5; + ethernet8 = &enetc_port3; }; chosen { @@ -83,6 +96,68 @@ }; }; +&can0 { + status = "okay"; + + can-transceiver { + max-bitrate = <5000000>; + }; +}; + +&can1 { + status = "okay"; + + can-transceiver { + max-bitrate = <5000000>; + }; +}; + +&duart0 { + status = "okay"; +}; + +&duart1 { + status = "okay"; +}; + +&enetc_mdio_pf3 { + sgmii_phy0: ethernet-phy@2 { + reg = <0x2>; + }; + + /* VSC8514 QSGMII quad PHY */ + qsgmii_phy0: ethernet-phy@10 { + reg = <0x10>; + }; + + qsgmii_phy1: ethernet-phy@11 { + reg = <0x11>; + }; + + qsgmii_phy2: ethernet-phy@12 { + reg = <0x12>; + }; + + qsgmii_phy3: ethernet-phy@13 { + reg = <0x13>; + }; +}; + +&enetc_port0 { + phy-handle = <&sgmii_phy0>; + phy-mode = "sgmii"; + managed = "in-band-status"; + status = "okay"; +}; + +&enetc_port2 { + status = "okay"; +}; + +&enetc_port3 { + status = "okay"; +}; + &esdhc { sd-uhs-sdr104; sd-uhs-sdr50; @@ -93,6 +168,27 @@ &esdhc1 { mmc-hs200-1_8v; + mmc-hs400-1_8v; + bus-width = <8>; + status = "okay"; +}; + +&fspi { + status = "okay"; + + mt35xu02g0: flash@0 { + compatible = "jedec,spi-nor"; + #address-cells = <1>; + #size-cells = <1>; + spi-max-frequency = <50000000>; + /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */ + spi-rx-bus-width = <8>; /* 8 SPI Rx lines */ + spi-tx-bus-width = <1>; /* 1 SPI Tx line */ + reg = <0>; + }; +}; + +&ftm_alarm1 { status = "okay"; }; @@ -152,29 +248,56 @@ }; }; -&duart0 { +&mscc_felix { status = "okay"; }; -&duart1 { +&mscc_felix_port0 { + label = "swp0"; + managed = "in-band-status"; + phy-handle = <&qsgmii_phy0>; + phy-mode = "qsgmii"; status = "okay"; }; -&enetc_port0 { - phy-handle = <&sgmii_phy0>; - phy-connection-type = "sgmii"; +&mscc_felix_port1 { + label = "swp1"; + managed = "in-band-status"; + phy-handle = <&qsgmii_phy1>; + phy-mode = "qsgmii"; + status = "okay"; +}; - mdio { - #address-cells = <1>; - #size-cells = <0>; - sgmii_phy0: ethernet-phy@2 { - reg = <0x2>; - }; - }; +&mscc_felix_port2 { + label = "swp2"; + managed = "in-band-status"; + phy-handle = <&qsgmii_phy2>; + phy-mode = "qsgmii"; + status = "okay"; +}; + +&mscc_felix_port3 { + label = "swp3"; + managed = "in-band-status"; + phy-handle = <&qsgmii_phy3>; + phy-mode = "qsgmii"; + status = "okay"; }; -&enetc_port1 { - status = "disabled"; +&mscc_felix_port4 { + status = "okay"; +}; + +&mscc_felix_port5 { + status = "okay"; +}; + +&optee { + status = "okay"; +}; + +&pwm0 { + status = "okay"; }; &sai4 { @@ -185,6 +308,11 @@ status = "okay"; }; +&usb0 { + dr_mode = "host"; + status = "okay"; +}; + &usb1 { - dr_mode = "otg"; + status = "okay"; }; |