diff options
Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi | 85 |
1 files changed, 77 insertions, 8 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi index 3c42240e78e2..ce6ef160fd55 100644 --- a/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi +++ b/arch/arm64/boot/dts/freescale/imx8-ss-conn.dtsi @@ -28,6 +28,13 @@ conn_ipg_clk: clock-conn-ipg { clock-output-names = "conn_ipg_clk"; }; +conn_bch_clk: clock-conn-bch { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <400000000>; + clock-output-names = "conn_bch_clk"; +}; + conn_subsys: bus@5b000000 { compatible = "simple-bus"; #address-cells = <1>; @@ -41,7 +48,7 @@ conn_subsys: bus@5b000000 { interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; fsl,usbphy = <&usbphy1>; fsl,usbmisc = <&usbmisc1 0>; - clocks = <&usb2_lpcg 0>; + clocks = <&usb2_lpcg IMX_LPCG_CLK_6>; ahb-burst-config = <0x0>; tx-burst-size-dword = <0x10>; rx-burst-size-dword = <0x10>; @@ -58,7 +65,7 @@ conn_subsys: bus@5b000000 { usbphy1: usbphy@5b100000 { compatible = "fsl,imx7ulp-usbphy"; reg = <0x5b100000 0x1000>; - clocks = <&usb2_lpcg 1>; + clocks = <&usb2_lpcg IMX_LPCG_CLK_7>; power-domains = <&pd IMX_SC_R_USB_0_PHY>; status = "disabled"; }; @@ -67,8 +74,8 @@ conn_subsys: bus@5b000000 { interrupts = <GIC_SPI 232 IRQ_TYPE_LEVEL_HIGH>; reg = <0x5b010000 0x10000>; clocks = <&sdhc0_lpcg IMX_LPCG_CLK_4>, - <&sdhc0_lpcg IMX_LPCG_CLK_0>, - <&sdhc0_lpcg IMX_LPCG_CLK_5>; + <&sdhc0_lpcg IMX_LPCG_CLK_5>, + <&sdhc0_lpcg IMX_LPCG_CLK_0>; clock-names = "ipg", "ahb", "per"; power-domains = <&pd IMX_SC_R_SDHC_0>; status = "disabled"; @@ -78,8 +85,8 @@ conn_subsys: bus@5b000000 { interrupts = <GIC_SPI 233 IRQ_TYPE_LEVEL_HIGH>; reg = <0x5b020000 0x10000>; clocks = <&sdhc1_lpcg IMX_LPCG_CLK_4>, - <&sdhc1_lpcg IMX_LPCG_CLK_0>, - <&sdhc1_lpcg IMX_LPCG_CLK_5>; + <&sdhc1_lpcg IMX_LPCG_CLK_5>, + <&sdhc1_lpcg IMX_LPCG_CLK_0>; clock-names = "ipg", "ahb", "per"; power-domains = <&pd IMX_SC_R_SDHC_1>; fsl,tuning-start-tap = <20>; @@ -91,8 +98,8 @@ conn_subsys: bus@5b000000 { interrupts = <GIC_SPI 234 IRQ_TYPE_LEVEL_HIGH>; reg = <0x5b030000 0x10000>; clocks = <&sdhc2_lpcg IMX_LPCG_CLK_4>, - <&sdhc2_lpcg IMX_LPCG_CLK_0>, - <&sdhc2_lpcg IMX_LPCG_CLK_5>; + <&sdhc2_lpcg IMX_LPCG_CLK_5>, + <&sdhc2_lpcg IMX_LPCG_CLK_0>; clock-names = "ipg", "ahb", "per"; power-domains = <&pd IMX_SC_R_SDHC_2>; status = "disabled"; @@ -302,4 +309,66 @@ conn_subsys: bus@5b000000 { "usb3_aclk"; power-domains = <&pd IMX_SC_R_USB_2_PHY>; }; + + rawnand_0_lpcg: clock-controller@5b290000 { + compatible = "fsl,imx8qxp-lpcg"; + reg = <0x5b290000 0x4>; + #clock-cells = <1>; + clocks = <&clk IMX_SC_R_NAND IMX_SC_PM_CLK_PER>, + <&clk IMX_SC_R_NAND IMX_SC_PM_CLK_MST_BUS>, + <&conn_axi_clk>, + <&conn_axi_clk>; + clock-indices = <IMX_LPCG_CLK_0>, <IMX_LPCG_CLK_1>, + <IMX_LPCG_CLK_4>, <IMX_LPCG_CLK_5>; + clock-output-names = "gpmi_bch", + "gpmi_io", + "gpmi_apb", + "gpmi_bch_apb"; + power-domains = <&pd IMX_SC_R_NAND>; + }; + + rawnand_4_lpcg: clock-controller@5b290004 { + compatible = "fsl,imx8qxp-lpcg"; + reg = <0x5b290004 0x10000>; + #clock-cells = <1>; + clocks = <&conn_axi_clk>; + clock-indices = <IMX_LPCG_CLK_4>; + clock-output-names = "apbhdma_hclk"; + power-domains = <&pd IMX_SC_R_NAND>; + }; + + dma_apbh: dma-controller@5b810000 { + compatible = "fsl,imx8qxp-dma-apbh", "fsl,imx28-dma-apbh"; + reg = <0x5b810000 0x2000>; + interrupts = <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 274 IRQ_TYPE_LEVEL_HIGH>; + #dma-cells = <1>; + dma-channels = <4>; + clocks = <&rawnand_4_lpcg IMX_LPCG_CLK_0>; + power-domains = <&pd IMX_SC_R_NAND>; + }; + + gpmi: nand-controller@5b812000 { + compatible = "fsl,imx8qxp-gpmi-nand"; + reg = <0x5b812000 0x2000>, <0x5b814000 0x2000>; + reg-names = "gpmi-nand", "bch"; + #address-cells = <1>; + #size-cells = <0>; + interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "bch"; + clocks = <&rawnand_0_lpcg IMX_LPCG_CLK_1>, + <&rawnand_0_lpcg IMX_LPCG_CLK_4>, + <&rawnand_0_lpcg IMX_LPCG_CLK_0>, + <&rawnand_0_lpcg IMX_LPCG_CLK_5>; + clock-names = "gpmi_io", "gpmi_apb", + "gpmi_bch", "gpmi_bch_apb"; + dmas = <&dma_apbh 0>; + dma-names = "rx-tx"; + power-domains = <&pd IMX_SC_R_NAND>; + assigned-clocks = <&clk IMX_SC_R_NAND IMX_SC_PM_CLK_MST_BUS>; + assigned-clock-rates = <50000000>; + status = "disabled"; + }; }; |