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Diffstat (limited to 'arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2.dts')
-rw-r--r--arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2.dts30
1 files changed, 17 insertions, 13 deletions
diff --git a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2.dts b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2.dts
index 382fbedaf6ba..92df6c1277c3 100644
--- a/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mp-dhcom-pdk2.dts
@@ -104,20 +104,10 @@
};
};
-/*
- * PDK2 carrier board uses SoM with KSZ9131 populated and connected to
- * SoM EQoS ethernet RGMII interface. Remove the other SoM PHY DT node.
- */
-/delete-node/ &ethphy0f;
-
-/*
- * PDK2 carrier board has KSZ9021 PHY populated and connected to SoM FEC
- * ethernet RGMII interface. The SoM is not populated with second FEC PHY.
- */
-/delete-node/ &ethphy1f;
-
&fec { /* Second ethernet */
+ pinctrl-0 = <&pinctrl_fec_rgmii>;
phy-handle = <&ethphypdk>;
+ phy-mode = "rgmii";
mdio {
ethphypdk: ethernet-phy@7 { /* KSZ 9021 */
@@ -151,6 +141,20 @@
status = "okay";
};
+&pcie_phy {
+ clock-names = "ref";
+ clocks = <&clk IMX8MP_SYS_PLL2_100M>;
+ fsl,clkreq-unsupported;
+ fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_UNUSED>;
+ status = "okay";
+};
+
+&pcie {
+ fsl,max-link-speed = <1>;
+ reset-gpio = <&gpio1 6 GPIO_ACTIVE_LOW>; /* GPIO J */
+ status = "okay";
+};
+
&usb3_1 {
fsl,over-current-active-low;
};
@@ -159,7 +163,7 @@
/*
* GPIO_A,B,C,D are connected to buttons.
* GPIO_E,F,H,I are connected to LEDs.
- * GPIO_M is connected to CLKOUT2.
+ * GPIO_M is connected to CLKOUT1.
*/
pinctrl-0 = <&pinctrl_hog_base
&pinctrl_dhcom_g &pinctrl_dhcom_j