diff options
Diffstat (limited to 'arch/arm64/boot/dts/mediatek/mt8365-evk.dts')
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 183 |
1 files changed, 183 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts new file mode 100644 index 000000000000..ceb48eb1a6e6 --- /dev/null +++ b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts @@ -0,0 +1,183 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2021-2022 BayLibre, SAS. + * Authors: + * Fabien Parent <fparent@baylibre.com> + * Bernhard Rosenkränzer <bero@baylibre.com> + */ + +/dts-v1/; + +#include <dt-bindings/gpio/gpio.h> +#include <dt-bindings/input/input.h> +#include <dt-bindings/pinctrl/mt8365-pinfunc.h> +#include "mt8365.dtsi" + +/ { + model = "MediaTek MT8365 Open Platform EVK"; + compatible = "mediatek,mt8365-evk", "mediatek,mt8365"; + + aliases { + serial0 = &uart0; + }; + + chosen { + stdout-path = "serial0:921600n8"; + }; + + firmware { + optee { + compatible = "linaro,optee-tz"; + method = "smc"; + }; + }; + + gpio-keys { + compatible = "gpio-keys"; + pinctrl-names = "default"; + pinctrl-0 = <&gpio_keys>; + + key-volume-up { + gpios = <&pio 24 GPIO_ACTIVE_LOW>; + label = "volume_up"; + linux,code = <KEY_VOLUMEUP>; + wakeup-source; + debounce-interval = <15>; + }; + }; + + memory@40000000 { + device_type = "memory"; + reg = <0 0x40000000 0 0xc0000000>; + }; + + usb_otg_vbus: regulator-0 { + compatible = "regulator-fixed"; + regulator-name = "otg_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&pio 16 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; + + reserved-memory { + #address-cells = <2>; + #size-cells = <2>; + ranges; + + /* 192 KiB reserved for ARM Trusted Firmware (BL31) */ + bl31_secmon_reserved: secmon@43000000 { + no-map; + reg = <0 0x43000000 0 0x30000>; + }; + + /* 12 MiB reserved for OP-TEE (BL32) + * +-----------------------+ 0x43e0_0000 + * | SHMEM 2MiB | + * +-----------------------+ 0x43c0_0000 + * | | TA_RAM 8MiB | + * + TZDRAM +--------------+ 0x4340_0000 + * | | TEE_RAM 2MiB | + * +-----------------------+ 0x4320_0000 + */ + optee_reserved: optee@43200000 { + no-map; + reg = <0 0x43200000 0 0x00c00000>; + }; + }; +}; + +&i2c0 { + clock-frequency = <100000>; + pinctrl-0 = <&i2c0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&pio { + gpio_keys: gpio-keys-pins { + pins { + pinmux = <MT8365_PIN_24_KPCOL0__FUNC_KPCOL0>; + bias-pull-up; + input-enable; + }; + }; + + i2c0_pins: i2c0-pins { + pins { + pinmux = <MT8365_PIN_57_SDA0__FUNC_SDA0_0>, + <MT8365_PIN_58_SCL0__FUNC_SCL0_0>; + bias-pull-up; + }; + }; + + uart0_pins: uart0-pins { + pins { + pinmux = <MT8365_PIN_35_URXD0__FUNC_URXD0>, + <MT8365_PIN_36_UTXD0__FUNC_UTXD0>; + }; + }; + + uart1_pins: uart1-pins { + pins { + pinmux = <MT8365_PIN_37_URXD1__FUNC_URXD1>, + <MT8365_PIN_38_UTXD1__FUNC_UTXD1>; + }; + }; + + uart2_pins: uart2-pins { + pins { + pinmux = <MT8365_PIN_39_URXD2__FUNC_URXD2>, + <MT8365_PIN_40_UTXD2__FUNC_UTXD2>; + }; + }; + + usb_pins: usb-pins { + id-pins { + pinmux = <MT8365_PIN_17_GPIO17__FUNC_GPIO17>; + input-enable; + bias-pull-up; + }; + + usb0-vbus-pins { + pinmux = <MT8365_PIN_16_GPIO16__FUNC_USB_DRVVBUS>; + output-high; + }; + + usb1-vbus-pins { + pinmux = <MT8365_PIN_18_GPIO18__FUNC_GPIO18>; + output-high; + }; + }; + + pwm_pins: pwm-pins { + pins { + pinmux = <MT8365_PIN_19_DISP_PWM__FUNC_PWM_A>, + <MT8365_PIN_116_I2S_BCK__FUNC_PWM_C>; + }; + }; +}; + +&pwm { + pinctrl-0 = <&pwm_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&uart0 { + pinctrl-0 = <&uart0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&uart1 { + pinctrl-0 = <&uart1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&uart2 { + pinctrl-0 = <&uart2_pins>; + pinctrl-names = "default"; + status = "okay"; +}; |