diff options
Diffstat (limited to 'arch/arm64/boot/dts/mediatek/mt8365-evk.dts')
| -rw-r--r-- | arch/arm64/boot/dts/mediatek/mt8365-evk.dts | 91 |
1 files changed, 89 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts index 50cbaefa1a99..44c61094c4d5 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365-evk.dts +++ b/arch/arm64/boot/dts/mediatek/mt8365-evk.dts @@ -4,6 +4,7 @@ * Authors: * Fabien Parent <fparent@baylibre.com> * Bernhard Rosenkränzer <bero@baylibre.com> + * Alexandre Mergnat <amergnat@baylibre.com> */ /dts-v1/; @@ -20,6 +21,7 @@ aliases { serial0 = &uart0; + ethernet = ðernet; }; chosen { @@ -86,6 +88,28 @@ reg = <0 0x43200000 0 0x00c00000>; }; }; + + sound: sound { + compatible = "mediatek,mt8365-mt6357"; + pinctrl-names = "default", + "dmic", + "miso_off", + "miso_on", + "mosi_off", + "mosi_on"; + pinctrl-0 = <&aud_default_pins>; + pinctrl-1 = <&aud_dmic_pins>; + pinctrl-2 = <&aud_miso_off_pins>; + pinctrl-3 = <&aud_miso_on_pins>; + pinctrl-4 = <&aud_mosi_off_pins>; + pinctrl-5 = <&aud_mosi_on_pins>; + mediatek,platform = <&afe>; + }; +}; + +&afe { + mediatek,dmic-mode = <1>; + status = "okay"; }; &cpu0 { @@ -178,9 +202,72 @@ interrupts-extended = <&pio 145 IRQ_TYPE_LEVEL_HIGH>; interrupt-controller; #interrupt-cells = <2>; + mediatek,micbias0-microvolt = <1900000>; + mediatek,micbias1-microvolt = <1700000>; }; &pio { + aud_default_pins: audiodefault-pins { + clk-dat-pins { + pinmux = <MT8365_PIN_72_CMDAT4__FUNC_I2S3_BCK>, + <MT8365_PIN_73_CMDAT5__FUNC_I2S3_LRCK>, + <MT8365_PIN_74_CMDAT6__FUNC_I2S3_MCK>, + <MT8365_PIN_75_CMDAT7__FUNC_I2S3_DO>; + }; + }; + + aud_dmic_pins: audiodmic-pins { + clk-dat-pins { + pinmux = <MT8365_PIN_117_DMIC0_CLK__FUNC_DMIC0_CLK>, + <MT8365_PIN_118_DMIC0_DAT0__FUNC_DMIC0_DAT0>, + <MT8365_PIN_119_DMIC0_DAT1__FUNC_DMIC0_DAT1>; + }; + }; + + aud_miso_off_pins: misooff-pins { + clk-dat-pins { + pinmux = <MT8365_PIN_53_AUD_CLK_MISO__FUNC_GPIO53>, + <MT8365_PIN_54_AUD_SYNC_MISO__FUNC_GPIO54>, + <MT8365_PIN_55_AUD_DAT_MISO0__FUNC_GPIO55>, + <MT8365_PIN_56_AUD_DAT_MISO1__FUNC_GPIO56>; + input-enable; + bias-pull-down; + drive-strength = <2>; + }; + }; + + aud_miso_on_pins: misoon-pins { + clk-dat-pins { + pinmux = <MT8365_PIN_53_AUD_CLK_MISO__FUNC_AUD_CLK_MISO>, + <MT8365_PIN_54_AUD_SYNC_MISO__FUNC_AUD_SYNC_MISO>, + <MT8365_PIN_55_AUD_DAT_MISO0__FUNC_AUD_DAT_MISO0>, + <MT8365_PIN_56_AUD_DAT_MISO1__FUNC_AUD_DAT_MISO1>; + drive-strength = <6>; + }; + }; + + aud_mosi_off_pins: mosioff-pins { + clk-dat-pins { + pinmux = <MT8365_PIN_49_AUD_CLK_MOSI__FUNC_GPIO49>, + <MT8365_PIN_50_AUD_SYNC_MOSI__FUNC_GPIO50>, + <MT8365_PIN_51_AUD_DAT_MOSI0__FUNC_GPIO51>, + <MT8365_PIN_52_AUD_DAT_MOSI1__FUNC_GPIO52>; + input-enable; + bias-pull-down; + drive-strength = <2>; + }; + }; + + aud_mosi_on_pins: mosion-pins { + clk-dat-pins { + pinmux = <MT8365_PIN_49_AUD_CLK_MOSI__FUNC_AUD_CLK_MOSI>, + <MT8365_PIN_50_AUD_SYNC_MOSI__FUNC_AUD_SYNC_MOSI>, + <MT8365_PIN_51_AUD_DAT_MOSI0__FUNC_AUD_DAT_MOSI0>, + <MT8365_PIN_52_AUD_DAT_MOSI1__FUNC_AUD_DAT_MOSI1>; + drive-strength = <6>; + }; + }; + ethernet_pins: ethernet-pins { phy_reset_pins { pinmux = <MT8365_PIN_133_TDM_TX_DATA1__FUNC_GPIO133>; @@ -308,7 +395,7 @@ mmc1_uhs_pins: mmc1-uhs-pins { clk-pins { pinmux = <MT8365_PIN_88_MSDC1_CLK__FUNC_MSDC1_CLK>; - drive-strength = <MTK_DRIVE_8mA>; + drive-strength = <8>; bias-pull-down = <MTK_PUPD_SET_R1R0_10>; }; @@ -319,7 +406,7 @@ <MT8365_PIN_92_MSDC1_DAT3__FUNC_MSDC1_DAT3>, <MT8365_PIN_87_MSDC1_CMD__FUNC_MSDC1_CMD>; input-enable; - drive-strength = <MTK_DRIVE_6mA>; + drive-strength = <6>; bias-pull-up = <MTK_PUPD_SET_R1R0_01>; }; }; |