diff options
Diffstat (limited to 'arch/arm64/boot/dts/qcom/ipq8074.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/ipq8074.dtsi | 42 |
1 files changed, 21 insertions, 21 deletions
diff --git a/arch/arm64/boot/dts/qcom/ipq8074.dtsi b/arch/arm64/boot/dts/qcom/ipq8074.dtsi index d80b1cefab10..943243d5515b 100644 --- a/arch/arm64/boot/dts/qcom/ipq8074.dtsi +++ b/arch/arm64/boot/dts/qcom/ipq8074.dtsi @@ -13,7 +13,7 @@ clocks { sleep_clk: sleep_clk { compatible = "fixed-clock"; - clock-frequency = <32000>; + clock-frequency = <32768>; #clock-cells = <0>; }; @@ -467,12 +467,12 @@ #size-cells = <0>; reg = <0x078b6000 0x600>; interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_AHB_CLK>, - <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>; - clock-names = "iface", "core"; + clocks = <&gcc GCC_BLSP1_QUP2_I2C_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; clock-frequency = <400000>; - dmas = <&blsp_dma 15>, <&blsp_dma 14>; - dma-names = "rx", "tx"; + dmas = <&blsp_dma 14>, <&blsp_dma 15>; + dma-names = "tx", "rx"; pinctrl-0 = <&i2c_0_pins>; pinctrl-names = "default"; status = "disabled"; @@ -484,12 +484,12 @@ #size-cells = <0>; reg = <0x078b7000 0x600>; interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_AHB_CLK>, - <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>; - clock-names = "iface", "core"; + clocks = <&gcc GCC_BLSP1_QUP3_I2C_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; clock-frequency = <100000>; - dmas = <&blsp_dma 17>, <&blsp_dma 16>; - dma-names = "rx", "tx"; + dmas = <&blsp_dma 16>, <&blsp_dma 17>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -499,12 +499,12 @@ #size-cells = <0>; reg = <0x78b9000 0x600>; interrupts = <GIC_SPI 299 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_AHB_CLK>, - <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>; - clock-names = "iface", "core"; + clocks = <&gcc GCC_BLSP1_QUP5_I2C_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; clock-frequency = <400000>; - dmas = <&blsp_dma 21>, <&blsp_dma 20>; - dma-names = "rx", "tx"; + dmas = <&blsp_dma 20>, <&blsp_dma 21>; + dma-names = "tx", "rx"; status = "disabled"; }; @@ -514,12 +514,12 @@ #size-cells = <0>; reg = <0x078ba000 0x600>; interrupts = <GIC_SPI 300 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&gcc GCC_BLSP1_AHB_CLK>, - <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>; - clock-names = "iface", "core"; + clocks = <&gcc GCC_BLSP1_QUP6_I2C_APPS_CLK>, + <&gcc GCC_BLSP1_AHB_CLK>; + clock-names = "core", "iface"; clock-frequency = <100000>; - dmas = <&blsp_dma 23>, <&blsp_dma 22>; - dma-names = "rx", "tx"; + dmas = <&blsp_dma 22>, <&blsp_dma 23>; + dma-names = "tx", "rx"; status = "disabled"; }; |