diff options
Diffstat (limited to 'arch/arm64/boot/dts/qcom/sdm845-db845c.dts')
| -rw-r--r-- | arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 12 |
1 files changed, 9 insertions, 3 deletions
diff --git a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts index ab6220456513..1cc0f571e1f7 100644 --- a/arch/arm64/boot/dts/qcom/sdm845-db845c.dts +++ b/arch/arm64/boot/dts/qcom/sdm845-db845c.dts @@ -31,7 +31,7 @@ }; /* Fixed crystal oscillator dedicated to MCP2517FD */ - clk40M: can-clock { + clk40m: can-clock { compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <40000000>; @@ -195,6 +195,12 @@ gpio = <&tlmm 90 GPIO_ACTIVE_HIGH>; enable-active-high; + /* + * FIXME: this regulator is responsible for VBUS on the left USB + * port. Keep it always on until we can correctly model this + * relationship. + */ + regulator-always-on; pinctrl-names = "default"; pinctrl-0 = <&pcie0_pwren_state>; @@ -580,7 +586,7 @@ &pcie0 { status = "okay"; perst-gpios = <&tlmm 35 GPIO_ACTIVE_LOW>; - enable-gpio = <&tlmm 134 GPIO_ACTIVE_HIGH>; + wake-gpios = <&tlmm 134 GPIO_ACTIVE_HIGH>; vddpe-3v3-supply = <&pcie0_3p3v_dual>; @@ -857,7 +863,7 @@ can@0 { compatible = "microchip,mcp2517fd"; reg = <0>; - clocks = <&clk40M>; + clocks = <&clk40m>; interrupts-extended = <&tlmm 104 IRQ_TYPE_LEVEL_LOW>; spi-max-frequency = <10000000>; vdd-supply = <&vdc_5v>; |