diff options
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a774c0.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 300 |
1 files changed, 171 insertions, 129 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi index c7bdc3606323..eed94ffed7c1 100644 --- a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi @@ -44,22 +44,19 @@ clock-frequency = <0>; }; - cluster1_opp: opp_table10 { + cluster1_opp: opp-table-1 { compatible = "operating-points-v2"; opp-shared; opp-800000000 { opp-hz = /bits/ 64 <800000000>; - opp-microvolt = <820000>; clock-latency-ns = <300000>; }; opp-1000000000 { opp-hz = /bits/ 64 <1000000000>; - opp-microvolt = <820000>; clock-latency-ns = <300000>; }; opp-1200000000 { opp-hz = /bits/ 64 <1200000000>; - opp-microvolt = <820000>; clock-latency-ns = <300000>; opp-suspend; }; @@ -145,6 +142,7 @@ compatible = "renesas,r8a774c0-wdt", "renesas,rcar-gen3-wdt"; reg = <0 0xe6020000 0 0x0c>; + interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 402>; power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; resets = <&cpg 402>; @@ -256,7 +254,7 @@ resets = <&cpg 906>; }; - pfc: pin-controller@e6060000 { + pfc: pinctrl@e6060000 { compatible = "renesas,pfc-r8a774c0"; reg = <0 0xe6060000 0 0x508>; }; @@ -369,12 +367,12 @@ #interrupt-cells = <2>; interrupt-controller; reg = <0 0xe61c0000 0 0x200>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 407>; power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; resets = <&cpg 407>; @@ -574,11 +572,13 @@ status = "disabled"; }; - i2c_dvfs: i2c@e60b0000 { + iic_pmic: i2c@e60b0000 { #address-cells = <1>; #size-cells = <0>; - compatible = "renesas,iic-r8a774c0"; - reg = <0 0xe60b0000 0 0x15>; + compatible = "renesas,iic-r8a774c0", + "renesas,rcar-gen3-iic", + "renesas,rmobile-iic"; + reg = <0 0xe60b0000 0 0x425>; interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 926>; power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; @@ -697,8 +697,8 @@ compatible = "renesas,r8a774c0-usb-dmac", "renesas,usb-dmac"; reg = <0 0xe65a0000 0 0x100>; - interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1"; clocks = <&cpg CPG_MOD 330>; power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; @@ -711,8 +711,8 @@ compatible = "renesas,r8a774c0-usb-dmac", "renesas,usb-dmac"; reg = <0 0xe65b0000 0 0x100>; - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1"; clocks = <&cpg CPG_MOD 331>; power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; @@ -725,23 +725,23 @@ compatible = "renesas,dmac-r8a774c0", "renesas,rcar-dmac"; reg = <0 0xe6700000 0 0x10000>; - interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -767,23 +767,23 @@ compatible = "renesas,dmac-r8a774c0", "renesas,rcar-dmac"; reg = <0 0xe7300000 0 0x10000>; - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -809,23 +809,23 @@ compatible = "renesas,dmac-r8a774c0", "renesas,rcar-dmac"; reg = <0 0xe7310000 0 0x10000>; - interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -847,7 +847,7 @@ <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; }; - ipmmu_ds0: mmu@e6740000 { + ipmmu_ds0: iommu@e6740000 { compatible = "renesas,ipmmu-r8a774c0"; reg = <0 0xe6740000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 0>; @@ -855,7 +855,7 @@ #iommu-cells = <1>; }; - ipmmu_ds1: mmu@e7740000 { + ipmmu_ds1: iommu@e7740000 { compatible = "renesas,ipmmu-r8a774c0"; reg = <0 0xe7740000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 1>; @@ -863,7 +863,7 @@ #iommu-cells = <1>; }; - ipmmu_hc: mmu@e6570000 { + ipmmu_hc: iommu@e6570000 { compatible = "renesas,ipmmu-r8a774c0"; reg = <0 0xe6570000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 2>; @@ -871,7 +871,7 @@ #iommu-cells = <1>; }; - ipmmu_mm: mmu@e67b0000 { + ipmmu_mm: iommu@e67b0000 { compatible = "renesas,ipmmu-r8a774c0"; reg = <0 0xe67b0000 0 0x1000>; interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, @@ -880,7 +880,7 @@ #iommu-cells = <1>; }; - ipmmu_mp: mmu@ec670000 { + ipmmu_mp: iommu@ec670000 { compatible = "renesas,ipmmu-r8a774c0"; reg = <0 0xec670000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 4>; @@ -888,7 +888,7 @@ #iommu-cells = <1>; }; - ipmmu_pv0: mmu@fd800000 { + ipmmu_pv0: iommu@fd800000 { compatible = "renesas,ipmmu-r8a774c0"; reg = <0 0xfd800000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 6>; @@ -896,7 +896,7 @@ #iommu-cells = <1>; }; - ipmmu_vc0: mmu@fe6b0000 { + ipmmu_vc0: iommu@fe6b0000 { compatible = "renesas,ipmmu-r8a774c0"; reg = <0 0xfe6b0000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 12>; @@ -904,7 +904,7 @@ #iommu-cells = <1>; }; - ipmmu_vi0: mmu@febd0000 { + ipmmu_vi0: iommu@febd0000 { compatible = "renesas,ipmmu-r8a774c0"; reg = <0 0xfebd0000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 14>; @@ -912,7 +912,7 @@ #iommu-cells = <1>; }; - ipmmu_vp0: mmu@fe990000 { + ipmmu_vp0: iommu@fe990000 { compatible = "renesas,ipmmu-r8a774c0"; reg = <0 0xfe990000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 16>; @@ -957,9 +957,11 @@ "ch20", "ch21", "ch22", "ch23", "ch24"; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; resets = <&cpg 812>; phy-mode = "rgmii"; + rx-internal-delay-ps = <0>; iommus = <&ipmmu_ds0 16>; #address-cells = <1>; #size-cells = <0>; @@ -1004,6 +1006,7 @@ reg = <0 0xe66c0000 0 0x8000>; interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "ch_int", "g_int"; clocks = <&cpg CPG_MOD 914>, <&cpg CPG_CORE R8A774C0_CLK_CANFD>, <&can_clk>; @@ -1214,9 +1217,8 @@ reg = <0 0xe6ea0000 0 0x0064>; interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 210>; - dmas = <&dmac1 0x43>, <&dmac1 0x42>, - <&dmac2 0x43>, <&dmac2 0x42>; - dma-names = "tx", "rx", "tx", "rx"; + dmas = <&dmac0 0x43>, <&dmac0 0x42>; + dma-names = "tx", "rx"; power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; resets = <&cpg 210>; #address-cells = <1>; @@ -1276,7 +1278,7 @@ vin4csi40: endpoint@2 { reg = <2>; - remote-endpoint= <&csi40vin4>; + remote-endpoint = <&csi40vin4>; }; }; }; @@ -1304,7 +1306,7 @@ vin5csi40: endpoint@2 { reg = <2>; - remote-endpoint= <&csi40vin5>; + remote-endpoint = <&csi40vin5>; }; }; }; @@ -1312,7 +1314,7 @@ rcar_sound: sound@ec500000 { /* - * #sound-dai-cells is required + * #sound-dai-cells is required if simple-card * * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; @@ -1325,11 +1327,11 @@ */ compatible = "renesas,rcar_sound-r8a774c0", "renesas,rcar_sound-gen3"; - reg = <0 0xec500000 0 0x1000>, /* SCU */ - <0 0xec5a0000 0 0x100>, /* ADG */ - <0 0xec540000 0 0x1000>, /* SSIU */ - <0 0xec541000 0 0x280>, /* SSI */ - <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ + reg = <0 0xec500000 0 0x1000>, /* SCU */ + <0 0xec5a0000 0 0x100>, /* ADG */ + <0 0xec540000 0 0x1000>, /* SSIU */ + <0 0xec541000 0 0x280>, /* SSI */ + <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; clocks = <&cpg CPG_MOD 1005>, @@ -1348,7 +1350,7 @@ <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, - <&cpg CPG_CORE R8A774C0_CLK_ZA2>; + <&cpg CPG_MOD 922>; clock-names = "ssi-all", "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5", "ssi.4", "ssi.3", "ssi.2", @@ -1521,23 +1523,23 @@ compatible = "renesas,dmac-r8a774c0", "renesas,rcar-dmac"; reg = <0 0xec700000 0 0x10000>; - interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -1618,42 +1620,61 @@ status = "disabled"; }; - sdhi0: sd@ee100000 { + sdhi0: mmc@ee100000 { compatible = "renesas,sdhi-r8a774c0", "renesas,rcar-gen3-sdhi"; reg = <0 0xee100000 0 0x2000>; interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 314>; + clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A774C0_CLK_SD0H>; + clock-names = "core", "clkh"; max-frequency = <200000000>; power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; resets = <&cpg 314>; status = "disabled"; }; - sdhi1: sd@ee120000 { + sdhi1: mmc@ee120000 { compatible = "renesas,sdhi-r8a774c0", "renesas,rcar-gen3-sdhi"; reg = <0 0xee120000 0 0x2000>; interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 313>; + clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A774C0_CLK_SD1H>; + clock-names = "core", "clkh"; max-frequency = <200000000>; power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; resets = <&cpg 313>; status = "disabled"; }; - sdhi3: sd@ee160000 { + sdhi3: mmc@ee160000 { compatible = "renesas,sdhi-r8a774c0", "renesas,rcar-gen3-sdhi"; reg = <0 0xee160000 0 0x2000>; interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 311>; + clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A774C0_CLK_SD3H>; + clock-names = "core", "clkh"; max-frequency = <200000000>; power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; resets = <&cpg 311>; status = "disabled"; }; + rpc: spi@ee200000 { + compatible = "renesas,r8a774c0-rpc-if", + "renesas,rcar-gen3-rpc-if"; + reg = <0 0xee200000 0 0x200>, + <0 0x08000000 0 0x4000000>, + <0 0xee208000 0 0x100>; + reg-names = "regs", "dirmap", "wbuf"; + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 917>; + power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; + resets = <&cpg 917>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + gic: interrupt-controller@f1010000 { compatible = "arm,gic-400"; #interrupt-cells = <3>; @@ -1679,12 +1700,12 @@ #size-cells = <2>; bus-range = <0x00 0xff>; device_type = "pci"; - ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 - 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 - 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 - 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; - /* Map all possible DDR as inbound ranges */ - dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; + ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, + <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, + <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, + <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; + /* Map all possible DDR/IOMMU as inbound ranges */ + dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; @@ -1695,6 +1716,27 @@ clock-names = "pcie", "pcie_bus"; power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; resets = <&cpg 319>; + iommu-map = <0 &ipmmu_hc 0 1>; + iommu-map-mask = <0>; + status = "disabled"; + }; + + pciec0_ep: pcie-ep@fe000000 { + compatible = "renesas,r8a774c0-pcie-ep", + "renesas,rcar-gen3-pcie-ep"; + reg = <0x0 0xfe000000 0 0x80000>, + <0x0 0xfe100000 0 0x100000>, + <0x0 0xfe200000 0 0x200000>, + <0x0 0x30000000 0 0x8000000>, + <0x0 0x38000000 0 0x8000000>; + reg-names = "apb-base", "memory0", "memory1", "memory2", "memory3"; + interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 319>; + clock-names = "pcie"; + resets = <&cpg 319>; + power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; status = "disabled"; }; @@ -1787,6 +1829,10 @@ #address-cells = <1>; #size-cells = <0>; + port@0 { + reg = <0>; + }; + port@1 { #address-cells = <1>; #size-cells = <0>; @@ -1810,10 +1856,12 @@ reg = <0 0xfeb00000 0 0x40000>; interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 724>, - <&cpg CPG_MOD 723>; + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; clock-names = "du.0", "du.1"; - vsps = <&vspd0 0>, <&vspd1 0>; + resets = <&cpg 724>; + reset-names = "du.0"; + renesas,vsps = <&vspd0 0>, <&vspd1 0>; + status = "disabled"; ports { @@ -1822,8 +1870,6 @@ port@0 { reg = <0>; - du_out_rgb: endpoint { - }; }; port@1 { @@ -1865,8 +1911,6 @@ port@1 { reg = <1>; - lvds0_out: endpoint { - }; }; }; }; @@ -1892,8 +1936,6 @@ port@1 { reg = <1>; - lvds1_out: endpoint { - }; }; }; }; @@ -1908,7 +1950,7 @@ cpu-thermal { polling-delay-passive = <250>; polling-delay = <0>; - thermal-sensors = <&thermal 0>; + thermal-sensors = <&thermal>; sustainable-power = <717>; cooling-maps { |