diff options
Diffstat (limited to 'arch/arm64/boot/dts/renesas/r8a77990.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/renesas/r8a77990.dtsi | 516 |
1 files changed, 373 insertions, 143 deletions
diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi index 67a6824a962c..8c2b28342387 100644 --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi @@ -14,17 +14,6 @@ #address-cells = <2>; #size-cells = <2>; - aliases { - i2c0 = &i2c0; - i2c1 = &i2c1; - i2c2 = &i2c2; - i2c3 = &i2c3; - i2c4 = &i2c4; - i2c5 = &i2c5; - i2c6 = &i2c6; - i2c7 = &i2c7; - }; - /* * The external audio clocks are configured as 0 Hz fixed frequency * clocks by default. @@ -55,22 +44,19 @@ clock-frequency = <0>; }; - cluster1_opp: opp_table10 { + cluster1_opp: opp-table-1 { compatible = "operating-points-v2"; opp-shared; opp-800000000 { opp-hz = /bits/ 64 <800000000>; - opp-microvolt = <820000>; clock-latency-ns = <300000>; }; opp-1000000000 { opp-hz = /bits/ 64 <1000000000>; - opp-microvolt = <820000>; clock-latency-ns = <300000>; }; opp-1200000000 { opp-hz = /bits/ 64 <1200000000>; - opp-microvolt = <820000>; clock-latency-ns = <300000>; opp-suspend; }; @@ -88,8 +74,9 @@ power-domains = <&sysc R8A77990_PD_CA53_CPU0>; next-level-cache = <&L2_CA53>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0>; dynamic-power-coefficient = <277>; - clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>; + clocks = <&cpg CPG_CORE R8A77990_CLK_Z2>; operating-points-v2 = <&cluster1_opp>; }; @@ -100,7 +87,8 @@ power-domains = <&sysc R8A77990_PD_CA53_CPU1>; next-level-cache = <&L2_CA53>; enable-method = "psci"; - clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>; + cpu-idle-states = <&CPU_SLEEP_0>; + clocks = <&cpg CPG_CORE R8A77990_CLK_Z2>; operating-points-v2 = <&cluster1_opp>; }; @@ -110,6 +98,19 @@ cache-unified; cache-level = <2>; }; + + idle-states { + entry-method = "psci"; + + CPU_SLEEP_0: cpu-sleep-0 { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x0010000>; + local-timer-stop; + entry-latency-us = <700>; + exit-latency-us = <700>; + min-residency-us = <5000>; + }; + }; }; extal_clk: extal { @@ -156,6 +157,7 @@ compatible = "renesas,r8a77990-wdt", "renesas,rcar-gen3-wdt"; reg = <0 0xe6020000 0 0x0c>; + interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 402>; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; resets = <&cpg 402>; @@ -267,7 +269,7 @@ resets = <&cpg 906>; }; - pfc: pin-controller@e6060000 { + pfc: pinctrl@e6060000 { compatible = "renesas,pfc-r8a77990"; reg = <0 0xe6060000 0 0x508>; }; @@ -275,8 +277,10 @@ i2c_dvfs: i2c@e60b0000 { #address-cells = <1>; #size-cells = <0>; - compatible = "renesas,iic-r8a77990"; - reg = <0 0xe60b0000 0 0x15>; + compatible = "renesas,iic-r8a77990", + "renesas,rcar-gen3-iic", + "renesas,rmobile-iic"; + reg = <0 0xe60b0000 0 0x425>; interrupts = <GIC_SPI 173 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 926>; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; @@ -394,17 +398,82 @@ #interrupt-cells = <2>; interrupt-controller; reg = <0 0xe61c0000 0 0x200>; - interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 407>; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; resets = <&cpg 407>; }; + tmu0: timer@e61e0000 { + compatible = "renesas,tmu-r8a77990", "renesas,tmu"; + reg = <0 0xe61e0000 0 0x30>; + interrupts = <GIC_SPI 136 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 125>; + clock-names = "fck"; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 125>; + status = "disabled"; + }; + + tmu1: timer@e6fc0000 { + compatible = "renesas,tmu-r8a77990", "renesas,tmu"; + reg = <0 0xe6fc0000 0 0x30>; + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 129 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 124>; + clock-names = "fck"; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 124>; + status = "disabled"; + }; + + tmu2: timer@e6fd0000 { + compatible = "renesas,tmu-r8a77990", "renesas,tmu"; + reg = <0 0xe6fd0000 0 0x30>; + interrupts = <GIC_SPI 303 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 304 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 305 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 123>; + clock-names = "fck"; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 123>; + status = "disabled"; + }; + + tmu3: timer@e6fe0000 { + compatible = "renesas,tmu-r8a77990", "renesas,tmu"; + reg = <0 0xe6fe0000 0 0x30>; + interrupts = <GIC_SPI 131 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 132 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 133 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 122>; + clock-names = "fck"; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 122>; + status = "disabled"; + }; + + tmu4: timer@ffc00000 { + compatible = "renesas,tmu-r8a77990", "renesas,tmu"; + reg = <0 0xffc00000 0 0x30>; + interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 407 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 408 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 121>; + clock-names = "fck"; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 121>; + status = "disabled"; + }; + i2c0: i2c@e6500000 { #address-cells = <1>; #size-cells = <0>; @@ -643,8 +712,8 @@ compatible = "renesas,r8a77990-usb-dmac", "renesas,usb-dmac"; reg = <0 0xe65a0000 0 0x100>; - interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1"; clocks = <&cpg CPG_MOD 330>; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; @@ -657,8 +726,8 @@ compatible = "renesas,r8a77990-usb-dmac", "renesas,usb-dmac"; reg = <0 0xe65b0000 0 0x100>; - interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "ch0", "ch1"; clocks = <&cpg CPG_MOD 331>; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; @@ -667,27 +736,36 @@ dma-channels = <2>; }; + arm_cc630p: crypto@e6601000 { + compatible = "arm,cryptocell-630p-ree"; + interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>; + reg = <0x0 0xe6601000 0 0x1000>; + clocks = <&cpg CPG_MOD 229>; + resets = <&cpg 229>; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + }; + dmac0: dma-controller@e6700000 { compatible = "renesas,dmac-r8a77990", "renesas,rcar-dmac"; reg = <0 0xe6700000 0 0x10000>; - interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -713,23 +791,23 @@ compatible = "renesas,dmac-r8a77990", "renesas,rcar-dmac"; reg = <0 0xe7300000 0 0x10000>; - interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -755,23 +833,23 @@ compatible = "renesas,dmac-r8a77990", "renesas,rcar-dmac"; reg = <0 0xe7310000 0 0x10000>; - interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -793,7 +871,7 @@ <&ipmmu_ds1 30>, <&ipmmu_ds1 31>; }; - ipmmu_ds0: mmu@e6740000 { + ipmmu_ds0: iommu@e6740000 { compatible = "renesas,ipmmu-r8a77990"; reg = <0 0xe6740000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 0>; @@ -801,7 +879,7 @@ #iommu-cells = <1>; }; - ipmmu_ds1: mmu@e7740000 { + ipmmu_ds1: iommu@e7740000 { compatible = "renesas,ipmmu-r8a77990"; reg = <0 0xe7740000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 1>; @@ -809,7 +887,7 @@ #iommu-cells = <1>; }; - ipmmu_hc: mmu@e6570000 { + ipmmu_hc: iommu@e6570000 { compatible = "renesas,ipmmu-r8a77990"; reg = <0 0xe6570000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 2>; @@ -817,7 +895,7 @@ #iommu-cells = <1>; }; - ipmmu_mm: mmu@e67b0000 { + ipmmu_mm: iommu@e67b0000 { compatible = "renesas,ipmmu-r8a77990"; reg = <0 0xe67b0000 0 0x1000>; interrupts = <GIC_SPI 196 IRQ_TYPE_LEVEL_HIGH>, @@ -826,7 +904,7 @@ #iommu-cells = <1>; }; - ipmmu_mp: mmu@ec670000 { + ipmmu_mp: iommu@ec670000 { compatible = "renesas,ipmmu-r8a77990"; reg = <0 0xec670000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 4>; @@ -834,7 +912,7 @@ #iommu-cells = <1>; }; - ipmmu_pv0: mmu@fd800000 { + ipmmu_pv0: iommu@fd800000 { compatible = "renesas,ipmmu-r8a77990"; reg = <0 0xfd800000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 6>; @@ -842,7 +920,7 @@ #iommu-cells = <1>; }; - ipmmu_rt: mmu@ffc80000 { + ipmmu_rt: iommu@ffc80000 { compatible = "renesas,ipmmu-r8a77990"; reg = <0 0xffc80000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 10>; @@ -850,7 +928,7 @@ #iommu-cells = <1>; }; - ipmmu_vc0: mmu@fe6b0000 { + ipmmu_vc0: iommu@fe6b0000 { compatible = "renesas,ipmmu-r8a77990"; reg = <0 0xfe6b0000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 12>; @@ -858,7 +936,7 @@ #iommu-cells = <1>; }; - ipmmu_vi0: mmu@febd0000 { + ipmmu_vi0: iommu@febd0000 { compatible = "renesas,ipmmu-r8a77990"; reg = <0 0xfebd0000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 14>; @@ -866,7 +944,7 @@ #iommu-cells = <1>; }; - ipmmu_vp0: mmu@fe990000 { + ipmmu_vp0: iommu@fe990000 { compatible = "renesas,ipmmu-r8a77990"; reg = <0 0xfe990000 0 0x1000>; renesas,ipmmu-main = <&ipmmu_mm 16>; @@ -911,9 +989,11 @@ "ch20", "ch21", "ch22", "ch23", "ch24"; clocks = <&cpg CPG_MOD 812>; + clock-names = "fck"; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; resets = <&cpg 812>; phy-mode = "rgmii"; + rx-internal-delay-ps = <0>; iommus = <&ipmmu_ds0 16>; #address-cells = <1>; #size-cells = <0>; @@ -958,6 +1038,7 @@ reg = <0 0xe66c0000 0 0x8000>; interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "ch_int", "g_int"; clocks = <&cpg CPG_MOD 914>, <&cpg CPG_CORE R8A77990_CLK_CANFD>, <&can_clk>; @@ -1168,9 +1249,8 @@ reg = <0 0xe6ea0000 0 0x0064>; interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cpg CPG_MOD 210>; - dmas = <&dmac1 0x43>, <&dmac1 0x42>, - <&dmac2 0x43>, <&dmac2 0x42>; - dma-names = "tx", "rx", "tx", "rx"; + dmas = <&dmac0 0x43>, <&dmac0 0x42>; + dma-names = "tx", "rx"; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; resets = <&cpg 210>; #address-cells = <1>; @@ -1230,7 +1310,7 @@ vin4csi40: endpoint@2 { reg = <2>; - remote-endpoint= <&csi40vin4>; + remote-endpoint = <&csi40vin4>; }; }; }; @@ -1258,15 +1338,135 @@ vin5csi40: endpoint@2 { reg = <2>; - remote-endpoint= <&csi40vin5>; + remote-endpoint = <&csi40vin5>; }; }; }; }; + drif00: rif@e6f40000 { + compatible = "renesas,r8a77990-drif", + "renesas,rcar-gen3-drif"; + reg = <0 0xe6f40000 0 0x84>; + interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 515>; + clock-names = "fck"; + dmas = <&dmac1 0x20>, <&dmac2 0x20>; + dma-names = "rx", "rx"; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 515>; + renesas,bonding = <&drif01>; + status = "disabled"; + }; + + drif01: rif@e6f50000 { + compatible = "renesas,r8a77990-drif", + "renesas,rcar-gen3-drif"; + reg = <0 0xe6f50000 0 0x84>; + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 514>; + clock-names = "fck"; + dmas = <&dmac1 0x22>, <&dmac2 0x22>; + dma-names = "rx", "rx"; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 514>; + renesas,bonding = <&drif00>; + status = "disabled"; + }; + + drif10: rif@e6f60000 { + compatible = "renesas,r8a77990-drif", + "renesas,rcar-gen3-drif"; + reg = <0 0xe6f60000 0 0x84>; + interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 513>; + clock-names = "fck"; + dmas = <&dmac1 0x24>, <&dmac2 0x24>; + dma-names = "rx", "rx"; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 513>; + renesas,bonding = <&drif11>; + status = "disabled"; + }; + + drif11: rif@e6f70000 { + compatible = "renesas,r8a77990-drif", + "renesas,rcar-gen3-drif"; + reg = <0 0xe6f70000 0 0x84>; + interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 512>; + clock-names = "fck"; + dmas = <&dmac1 0x26>, <&dmac2 0x26>; + dma-names = "rx", "rx"; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 512>; + renesas,bonding = <&drif10>; + status = "disabled"; + }; + + drif20: rif@e6f80000 { + compatible = "renesas,r8a77990-drif", + "renesas,rcar-gen3-drif"; + reg = <0 0xe6f80000 0 0x84>; + interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 511>; + clock-names = "fck"; + dmas = <&dmac0 0x28>; + dma-names = "rx"; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 511>; + renesas,bonding = <&drif21>; + status = "disabled"; + }; + + drif21: rif@e6f90000 { + compatible = "renesas,r8a77990-drif", + "renesas,rcar-gen3-drif"; + reg = <0 0xe6f90000 0 0x84>; + interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 510>; + clock-names = "fck"; + dmas = <&dmac0 0x2a>; + dma-names = "rx"; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 510>; + renesas,bonding = <&drif20>; + status = "disabled"; + }; + + drif30: rif@e6fa0000 { + compatible = "renesas,r8a77990-drif", + "renesas,rcar-gen3-drif"; + reg = <0 0xe6fa0000 0 0x84>; + interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 509>; + clock-names = "fck"; + dmas = <&dmac0 0x2c>; + dma-names = "rx"; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 509>; + renesas,bonding = <&drif31>; + status = "disabled"; + }; + + drif31: rif@e6fb0000 { + compatible = "renesas,r8a77990-drif", + "renesas,rcar-gen3-drif"; + reg = <0 0xe6fb0000 0 0x84>; + interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 508>; + clock-names = "fck"; + dmas = <&dmac0 0x2e>; + dma-names = "rx"; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 508>; + renesas,bonding = <&drif30>; + status = "disabled"; + }; + rcar_sound: sound@ec500000 { /* - * #sound-dai-cells is required + * #sound-dai-cells is required if simple-card * * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>; * Multi DAI : #sound-dai-cells = <1>; <&rcar_sound N>; @@ -1277,12 +1477,12 @@ * clkout : #clock-cells = <0>; <&rcar_sound>; * clkout0/1/2/3: #clock-cells = <1>; <&rcar_sound N>; */ - compatible = "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3"; - reg = <0 0xec500000 0 0x1000>, /* SCU */ - <0 0xec5a0000 0 0x100>, /* ADG */ - <0 0xec540000 0 0x1000>, /* SSIU */ - <0 0xec541000 0 0x280>, /* SSI */ - <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ + compatible = "renesas,rcar_sound-r8a77990", "renesas,rcar_sound-gen3"; + reg = <0 0xec500000 0 0x1000>, /* SCU */ + <0 0xec5a0000 0 0x100>, /* ADG */ + <0 0xec540000 0 0x1000>, /* SSIU */ + <0 0xec541000 0 0x280>, /* SSI */ + <0 0xec760000 0 0x200>; /* Audio DMAC peri peri*/ reg-names = "scu", "adg", "ssiu", "ssi", "audmapp"; clocks = <&cpg CPG_MOD 1005>, @@ -1301,7 +1501,7 @@ <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>, <&audio_clk_a>, <&audio_clk_b>, <&audio_clk_c>, - <&cpg CPG_CORE R8A77990_CLK_ZA2>; + <&cpg CPG_MOD 922>; clock-names = "ssi-all", "ssi.9", "ssi.8", "ssi.7", "ssi.6", "ssi.5", "ssi.4", "ssi.3", "ssi.2", @@ -1470,27 +1670,39 @@ }; }; + mlp: mlp@ec520000 { + compatible = "renesas,r8a77990-mlp", + "renesas,rcar-gen3-mlp"; + reg = <0 0xec520000 0 0x800>; + interrupts = <GIC_SPI 384 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 385 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 802>; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 802>; + status = "disabled"; + }; + audma0: dma-controller@ec700000 { compatible = "renesas,dmac-r8a77990", "renesas,rcar-dmac"; reg = <0 0xec700000 0 0x10000>; - interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH - GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>; interrupt-names = "error", "ch0", "ch1", "ch2", "ch3", "ch4", "ch5", "ch6", "ch7", @@ -1571,12 +1783,13 @@ status = "disabled"; }; - sdhi0: sd@ee100000 { + sdhi0: mmc@ee100000 { compatible = "renesas,sdhi-r8a77990", "renesas,rcar-gen3-sdhi"; reg = <0 0xee100000 0 0x2000>; interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 314>; + clocks = <&cpg CPG_MOD 314>, <&cpg CPG_CORE R8A77990_CLK_SD0H>; + clock-names = "core", "clkh"; max-frequency = <200000000>; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; resets = <&cpg 314>; @@ -1584,12 +1797,13 @@ status = "disabled"; }; - sdhi1: sd@ee120000 { + sdhi1: mmc@ee120000 { compatible = "renesas,sdhi-r8a77990", "renesas,rcar-gen3-sdhi"; reg = <0 0xee120000 0 0x2000>; interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 313>; + clocks = <&cpg CPG_MOD 313>, <&cpg CPG_CORE R8A77990_CLK_SD1H>; + clock-names = "core", "clkh"; max-frequency = <200000000>; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; resets = <&cpg 313>; @@ -1597,12 +1811,13 @@ status = "disabled"; }; - sdhi3: sd@ee160000 { + sdhi3: mmc@ee160000 { compatible = "renesas,sdhi-r8a77990", "renesas,rcar-gen3-sdhi"; reg = <0 0xee160000 0 0x2000>; interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 311>; + clocks = <&cpg CPG_MOD 311>, <&cpg CPG_CORE R8A77990_CLK_SD3H>; + clock-names = "core", "clkh"; max-frequency = <200000000>; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; resets = <&cpg 311>; @@ -1610,6 +1825,22 @@ status = "disabled"; }; + rpc: spi@ee200000 { + compatible = "renesas,r8a77990-rpc-if", + "renesas,rcar-gen3-rpc-if"; + reg = <0 0xee200000 0 0x200>, + <0 0x08000000 0 0x04000000>, + <0 0xee208000 0 0x100>; + reg-names = "regs", "dirmap", "wbuf"; + interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 917>; + power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; + resets = <&cpg 917>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + gic: interrupt-controller@f1010000 { compatible = "arm,gic-400"; #interrupt-cells = <3>; @@ -1635,12 +1866,12 @@ #size-cells = <2>; bus-range = <0x00 0xff>; device_type = "pci"; - ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000 - 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000 - 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000 - 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; - /* Map all possible DDR as inbound ranges */ - dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>; + ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000>, + <0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000>, + <0x02000000 0 0x30000000 0 0x30000000 0 0x08000000>, + <0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>; + /* Map all possible DDR/IOMMU as inbound ranges */ + dma-ranges = <0x42000000 0 0x00000000 0 0x00000000 1 0x00000000>; interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; @@ -1651,6 +1882,8 @@ clock-names = "pcie", "pcie_bus"; power-domains = <&sysc R8A77990_PD_ALWAYS_ON>; resets = <&cpg 319>; + iommu-map = <0 &ipmmu_hc 0 1>; + iommu-map-mask = <0>; status = "disabled"; }; @@ -1761,6 +1994,10 @@ #address-cells = <1>; #size-cells = <0>; + port@0 { + reg = <0>; + }; + port@1 { #address-cells = <1>; #size-cells = <0>; @@ -1784,14 +2021,13 @@ reg = <0 0xfeb00000 0 0x40000>; interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&cpg CPG_MOD 724>, - <&cpg CPG_MOD 723>; + clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>; clock-names = "du.0", "du.1"; resets = <&cpg 724>; reset-names = "du.0"; renesas,cmms = <&cmm0>, <&cmm1>; - vsps = <&vspd0 0>, <&vspd1 0>; + renesas,vsps = <&vspd0 0>, <&vspd1 0>; status = "disabled"; @@ -1801,8 +2037,6 @@ port@0 { reg = <0>; - du_out_rgb: endpoint { - }; }; port@1 { @@ -1844,8 +2078,6 @@ port@1 { reg = <1>; - lvds0_out: endpoint { - }; }; }; }; @@ -1871,8 +2103,6 @@ port@1 { reg = <1>; - lvds1_out: endpoint { - }; }; }; }; @@ -1887,7 +2117,7 @@ cpu-thermal { polling-delay-passive = <250>; polling-delay = <0>; - thermal-sensors = <&thermal 0>; + thermal-sensors = <&thermal>; sustainable-power = <717>; cooling-maps { |