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Diffstat (limited to 'arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi')
-rw-r--r--arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi14
1 files changed, 13 insertions, 1 deletions
diff --git a/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi b/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi
index 6818fd49b2be..83fce96a2575 100644
--- a/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi
+++ b/arch/arm64/boot/dts/renesas/rzg2lc-smarc.dtsi
@@ -11,7 +11,6 @@
#include "rzg2lc-smarc-pinfunction.dtsi"
#include "rz-smarc-common.dtsi"
-
/ {
aliases {
serial1 = &scif1;
@@ -129,6 +128,19 @@
};
};
+#if PMOD_MTU3
+&mtu3 {
+ pinctrl-0 = <&mtu3_pins>;
+ pinctrl-names = "default";
+
+ status = "okay";
+};
+
+&spi1 {
+ status = "disabled";
+};
+#endif
+
/*
* To enable SCIF1 (SER0) on PMOD1 (CN7), On connector board
* SW1 should be at position 2->3 so that SER0_CTS# line is activated