diff options
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi | 52 |
1 files changed, 43 insertions, 9 deletions
diff --git a/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi b/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi index 12397755830b..e80412abec08 100644 --- a/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi +++ b/arch/arm64/boot/dts/rockchip/px30-ringneck.dtsi @@ -9,12 +9,19 @@ / { aliases { + i2c10 = &i2c10; mmc0 = &emmc; mmc1 = &sdio; rtc0 = &rtc_twi; rtc1 = &rk809; }; + /* allows userspace to control the gate of the ATtiny UPDI pass FET via sysfs */ + attiny-updi-gate-regulator { + compatible = "regulator-output"; + vout-supply = <&vg_attiny_updi>; + }; + emmc_pwrseq: emmc-pwrseq { compatible = "mmc-pwrseq-emmc"; pinctrl-0 = <&emmc_reset>; @@ -36,7 +43,7 @@ }; }; - vcc5v0_sys: vccsys-regulator { + vcc5v0_sys: regulator-vccsys { compatible = "regulator-fixed"; regulator-name = "vcc5v0_sys"; regulator-always-on; @@ -66,7 +73,6 @@ bus-width = <8>; cap-mmc-highspeed; mmc-hs200-1_8v; - supports-emmc; mmc-pwrseq = <&emmc_pwrseq>; non-removable; vmmc-supply = <&vcc_3v3>; @@ -127,7 +133,7 @@ pinctrl-names = "default"; #clock-cells = <0>; clock-output-names = "xin32k"; - rockchip,system-power-controller; + system-power-controller; wakeup-source; vcc1-supply = <&vcc5v0_sys>; @@ -281,6 +287,11 @@ regulator-suspend-microvolt = <1800000>; }; }; + + /* supplies the gate of the ATtiny UPDI pass FET */ + vg_attiny_updi: SWITCH_REG1 { + regulator-name = "vg_attiny_updi"; + }; }; }; }; @@ -292,14 +303,25 @@ clock-frequency = <400000>; fan: fan@18 { - compatible = "ti,amc6821"; + compatible = "tsd,mule", "ti,amc6821"; reg = <0x18>; - #cooling-cells = <2>; - }; - rtc_twi: rtc@6f { - compatible = "isil,isl1208"; - reg = <0x6f>; + i2c-mux { + compatible = "tsd,mule-i2c-mux"; + #address-cells = <1>; + #size-cells = <0>; + + i2c10: i2c@0 { + reg = <0x0>; + #address-cells = <1>; + #size-cells = <0>; + + rtc_twi: rtc@6f { + compatible = "isil,isl1208"; + reg = <0x6f>; + }; + }; + }; }; }; @@ -347,6 +369,12 @@ }; }; +&pmu_io_domains { + pmuio1-supply = <&vcc_3v3>; + pmuio2-supply = <&vcc_3v3>; + status = "okay"; +}; + &saradc { vref-supply = <&vcc_1v8>; status = "okay"; @@ -368,6 +396,12 @@ status = "okay"; }; +&uart5 { + /delete-property/ dmas; + /delete-property/ dma-names; + pinctrl-0 = <&uart5_xfer>; +}; + /* Mule UCAN */ &usb_host0_ehci { status = "okay"; |