diff options
Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dtsi | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dtsi b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dtsi new file mode 100644 index 000000000000..3b0457de2a98 --- /dev/null +++ b/arch/arm64/boot/dts/rockchip/rk3328-nanopi-r2c.dtsi @@ -0,0 +1,35 @@ +// SPDX-License-Identifier: GPL-2.0-or-later OR MIT +/* + * Copyright (c) 2021 FriendlyElec Computer Tech. Co., Ltd. + * (http://www.friendlyarm.com) + * + * Copyright (c) 2021-2023 Tianling Shen <cnsztl@gmail.com> + */ + +/dts-v1/; + +#include "rk3328-nanopi-r2.dtsi" + +&gmac2io { + phy-handle = <&yt8521s>; + tx_delay = <0x22>; + rx_delay = <0x12>; + status = "okay"; + + mdio { + yt8521s: ethernet-phy@3 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <3>; + + motorcomm,clk-out-frequency-hz = <125000000>; + motorcomm,keep-pll-enabled; + motorcomm,auto-sleep-disabled; + + pinctrl-0 = <ð_phy_reset_pin>; + pinctrl-names = "default"; + reset-assert-us = <10000>; + reset-deassert-us = <50000>; + reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; + }; + }; +}; |