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Diffstat (limited to 'arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi')
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi19
1 files changed, 12 insertions, 7 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi b/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi
index cce1c8e83587..71ed680621b8 100644
--- a/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3588-coolpi-cm5.dtsi
@@ -36,7 +36,7 @@
stdout-path = "serial2:1500000n8";
};
- avdd0v85_pcie20: avdd0v85-pcie20-regulator {
+ avdd0v85_pcie20: regulator-avdd0v85-pcie20 {
compatible = "regulator-fixed";
regulator-name = "avdd0v85_pcie20";
regulator-boot-on;
@@ -46,7 +46,7 @@
vin-supply = <&vdd_0v85_s0>;
};
- avdd1v8_pcie20: avdd1v8-pcie20-regulator {
+ avdd1v8_pcie20: regulator-avdd1v8-pcie20 {
compatible = "regulator-fixed";
regulator-name = "avdd1v8_pcie20";
regulator-boot-on;
@@ -56,7 +56,7 @@
vin-supply = <&avcc_1v8_s0>;
};
- avdd0v75_pcie30: avdd0v75-pcie30-regulator {
+ avdd0v75_pcie30: regulator-avdd0v75-pcie30 {
compatible = "regulator-fixed";
regulator-name = "avdd0v75_pcie30";
regulator-boot-on;
@@ -66,7 +66,7 @@
vin-supply = <&avdd_0v75_s0>;
};
- pcie30_avdd1v8: avdd1v8-pcie30-regulator {
+ pcie30_avdd1v8: regulator-avdd1v8-pcie30 {
compatible = "regulator-fixed";
regulator-name = "pcie30_avdd1v8";
regulator-boot-on;
@@ -136,6 +136,11 @@
status = "okay";
};
+&gpu {
+ mali-supply = <&vdd_gpu_s0>;
+ status = "okay";
+};
+
&i2c0 {
pinctrl-0 = <&i2c0m2_xfer>;
status = "okay";
@@ -216,9 +221,9 @@
pinctrl-0 = <&i2c7m0_xfer>;
status = "okay";
- es8316: audio-codec@11 {
+ es8316: audio-codec@10 {
compatible = "everest,es8316";
- reg = <0x11>;
+ reg = <0x10>;
assigned-clocks = <&cru I2S0_8CH_MCLKOUT>;
assigned-clock-rates = <12288000>;
clocks = <&cru I2S0_8CH_MCLKOUT>;
@@ -357,7 +362,7 @@
vcca-supply = <&vcc5v0_sys>;
rk806_dvs1_null: dvs1-null-pins {
- pins = "gpio_pwrctrl2";
+ pins = "gpio_pwrctrl1";
function = "pin_fun0";
};