diff options
Diffstat (limited to 'arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi')
| -rw-r--r-- | arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi | 32 |
1 files changed, 30 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi index ccaca29200bb..60d1b1acf9a0 100644 --- a/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi +++ b/arch/arm64/boot/dts/xilinx/zynqmp-clk-ccf.dtsi @@ -70,6 +70,22 @@ clocks = <&zynqmp_clk ACPU>; }; +&cpu0_debug { + clocks = <&zynqmp_clk DBF_FPD>; +}; + +&cpu1_debug { + clocks = <&zynqmp_clk DBF_FPD>; +}; + +&cpu2_debug { + clocks = <&zynqmp_clk DBF_FPD>; +}; + +&cpu3_debug { + clocks = <&zynqmp_clk DBF_FPD>; +}; + &fpd_dma_chan1 { clocks = <&zynqmp_clk GDMA_REF>, <&zynqmp_clk LPD_LSBUS>; }; @@ -230,18 +246,30 @@ &uart0 { clocks = <&zynqmp_clk UART0_REF>, <&zynqmp_clk LPD_LSBUS>; + assigned-clocks = <&zynqmp_clk UART0_REF>; }; &uart1 { clocks = <&zynqmp_clk UART1_REF>, <&zynqmp_clk LPD_LSBUS>; + assigned-clocks = <&zynqmp_clk UART1_REF>; }; -&dwc3_0 { +&usb0 { clocks = <&zynqmp_clk USB0_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>; + assigned-clocks = <&zynqmp_clk USB0_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>; }; -&dwc3_1 { +&dwc3_0 { + clocks = <&zynqmp_clk USB3_DUAL_REF>; +}; + +&usb1 { clocks = <&zynqmp_clk USB1_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>; + assigned-clocks = <&zynqmp_clk USB1_BUS_REF>, <&zynqmp_clk USB3_DUAL_REF>; +}; + +&dwc3_1 { + clocks = <&zynqmp_clk USB3_DUAL_REF>; }; &watchdog0 { |