diff options
Diffstat (limited to 'arch/arm64/boot')
| -rw-r--r-- | arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 21 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts | 23 | ||||
| -rw-r--r-- | arch/arm64/boot/dts/intel/socfpga_agilex.dtsi | 19 |
3 files changed, 58 insertions, 5 deletions
diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi index 55c5e1fdddc7..41c9eb51d0ee 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi @@ -134,9 +134,8 @@ ranges = <0 0 0 0xffffffff>; base_fpga_region { - #address-cells = <0x1>; - #size-cells = <0x1>; - + #address-cells = <0x2>; + #size-cells = <0x2>; compatible = "fpga-region"; fpga-mgr = <&fpga_mgr>; }; @@ -353,6 +352,22 @@ reset-names = "dma", "dma-ocp"; }; + pinctrl0: pinctrl@ffd13000 { + compatible = "pinctrl-single"; + reg = <0xffd13000 0xA0>; + #pinctrl-cells = <1>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0x0000000f>; + }; + + pinctrl1: pinctrl@ffd13100 { + compatible = "pinctrl-single"; + reg = <0xffd13100 0x20>; + #pinctrl-cells = <1>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0x0000000f>; + }; + rst: rstmgr@ffd11000 { #reset-cells = <1>; compatible = "altr,stratix10-rst-mgr"; diff --git a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts index 17752ca743e5..38ae674f2f02 100644 --- a/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts +++ b/arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts @@ -65,6 +65,22 @@ }; }; +&pinctrl0 { + i2c1_pmx_func: i2c1-pmx-func { + pinctrl-single,pins = < + 0x78 0x4 /* I2C1_SDA (IO6-B) PIN30SEL) */ + 0x7c 0x4 /* I2C1_SCL (IO7-B) PIN31SEL */ + >; + }; + + i2c1_pmx_func_gpio: i2c1-pmx-func-gpio { + pinctrl-single,pins = < + 0x78 0x8 /* I2C1_SDA (IO6-B) PIN30SEL) */ + 0x7c 0x8 /* I2C1_SCL (IO7-B) PIN31SEL */ + >; + }; +}; + &gpio1 { status = "okay"; }; @@ -131,6 +147,13 @@ i2c-sda-falling-time-ns = <890>; /* hcnt */ i2c-sdl-falling-time-ns = <890>; /* lcnt */ + pinctrl-names = "default", "gpio"; + pinctrl-0 = <&i2c1_pmx_func>; + pinctrl-1 = <&i2c1_pmx_func_gpio>; + + scl-gpios = <&portb 6 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + sda-gpios = <&portb 7 (GPIO_ACTIVE_HIGH | GPIO_OPEN_DRAIN)>; + adc@14 { compatible = "lltc,ltc2497"; reg = <0x14>; diff --git a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi index 849b46dd8098..f9674cc46764 100644 --- a/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi +++ b/arch/arm64/boot/dts/intel/socfpga_agilex.dtsi @@ -139,8 +139,8 @@ ranges = <0 0 0 0xffffffff>; base_fpga_region { - #address-cells = <0x1>; - #size-cells = <0x1>; + #address-cells = <0x2>; + #size-cells = <0x2>; compatible = "fpga-region"; fpga-mgr = <&fpga_mgr>; }; @@ -357,6 +357,21 @@ clock-names = "apb_pclk"; }; + pinctrl0: pinctrl@ffd13000 { + compatible = "pinctrl-single"; + #pinctrl-cells = <1>; + reg = <0xffd13000 0xa0>; + pinctrl-single,register-width = <32>; + pinctrl-single,function-mask = <0x0000000f>; + }; + + pinctrl1: pinconf@ffd13100 { + compatible = "pinctrl-single"; + #pinctrl-cells = <1>; + reg = <0xffd13100 0x20>; + pinctrl-single,register-width = <32>; + }; + rst: rstmgr@ffd11000 { #reset-cells = <1>; compatible = "altr,stratix10-rst-mgr"; |