diff options
Diffstat (limited to 'arch/arm')
30 files changed, 225 insertions, 106 deletions
diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 8bcbd0cd739b..b70d7debf5ca 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -147,14 +147,14 @@ choice 0x80024000 | 0xf0024000 | UART9 config DEBUG_AT91_RM9200_DBGU - bool "Kernel low-level debugging on AT91RM9200, AT91SAM9 DBGU" + bool "Kernel low-level debugging on AT91RM9200, AT91SAM9, SAM9X60 DBGU" select DEBUG_AT91_UART - depends on SOC_AT91RM9200 || SOC_AT91SAM9 + depends on SOC_AT91RM9200 || SOC_AT91SAM9 || SOC_SAM9X60 help Say Y here if you want kernel low-level debugging support on the DBGU port of: at91rm9200, at91sam9260, at91sam9g20, at91sam9261, - at91sam9g10, at91sam9n12, at91sam9rl64, at91sam9x5 + at91sam9g10, at91sam9n12, at91sam9rl64, at91sam9x5, sam9x60 config DEBUG_AT91_SAM9263_DBGU bool "Kernel low-level debugging on AT91SAM{9263,9G45,A5D3} DBGU" diff --git a/arch/arm/boot/dts/e60k02.dtsi b/arch/arm/boot/dts/e60k02.dtsi index 6472b056a001..5a2c5320437d 100644 --- a/arch/arm/boot/dts/e60k02.dtsi +++ b/arch/arm/boot/dts/e60k02.dtsi @@ -265,11 +265,6 @@ regulator-name = "LDORTC1"; regulator-boot-on; }; - - ldortc2_reg: LDORTC2 { - regulator-name = "LDORTC2"; - regulator-boot-on; - }; }; }; }; diff --git a/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi b/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi index 1506eb12b21e..212144511b66 100644 --- a/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi +++ b/arch/arm/boot/dts/imx6ul-14x14-evk.dtsi @@ -30,14 +30,26 @@ enable-active-high; }; - reg_sensors: regulator-sensors { + reg_peri_3v3: regulator-peri-3v3 { compatible = "regulator-fixed"; pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_sensors_reg>; - regulator-name = "sensors-supply"; + pinctrl-0 = <&pinctrl_peri_3v3>; + regulator-name = "VPERI_3V3"; regulator-min-microvolt = <3300000>; regulator-max-microvolt = <3300000>; gpio = <&gpio5 2 GPIO_ACTIVE_LOW>; + /* + * If you want to want to make this dynamic please + * check schematics and test all affected peripherals: + * + * - sensors + * - ethernet phy + * - can + * - bluetooth + * - wm8960 audio codec + * - ov5640 camera + */ + regulator-always-on; }; reg_can_3v3: regulator-can-3v3 { @@ -140,6 +152,7 @@ pinctrl-0 = <&pinctrl_enet1>; phy-mode = "rmii"; phy-handle = <ðphy0>; + phy-supply = <®_peri_3v3>; status = "okay"; }; @@ -148,6 +161,7 @@ pinctrl-0 = <&pinctrl_enet2>; phy-mode = "rmii"; phy-handle = <ðphy1>; + phy-supply = <®_peri_3v3>; status = "okay"; mdio { @@ -193,8 +207,8 @@ magnetometer@e { compatible = "fsl,mag3110"; reg = <0x0e>; - vdd-supply = <®_sensors>; - vddio-supply = <®_sensors>; + vdd-supply = <®_peri_3v3>; + vddio-supply = <®_peri_3v3>; }; }; @@ -227,7 +241,7 @@ flash0: n25q256a@0 { #address-cells = <1>; #size-cells = <1>; - compatible = "micron,n25q256a"; + compatible = "micron,n25q256a", "jedec,spi-nor"; spi-max-frequency = <29000000>; spi-rx-bus-width = <4>; spi-tx-bus-width = <4>; @@ -462,7 +476,7 @@ >; }; - pinctrl_sensors_reg: sensorsreggrp { + pinctrl_peri_3v3: peri3v3grp { fsl,pins = < MX6UL_PAD_SNVS_TAMPER2__GPIO5_IO02 0x1b0b0 >; diff --git a/arch/arm/configs/imx_v6_v7_defconfig b/arch/arm/configs/imx_v6_v7_defconfig index 26d6dee67aa6..3608e55eaecd 100644 --- a/arch/arm/configs/imx_v6_v7_defconfig +++ b/arch/arm/configs/imx_v6_v7_defconfig @@ -462,6 +462,7 @@ CONFIG_FONT_8x8=y CONFIG_FONT_8x16=y CONFIG_PRINTK_TIME=y CONFIG_MAGIC_SYSRQ=y +CONFIG_DEBUG_FS=y # CONFIG_SCHED_DEBUG is not set CONFIG_PROVE_LOCKING=y # CONFIG_DEBUG_BUGVERBOSE is not set diff --git a/arch/arm/crypto/curve25519-glue.c b/arch/arm/crypto/curve25519-glue.c index f3f42cf3b893..776ae07e0469 100644 --- a/arch/arm/crypto/curve25519-glue.c +++ b/arch/arm/crypto/curve25519-glue.c @@ -38,6 +38,13 @@ void curve25519_arch(u8 out[CURVE25519_KEY_SIZE], } EXPORT_SYMBOL(curve25519_arch); +void curve25519_base_arch(u8 pub[CURVE25519_KEY_SIZE], + const u8 secret[CURVE25519_KEY_SIZE]) +{ + return curve25519_arch(pub, secret, curve25519_base_point); +} +EXPORT_SYMBOL(curve25519_base_arch); + static int curve25519_set_secret(struct crypto_kpp *tfm, const void *buf, unsigned int len) { diff --git a/arch/arm/include/debug/brcmstb.S b/arch/arm/include/debug/brcmstb.S index bf8702ee8f86..132a20c4a676 100644 --- a/arch/arm/include/debug/brcmstb.S +++ b/arch/arm/include/debug/brcmstb.S @@ -31,6 +31,7 @@ #define UARTA_7268 UARTA_7255 #define UARTA_7271 UARTA_7268 #define UARTA_7278 REG_PHYS_ADDR_V7(0x40c000) +#define UARTA_7216 UARTA_7278 #define UARTA_7364 REG_PHYS_ADDR(0x40b000) #define UARTA_7366 UARTA_7364 #define UARTA_74371 REG_PHYS_ADDR(0x406b00) @@ -82,17 +83,18 @@ ARM_BE8( rev \rv, \rv ) /* Chip specific detection starts here */ 20: checkuart(\rp, \rv, 0x33900000, 3390) -21: checkuart(\rp, \rv, 0x72500000, 7250) -22: checkuart(\rp, \rv, 0x72550000, 7255) -23: checkuart(\rp, \rv, 0x72600000, 7260) -24: checkuart(\rp, \rv, 0x72680000, 7268) -25: checkuart(\rp, \rv, 0x72710000, 7271) -26: checkuart(\rp, \rv, 0x72780000, 7278) -27: checkuart(\rp, \rv, 0x73640000, 7364) -28: checkuart(\rp, \rv, 0x73660000, 7366) -29: checkuart(\rp, \rv, 0x07437100, 74371) -30: checkuart(\rp, \rv, 0x74390000, 7439) -31: checkuart(\rp, \rv, 0x74450000, 7445) +21: checkuart(\rp, \rv, 0x72160000, 7216) +22: checkuart(\rp, \rv, 0x72500000, 7250) +23: checkuart(\rp, \rv, 0x72550000, 7255) +24: checkuart(\rp, \rv, 0x72600000, 7260) +25: checkuart(\rp, \rv, 0x72680000, 7268) +26: checkuart(\rp, \rv, 0x72710000, 7271) +27: checkuart(\rp, \rv, 0x72780000, 7278) +28: checkuart(\rp, \rv, 0x73640000, 7364) +29: checkuart(\rp, \rv, 0x73660000, 7366) +30: checkuart(\rp, \rv, 0x07437100, 74371) +31: checkuart(\rp, \rv, 0x74390000, 7439) +32: checkuart(\rp, \rv, 0x74450000, 7445) /* No valid UART found */ 90: mov \rp, #0 diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig index af41725fcc72..7979420bd48b 100644 --- a/arch/arm/mach-at91/Kconfig +++ b/arch/arm/mach-at91/Kconfig @@ -105,11 +105,28 @@ config SOC_AT91SAM9 AT91SAM9X35 AT91SAM9XE +config SOC_SAM9X60 + bool "SAM9X60" + depends on ARCH_MULTI_V5 + select ATMEL_AIC5_IRQ + select ATMEL_PM if PM + select ATMEL_SDRAMC + select CPU_ARM926T + select HAVE_AT91_USB_CLK + select HAVE_AT91_GENERATED_CLK + select HAVE_AT91_SAM9X60_PLL + select MEMORY + select PINCTRL_AT91 + select SOC_SAM_V4_V5 + select SRAM if PM + help + Select this if you are using Microchip's SAM9X60 SoC + comment "Clocksource driver selection" config ATMEL_CLOCKSOURCE_PIT bool "Periodic Interval Timer (PIT) support" - depends on SOC_AT91SAM9 || SOC_SAMA5 + depends on SOC_AT91SAM9 || SOC_SAM9X60 || SOC_SAMA5 default SOC_AT91SAM9 || SOC_SAMA5 select ATMEL_PIT help @@ -119,7 +136,7 @@ config ATMEL_CLOCKSOURCE_PIT config ATMEL_CLOCKSOURCE_TCB bool "Timer Counter Blocks (TCB) support" - default SOC_AT91RM9200 || SOC_AT91SAM9 || SOC_SAMA5 + default SOC_AT91RM9200 || SOC_AT91SAM9 || SOC_SAM9X60 || SOC_SAMA5 select ATMEL_TCB_CLKSRC help Select this to get a high precision clocksource based on a @@ -154,6 +171,9 @@ config HAVE_AT91_AUDIO_PLL config HAVE_AT91_I2S_MUX_CLK bool +config HAVE_AT91_SAM9X60_PLL + bool + config SOC_SAM_V4_V5 bool diff --git a/arch/arm/mach-at91/Makefile b/arch/arm/mach-at91/Makefile index de64301dcff2..f565490f1b70 100644 --- a/arch/arm/mach-at91/Makefile +++ b/arch/arm/mach-at91/Makefile @@ -6,6 +6,7 @@ # CPU-specific support obj-$(CONFIG_SOC_AT91RM9200) += at91rm9200.o obj-$(CONFIG_SOC_AT91SAM9) += at91sam9.o +obj-$(CONFIG_SOC_SAM9X60) += sam9x60.o obj-$(CONFIG_SOC_SAMA5) += sama5.o obj-$(CONFIG_SOC_SAMV7) += samv7.o diff --git a/arch/arm/mach-at91/at91sam9.c b/arch/arm/mach-at91/at91sam9.c index bf629c90c758..7e572189a5eb 100644 --- a/arch/arm/mach-at91/at91sam9.c +++ b/arch/arm/mach-at91/at91sam9.c @@ -31,21 +31,3 @@ DT_MACHINE_START(at91sam_dt, "Atmel AT91SAM9") .init_machine = at91sam9_init, .dt_compat = at91_dt_board_compat, MACHINE_END - -static void __init sam9x60_init(void) -{ - of_platform_default_populate(NULL, NULL, NULL); - - sam9x60_pm_init(); -} - -static const char *const sam9x60_dt_board_compat[] __initconst = { - "microchip,sam9x60", - NULL -}; - -DT_MACHINE_START(sam9x60_dt, "Microchip SAM9X60") - /* Maintainer: Microchip */ - .init_machine = sam9x60_init, - .dt_compat = sam9x60_dt_board_compat, -MACHINE_END diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index d5af6aedc02c..374b9d155558 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -691,6 +691,12 @@ static void __init at91_pm_use_default_mode(int pm_mode) soc_pm.data.suspend_mode = AT91_PM_ULP0; } +static const struct of_device_id atmel_shdwc_ids[] = { + { .compatible = "atmel,sama5d2-shdwc" }, + { .compatible = "microchip,sam9x60-shdwc" }, + { /* sentinel. */ } +}; + static void __init at91_pm_modes_init(void) { struct device_node *np; @@ -700,7 +706,7 @@ static void __init at91_pm_modes_init(void) !at91_is_pm_mode_active(AT91_PM_ULP1)) return; - np = of_find_compatible_node(NULL, NULL, "atmel,sama5d2-shdwc"); + np = of_find_matching_node(NULL, atmel_shdwc_ids); if (!np) { pr_warn("%s: failed to find shdwc!\n", __func__); goto ulp1_default; @@ -751,6 +757,7 @@ static const struct of_device_id atmel_pmc_ids[] __initconst = { { .compatible = "atmel,sama5d3-pmc", .data = &pmc_infos[1] }, { .compatible = "atmel,sama5d4-pmc", .data = &pmc_infos[1] }, { .compatible = "atmel,sama5d2-pmc", .data = &pmc_infos[1] }, + { .compatible = "microchip,sam9x60-pmc", .data = &pmc_infos[1] }, { /* sentinel */ }, }; @@ -805,7 +812,7 @@ void __init at91rm9200_pm_init(void) void __init sam9x60_pm_init(void) { - if (!IS_ENABLED(CONFIG_SOC_AT91SAM9)) + if (!IS_ENABLED(CONFIG_SOC_SAM9X60)) return; at91_pm_modes_init(); diff --git a/arch/arm/mach-at91/sam9x60.c b/arch/arm/mach-at91/sam9x60.c new file mode 100644 index 000000000000..d8c739d25458 --- /dev/null +++ b/arch/arm/mach-at91/sam9x60.c @@ -0,0 +1,34 @@ +// SPDX-License-Identifier: GPL-2.0+ +/* + * Setup code for SAM9X60. + * + * Copyright (C) 2019 Microchip Technology Inc. and its subsidiaries + * + * Author: Claudiu Beznea <claudiu.beznea@microchip.com> + */ + +#include <linux/of.h> +#include <linux/of_platform.h> + +#include <asm/mach/arch.h> +#include <asm/system_misc.h> + +#include "generic.h" + +static void __init sam9x60_init(void) +{ + of_platform_default_populate(NULL, NULL, NULL); + + sam9x60_pm_init(); +} + +static const char *const sam9x60_dt_board_compat[] __initconst = { + "microchip,sam9x60", + NULL +}; + +DT_MACHINE_START(sam9x60_dt, "Microchip SAM9X60") + /* Maintainer: Microchip */ + .init_machine = sam9x60_init, + .dt_compat = sam9x60_dt_board_compat, +MACHINE_END diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig index e4e25f287ad7..fcfe2a0e8058 100644 --- a/arch/arm/mach-bcm/Kconfig +++ b/arch/arm/mach-bcm/Kconfig @@ -211,6 +211,7 @@ config ARCH_BRCMSTB bool "Broadcom BCM7XXX based boards" depends on ARCH_MULTI_V7 select ARCH_HAS_RESET_CONTROLLER + select ARM_AMBA select ARM_GIC select ARM_ERRATA_798181 if SMP select HAVE_ARM_ARCH_TIMER diff --git a/arch/arm/mach-exynos/Kconfig b/arch/arm/mach-exynos/Kconfig index 4ef56571145b..52a515017fe7 100644 --- a/arch/arm/mach-exynos/Kconfig +++ b/arch/arm/mach-exynos/Kconfig @@ -3,10 +3,10 @@ # Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. # http://www.samsung.com/ -# Configuration options for the EXYNOS +# Configuration options for the Samsung Exynos menuconfig ARCH_EXYNOS - bool "Samsung EXYNOS" + bool "Samsung Exynos" depends on ARCH_MULTI_V7 select ARCH_HAS_HOLES_MEMORYMODEL select ARCH_SUPPORTS_BIG_ENDIAN @@ -41,7 +41,7 @@ menuconfig ARCH_EXYNOS select POWER_RESET_SYSCON select POWER_RESET_SYSCON_POWEROFF help - Support for SAMSUNG EXYNOS SoCs (EXYNOS4/5) + Support for Samsung Exynos SoCs if ARCH_EXYNOS @@ -51,63 +51,62 @@ config S5P_DEV_MFC Compile in setup memory (init) code for MFC config ARCH_EXYNOS3 - bool "SAMSUNG EXYNOS3" + bool "Samsung Exynos3" default y select ARM_CPU_SUSPEND if PM help - Samsung EXYNOS3 (Cortex-A7) SoC based systems + Samsung Exynos3 (Cortex-A7) SoC based systems config ARCH_EXYNOS4 - bool "SAMSUNG EXYNOS4" + bool "Samsung Exynos4" default y select ARM_CPU_SUSPEND if PM_SLEEP select CLKSRC_SAMSUNG_PWM if CPU_EXYNOS4210 select CPU_EXYNOS4210 select GIC_NON_BANKED - select MIGHT_HAVE_CACHE_L2X0 help - Samsung EXYNOS4 (Cortex-A9) SoC based systems + Samsung Exynos4 (Cortex-A9) SoC based systems config ARCH_EXYNOS5 - bool "SAMSUNG EXYNOS5" + bool "Samsung Exynos5" default y help - Samsung EXYNOS5 (Cortex-A15/A7) SoC based systems + Samsung Exynos5 (Cortex-A15/A7) SoC based systems -comment "EXYNOS SoCs" +comment "Exynos SoCs" config SOC_EXYNOS3250 - bool "SAMSUNG EXYNOS3250" + bool "Samsung Exynos3250" default y depends on ARCH_EXYNOS3 config CPU_EXYNOS4210 - bool "SAMSUNG EXYNOS4210" + bool "Samsung Exynos4210" default y depends on ARCH_EXYNOS4 config SOC_EXYNOS4412 - bool "SAMSUNG EXYNOS4412" + bool "Samsung Exynos4412" default y depends on ARCH_EXYNOS4 config SOC_EXYNOS5250 - bool "SAMSUNG EXYNOS5250" + bool "Samsung Exynos5250" default y depends on ARCH_EXYNOS5 config SOC_EXYNOS5260 - bool "SAMSUNG EXYNOS5260" + bool "Samsung Exynos5260" default y depends on ARCH_EXYNOS5 config SOC_EXYNOS5410 - bool "SAMSUNG EXYNOS5410" + bool "Samsung Exynos5410" default y depends on ARCH_EXYNOS5 config SOC_EXYNOS5420 - bool "SAMSUNG EXYNOS5420" + bool "Samsung Exynos5420" default y depends on ARCH_EXYNOS5 select EXYNOS_MCPM if SMP @@ -115,7 +114,7 @@ config SOC_EXYNOS5420 select ARM_CPU_SUSPEND config SOC_EXYNOS5800 - bool "SAMSUNG EXYNOS5800" + bool "Samsung EXYNOS5800" default y depends on SOC_EXYNOS5420 diff --git a/arch/arm/mach-exynos/common.h b/arch/arm/mach-exynos/common.h index 56411bb63d45..afd988a92836 100644 --- a/arch/arm/mach-exynos/common.h +++ b/arch/arm/mach-exynos/common.h @@ -3,7 +3,7 @@ * Copyright (c) 2011 Samsung Electronics Co., Ltd. * http://www.samsung.com * - * Common Header for EXYNOS machines + * Common Header for Exynos machines */ #ifndef __ARCH_ARM_MACH_EXYNOS_COMMON_H diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c index 9aa483366ebc..7a8d1555db40 100644 --- a/arch/arm/mach-exynos/exynos.c +++ b/arch/arm/mach-exynos/exynos.c @@ -1,6 +1,6 @@ // SPDX-License-Identifier: GPL-2.0 // -// SAMSUNG EXYNOS Flattened Device Tree enabled machine +// Samsung Exynos Flattened Device Tree enabled machine // // Copyright (c) 2010-2014 Samsung Electronics Co., Ltd. // http://www.samsung.com @@ -192,7 +192,7 @@ static void __init exynos_dt_fixup(void) of_fdt_limit_memory(8); } -DT_MACHINE_START(EXYNOS_DT, "SAMSUNG EXYNOS (Flattened Device Tree)") +DT_MACHINE_START(EXYNOS_DT, "Samsung Exynos (Flattened Device Tree)") .l2c_aux_val = 0x3c400001, .l2c_aux_mask = 0xc20fffff, .smp = smp_ops(exynos_smp_ops), diff --git a/arch/arm/mach-exynos/include/mach/map.h b/arch/arm/mach-exynos/include/mach/map.h index 22ebe3654633..8d58faa54ff7 100644 --- a/arch/arm/mach-exynos/include/mach/map.h +++ b/arch/arm/mach-exynos/include/mach/map.h @@ -3,7 +3,7 @@ * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. * http://www.samsung.com/ * - * EXYNOS - Memory map definitions + * Exynos - Memory map definitions */ #ifndef __ASM_ARCH_MAP_H diff --git a/arch/arm/mach-exynos/pm.c b/arch/arm/mach-exynos/pm.c index 48e7fb38613e..78af34cc89cc 100644 --- a/arch/arm/mach-exynos/pm.c +++ b/arch/arm/mach-exynos/pm.c @@ -3,7 +3,7 @@ // Copyright (c) 2011-2014 Samsung Electronics Co., Ltd. // http://www.samsung.com // -// EXYNOS - Power Management support +// Exynos - Power Management support // // Based on arch/arm/mach-s3c2410/pm.c // Copyright (c) 2006 Simtec Electronics diff --git a/arch/arm/mach-exynos/smc.h b/arch/arm/mach-exynos/smc.h index 98832e50852d..5c30feb8f07d 100644 --- a/arch/arm/mach-exynos/smc.h +++ b/arch/arm/mach-exynos/smc.h @@ -2,7 +2,7 @@ /* * Copyright (c) 2012 Samsung Electronics. * - * EXYNOS - SMC Call + * Exynos - SMC Call */ #ifndef __ASM_ARCH_EXYNOS_SMC_H diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c index 6a0d3448ea00..3bf14ca78b62 100644 --- a/arch/arm/mach-exynos/suspend.c +++ b/arch/arm/mach-exynos/suspend.c @@ -3,7 +3,7 @@ // Copyright (c) 2011-2014 Samsung Electronics Co., Ltd. // http://www.samsung.com // -// EXYNOS - Suspend support +// Exynos - Suspend support // // Based on arch/arm/mach-s3c2410/pm.c // Copyright (c) 2006 Simtec Electronics diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index 593bf1519608..95584ee02b55 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig @@ -520,6 +520,7 @@ config SOC_IMX6UL bool "i.MX6 UltraLite support" select PINCTRL_IMX6UL select SOC_IMX6 + select ARM_ERRATA_814220 help This enables support for Freescale i.MX6 UltraLite processor. @@ -556,6 +557,7 @@ config SOC_IMX7D select PINCTRL_IMX7D select SOC_IMX7D_CA7 if ARCH_MULTI_V7 select SOC_IMX7D_CM4 if ARM_SINGLE_ARMV7M + select ARM_ERRATA_814220 if ARCH_MULTI_V7 help This enables support for Freescale i.MX7 Dual processor. diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c index d8118031c51f..06f8d64b65af 100644 --- a/arch/arm/mach-imx/cpu.c +++ b/arch/arm/mach-imx/cpu.c @@ -15,6 +15,11 @@ #define OCOTP_UID_H 0x420 #define OCOTP_UID_L 0x410 +#define OCOTP_ULP_UID_1 0x4b0 +#define OCOTP_ULP_UID_2 0x4c0 +#define OCOTP_ULP_UID_3 0x4d0 +#define OCOTP_ULP_UID_4 0x4e0 + unsigned int __mxc_cpu_type; static unsigned int imx_soc_revision; @@ -84,7 +89,7 @@ struct device * __init imx_soc_device_init(void) const char *ocotp_compat = NULL; struct soc_device *soc_dev; struct device_node *root; - struct regmap *ocotp; + struct regmap *ocotp = NULL; const char *soc_id; u64 soc_uid = 0; u32 val; @@ -148,11 +153,11 @@ struct device * __init imx_soc_device_init(void) soc_id = "i.MX6UL"; break; case MXC_CPU_IMX6ULL: - ocotp_compat = "fsl,imx6ul-ocotp"; + ocotp_compat = "fsl,imx6ull-ocotp"; soc_id = "i.MX6ULL"; break; case MXC_CPU_IMX6ULZ: - ocotp_compat = "fsl,imx6ul-ocotp"; + ocotp_compat = "fsl,imx6ull-ocotp"; soc_id = "i.MX6ULZ"; break; case MXC_CPU_IMX6SLL: @@ -164,6 +169,7 @@ struct device * __init imx_soc_device_init(void) soc_id = "i.MX7D"; break; case MXC_CPU_IMX7ULP: + ocotp_compat = "fsl,imx7ulp-ocotp"; soc_id = "i.MX7ULP"; break; default: @@ -175,12 +181,28 @@ struct device * __init imx_soc_device_init(void) ocotp = syscon_regmap_lookup_by_compatible(ocotp_compat); if (IS_ERR(ocotp)) pr_err("%s: failed to find %s regmap!\n", __func__, ocotp_compat); + } - regmap_read(ocotp, OCOTP_UID_H, &val); - soc_uid = val; - regmap_read(ocotp, OCOTP_UID_L, &val); - soc_uid <<= 32; - soc_uid |= val; + if (!IS_ERR_OR_NULL(ocotp)) { + if (__mxc_cpu_type == MXC_CPU_IMX7ULP) { + regmap_read(ocotp, OCOTP_ULP_UID_4, &val); + soc_uid = val & 0xffff; + regmap_read(ocotp, OCOTP_ULP_UID_3, &val); + soc_uid <<= 16; + soc_uid |= val & 0xffff; + regmap_read(ocotp, OCOTP_ULP_UID_2, &val); + soc_uid <<= 16; + soc_uid |= val & 0xffff; + regmap_read(ocotp, OCOTP_ULP_UID_1, &val); + soc_uid <<= 16; + soc_uid |= val & 0xffff; + } else { + regmap_read(ocotp, OCOTP_UID_H, &val); + soc_uid = val; + regmap_read(ocotp, OCOTP_UID_L, &val); + soc_uid <<= 32; + soc_uid |= val; + } } soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d.%d", diff --git a/arch/arm/mach-s3c24xx/Kconfig b/arch/arm/mach-s3c24xx/Kconfig index 686f0bbde998..c5c06d98b147 100644 --- a/arch/arm/mach-s3c24xx/Kconfig +++ b/arch/arm/mach-s3c24xx/Kconfig @@ -19,12 +19,12 @@ config PLAT_S3C24XX -menu "SAMSUNG S3C24XX SoCs Support" +menu "Samsung S3C24XX SoCs Support" comment "S3C24XX SoCs" config CPU_S3C2410 - bool "SAMSUNG S3C2410" + bool "Samsung S3C2410" default y select CPU_ARM920T select S3C2410_COMMON_CLK @@ -35,7 +35,7 @@ config CPU_S3C2410 of Samsung Mobile CPUs. config CPU_S3C2412 - bool "SAMSUNG S3C2412" + bool "Samsung S3C2412" select CPU_ARM926T select S3C2412_COMMON_CLK select S3C2412_PM if PM_SLEEP @@ -43,7 +43,7 @@ config CPU_S3C2412 Support for the S3C2412 and S3C2413 SoCs from the S3C24XX line config CPU_S3C2416 - bool "SAMSUNG S3C2416/S3C2450" + bool "Samsung S3C2416/S3C2450" select CPU_ARM926T select S3C2416_PM if PM_SLEEP select S3C2443_COMMON_CLK @@ -51,7 +51,7 @@ config CPU_S3C2416 Support for the S3C2416 SoC from the S3C24XX line config CPU_S3C2440 - bool "SAMSUNG S3C2440" + bool "Samsung S3C2440" select CPU_ARM920T select S3C2410_COMMON_CLK select S3C2410_PM if PM_SLEEP @@ -59,7 +59,7 @@ config CPU_S3C2440 Support for S3C2440 Samsung Mobile CPU based systems. config CPU_S3C2442 - bool "SAMSUNG S3C2442" + bool "Samsung S3C2442" select CPU_ARM920T select S3C2410_COMMON_CLK select S3C2410_PM if PM_SLEEP @@ -71,7 +71,7 @@ config CPU_S3C244X depends on CPU_S3C2440 || CPU_S3C2442 config CPU_S3C2443 - bool "SAMSUNG S3C2443" + bool "Samsung S3C2443" select CPU_ARM920T select S3C2443_COMMON_CLK help @@ -591,6 +591,6 @@ config PM_H1940 help Internal node for H1940 and related PM -endmenu # SAMSUNG S3C24XX SoCs Support +endmenu # Samsung S3C24XX SoCs Support endif # ARCH_S3C24XX diff --git a/arch/arm/mach-s3c24xx/mach-rx1950.c b/arch/arm/mach-s3c24xx/mach-rx1950.c index 29f9b345a531..03d8f27cdc32 100644 --- a/arch/arm/mach-s3c24xx/mach-rx1950.c +++ b/arch/arm/mach-s3c24xx/mach-rx1950.c @@ -377,6 +377,7 @@ static struct pwm_lookup rx1950_pwm_lookup[] = { }; static struct pwm_device *lcd_pwm; +static struct pwm_state lcd_pwm_state; static void rx1950_lcd_power(int enable) { @@ -429,15 +430,16 @@ static void rx1950_lcd_power(int enable) /* GPB1->OUTPUT, GPB1->0 */ gpio_direction_output(S3C2410_GPB(1), 0); - pwm_config(lcd_pwm, 0, LCD_PWM_PERIOD); - pwm_disable(lcd_pwm); + + lcd_pwm_state.enabled = false; + pwm_apply_state(lcd_pwm, &lcd_pwm_state); /* GPC0->0, GPC10->0 */ gpio_direction_output(S3C2410_GPC(0), 0); gpio_direction_output(S3C2410_GPC(10), 0); } else { - pwm_config(lcd_pwm, LCD_PWM_DUTY, LCD_PWM_PERIOD); - pwm_enable(lcd_pwm); + lcd_pwm_state.enabled = true; + pwm_apply_state(lcd_pwm, &lcd_pwm_state); gpio_direction_output(S3C2410_GPC(0), 1); gpio_direction_output(S3C2410_GPC(5), 1); @@ -493,10 +495,13 @@ static int rx1950_backlight_init(struct device *dev) } /* - * FIXME: pwm_apply_args() should be removed when switching to - * the atomic PWM API. + * This is only required to initialize .polarity; all other values are + * fixed in this driver. */ - pwm_apply_args(lcd_pwm); + pwm_init_state(lcd_pwm, &lcd_pwm_state); + + lcd_pwm_state.period = LCD_PWM_PERIOD; + lcd_pwm_state.duty_cycle = LCD_PWM_DUTY; rx1950_lcd_power(1); rx1950_bl_power(1); diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig index 5700822e3c74..ac3e3563487f 100644 --- a/arch/arm/mach-s3c64xx/Kconfig +++ b/arch/arm/mach-s3c64xx/Kconfig @@ -336,7 +336,6 @@ config MACH_WLF_CRAGG_6410 config MACH_S3C64XX_DT bool "Samsung S3C6400/S3C6410 machine using Device Tree" - select TIMER_OF select CPU_S3C6400 select CPU_S3C6410 select PINCTRL diff --git a/arch/arm/mach-tegra/sleep-tegra30.S b/arch/arm/mach-tegra/sleep-tegra30.S index 3341a12bbb9c..02cc6ff96f30 100644 --- a/arch/arm/mach-tegra/sleep-tegra30.S +++ b/arch/arm/mach-tegra/sleep-tegra30.S @@ -59,6 +59,9 @@ #define CLK_RESET_PLLX_MISC3_IDDQ 3 #define CLK_RESET_PLLM_MISC_IDDQ 5 #define CLK_RESET_PLLC_MISC_IDDQ 26 +#define CLK_RESET_PLLP_RESHIFT 0x528 +#define CLK_RESET_PLLP_RESHIFT_DEFAULT 0x3b +#define CLK_RESET_PLLP_RESHIFT_ENABLE 0x3 #define CLK_RESET_CLK_SOURCE_MSELECT 0x3b4 @@ -370,6 +373,18 @@ _pll_m_c_x_done: pll_locked r1, r0, CLK_RESET_PLLC_BASE pll_locked r1, r0, CLK_RESET_PLLX_BASE + tegra_get_soc_id TEGRA_APB_MISC_BASE, r1 + cmp r1, #TEGRA30 + beq 1f + + ldr r1, [r0, #CLK_RESET_PLLP_BASE] + bic r1, r1, #(1<<31) @ disable PllP bypass + str r1, [r0, #CLK_RESET_PLLP_BASE] + + mov r1, #CLK_RESET_PLLP_RESHIFT_DEFAULT + str r1, [r0, #CLK_RESET_PLLP_RESHIFT] +1: + mov32 r7, TEGRA_TMRUS_BASE ldr r1, [r7] add r1, r1, #LOCK_DELAY @@ -630,9 +645,16 @@ tegra30_switch_cpu_to_clk32k: str r0, [r4, #PMC_PLLP_WB0_OVERRIDE] /* disable PLLP, PLLA, PLLC and PLLX */ + tegra_get_soc_id TEGRA_APB_MISC_BASE, r1 + cmp r1, #TEGRA30 ldr r0, [r5, #CLK_RESET_PLLP_BASE] + orrne r0, r0, #(1 << 31) @ enable PllP bypass on fast cluster bic r0, r0, #(1 << 30) str r0, [r5, #CLK_RESET_PLLP_BASE] + beq 1f + mov r0, #CLK_RESET_PLLP_RESHIFT_ENABLE + str r0, [r5, #CLK_RESET_PLLP_RESHIFT] +1: ldr r0, [r5, #CLK_RESET_PLLA_BASE] bic r0, r0, #(1 << 30) str r0, [r5, #CLK_RESET_PLLA_BASE] @@ -648,8 +670,12 @@ tegra30_switch_cpu_to_clk32k: pll_iddq_entry r1, r5, CLK_RESET_PLLX_MISC3, CLK_RESET_PLLX_MISC3_IDDQ _no_pll_in_iddq: - /* switch to CLKS */ - mov r0, #0 /* brust policy = 32KHz */ + /* + * Switch to clk_s (32KHz); bits 28:31=0 + * Enable burst on CPU IRQ; bit 24=1 + * Set IRQ burst clock source to clk_m; bits 10:8=0 + */ + mov r0, #(1 << 24) str r0, [r5, #CLK_RESET_SCLK_BURST] ret lr diff --git a/arch/arm/mach-zynq/platsmp.c b/arch/arm/mach-zynq/platsmp.c index a10085be9073..68ec303fa278 100644 --- a/arch/arm/mach-zynq/platsmp.c +++ b/arch/arm/mach-zynq/platsmp.c @@ -15,6 +15,7 @@ #include <linux/init.h> #include <linux/io.h> #include <asm/cacheflush.h> +#include <asm/smp_plat.h> #include <asm/smp_scu.h> #include <linux/irqchip/arm-gic.h> #include "common.h" @@ -30,6 +31,7 @@ int zynq_cpun_start(u32 address, int cpu) { u32 trampoline_code_size = &zynq_secondary_trampoline_end - &zynq_secondary_trampoline; + u32 phy_cpuid = cpu_logical_map(cpu); /* MS: Expectation that SLCR are directly map and accessible */ /* Not possible to jump to non aligned address */ @@ -39,7 +41,7 @@ int zynq_cpun_start(u32 address, int cpu) u32 trampoline_size = &zynq_secondary_trampoline_jump - &zynq_secondary_trampoline; - zynq_slcr_cpu_stop(cpu); + zynq_slcr_cpu_stop(phy_cpuid); if (address) { if (__pa(PAGE_OFFSET)) { zero = ioremap(0, trampoline_code_size); @@ -68,7 +70,7 @@ int zynq_cpun_start(u32 address, int cpu) if (__pa(PAGE_OFFSET)) iounmap(zero); } - zynq_slcr_cpu_start(cpu); + zynq_slcr_cpu_start(phy_cpuid); return 0; } diff --git a/arch/arm/plat-samsung/adc.c b/arch/arm/plat-samsung/adc.c index ee3d5c989a76..4f7b27239bd4 100644 --- a/arch/arm/plat-samsung/adc.c +++ b/arch/arm/plat-samsung/adc.c @@ -40,7 +40,7 @@ enum s3c_cpu_type { TYPE_ADCV11, /* S3C2443 */ TYPE_ADCV12, /* S3C2416, S3C2450 */ TYPE_ADCV2, /* S3C64XX */ - TYPE_ADCV3, /* S5PV210, S5PC110, EXYNOS4210 */ + TYPE_ADCV3, /* S5PV210, S5PC110, Exynos4210 */ }; struct s3c_adc_client { diff --git a/arch/arm/plat-samsung/devs.c b/arch/arm/plat-samsung/devs.c index 1602f6dc900b..089a17687104 100644 --- a/arch/arm/plat-samsung/devs.c +++ b/arch/arm/plat-samsung/devs.c @@ -3,7 +3,7 @@ // Copyright (c) 2011 Samsung Electronics Co., Ltd. // http://www.samsung.com // -// Base SAMSUNG platform device definitions +// Base Samsung platform device definitions #include <linux/kernel.h> #include <linux/types.h> diff --git a/arch/arm/plat-samsung/gpio-samsung.c b/arch/arm/plat-samsung/gpio-samsung.c index f66c820cd82b..8955fd675265 100644 --- a/arch/arm/plat-samsung/gpio-samsung.c +++ b/arch/arm/plat-samsung/gpio-samsung.c @@ -8,7 +8,7 @@ // Ben Dooks <ben@simtec.co.uk> // http://armlinux.simtec.co.uk/ // -// SAMSUNG - GPIOlib support +// Samsung - GPIOlib support #include <linux/kernel.h> #include <linux/irq.h> diff --git a/arch/arm/plat-samsung/include/plat/samsung-time.h b/arch/arm/plat-samsung/include/plat/samsung-time.h index d16eefe9ae78..32ab0860f631 100644 --- a/arch/arm/plat-samsung/include/plat/samsung-time.h +++ b/arch/arm/plat-samsung/include/plat/samsung-time.h @@ -9,7 +9,7 @@ #ifndef __ASM_PLAT_SAMSUNG_TIME_H #define __ASM_PLAT_SAMSUNG_TIME_H __FILE__ -/* SAMSUNG HR-Timer Clock mode */ +/* Samsung HR-Timer Clock mode */ enum samsung_timer_mode { SAMSUNG_PWM0, SAMSUNG_PWM1, |