diff options
Diffstat (limited to 'arch/arm')
55 files changed, 427 insertions, 171 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 92951103255a..16bc8eb4901c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -1601,6 +1601,7 @@ config ZRELADDR ARCH_ORION5X ||\ ARCH_SPEAR3XX ||\ ARCH_SPEAR6XX ||\ + ARCH_TEGRA ||\ ARCH_U8500 ||\ ARCH_VERSATILE ||\ ARCH_W90X900 @@ -1622,7 +1623,8 @@ config ZRELADDR default 0x40008000 if ARCH_STMP378X ||\ ARCH_STMP37XX ||\ ARCH_SH7372 ||\ - ARCH_SH7377 + ARCH_SH7377 ||\ + ARCH_S5PV310 default 0x50008000 if ARCH_S3C64XX ||\ ARCH_SH7367 default 0x60008000 if ARCH_VEXPRESS diff --git a/arch/arm/Makefile b/arch/arm/Makefile index 99b8200138d2..59c1ce858fc8 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -21,6 +21,9 @@ GZFLAGS :=-9 # Explicitly specifiy 32-bit ARM ISA since toolchain default can be -mthumb: KBUILD_CFLAGS +=$(call cc-option,-marm,) +# Never generate .eh_frame +KBUILD_CFLAGS += $(call cc-option,-fno-dwarf2-cfi-asm) + # Do not use arch/arm/defconfig - it's always outdated. # Select a platform tht is kept up-to-date KBUILD_DEFCONFIG := versatile_defconfig diff --git a/arch/arm/configs/omap_4430sdp_defconfig b/arch/arm/configs/omap_4430sdp_defconfig index 63e0c2d50f32..14c1e18c648f 100644 --- a/arch/arm/configs/omap_4430sdp_defconfig +++ b/arch/arm/configs/omap_4430sdp_defconfig @@ -13,6 +13,9 @@ CONFIG_MODULE_SRCVERSION_ALL=y # CONFIG_BLK_DEV_BSG is not set CONFIG_ARCH_OMAP=y CONFIG_ARCH_OMAP4=y +# CONFIG_ARCH_OMAP2PLUS_TYPICAL is not set +# CONFIG_ARCH_OMAP2 is not set +# CONFIG_ARCH_OMAP3 is not set # CONFIG_OMAP_MUX is not set CONFIG_OMAP_32K_TIMER=y CONFIG_OMAP_DM_TIMER=y diff --git a/arch/arm/include/asm/Kbuild b/arch/arm/include/asm/Kbuild index 73237bd130a2..6550db3aa5c7 100644 --- a/arch/arm/include/asm/Kbuild +++ b/arch/arm/include/asm/Kbuild @@ -1,3 +1,3 @@ include include/asm-generic/Kbuild.asm -unifdef-y += hwcap.h +header-y += hwcap.h diff --git a/arch/arm/include/asm/hardware/pl080.h b/arch/arm/include/asm/hardware/pl080.h index 6a6c66be7f65..f35b86e68dd5 100644 --- a/arch/arm/include/asm/hardware/pl080.h +++ b/arch/arm/include/asm/hardware/pl080.h @@ -43,7 +43,7 @@ /* Per channel configuration registers */ -#define PL008_Cx_STRIDE (0x20) +#define PL080_Cx_STRIDE (0x20) #define PL080_Cx_BASE(x) ((0x100 + (x * 0x20))) #define PL080_Cx_SRC_ADDR(x) ((0x100 + (x * 0x20))) #define PL080_Cx_DST_ADDR(x) ((0x104 + (x * 0x20))) @@ -68,6 +68,8 @@ #define PL080_CONTROL_TC_IRQ_EN (1 << 31) #define PL080_CONTROL_PROT_MASK (0x7 << 28) #define PL080_CONTROL_PROT_SHIFT (28) +#define PL080_CONTROL_PROT_CACHE (1 << 30) +#define PL080_CONTROL_PROT_BUFF (1 << 29) #define PL080_CONTROL_PROT_SYS (1 << 28) #define PL080_CONTROL_DST_INCR (1 << 27) #define PL080_CONTROL_SRC_INCR (1 << 26) diff --git a/arch/arm/include/asm/ptrace.h b/arch/arm/include/asm/ptrace.h index c974be8913a7..7ce15eb15f72 100644 --- a/arch/arm/include/asm/ptrace.h +++ b/arch/arm/include/asm/ptrace.h @@ -158,15 +158,24 @@ struct pt_regs { */ static inline int valid_user_regs(struct pt_regs *regs) { - if (user_mode(regs) && (regs->ARM_cpsr & PSR_I_BIT) == 0) { - regs->ARM_cpsr &= ~(PSR_F_BIT | PSR_A_BIT); - return 1; + unsigned long mode = regs->ARM_cpsr & MODE_MASK; + + /* + * Always clear the F (FIQ) and A (delayed abort) bits + */ + regs->ARM_cpsr &= ~(PSR_F_BIT | PSR_A_BIT); + + if ((regs->ARM_cpsr & PSR_I_BIT) == 0) { + if (mode == USR_MODE) + return 1; + if (elf_hwcap & HWCAP_26BIT && mode == USR26_MODE) + return 1; } /* * Force CPSR to something logical... */ - regs->ARM_cpsr &= PSR_f | PSR_s | (PSR_x & ~PSR_A_BIT) | PSR_T_BIT | MODE32_BIT; + regs->ARM_cpsr &= PSR_f | PSR_s | PSR_x | PSR_T_BIT | MODE32_BIT; if (!(elf_hwcap & HWCAP_26BIT)) regs->ARM_cpsr |= USR_MODE; diff --git a/arch/arm/include/asm/unistd.h b/arch/arm/include/asm/unistd.h index dd2bf53000fe..d02cfb683487 100644 --- a/arch/arm/include/asm/unistd.h +++ b/arch/arm/include/asm/unistd.h @@ -392,6 +392,7 @@ #define __NR_rt_tgsigqueueinfo (__NR_SYSCALL_BASE+363) #define __NR_perf_event_open (__NR_SYSCALL_BASE+364) #define __NR_recvmmsg (__NR_SYSCALL_BASE+365) +#define __NR_accept4 (__NR_SYSCALL_BASE+366) /* * The following SWIs are ARM private. diff --git a/arch/arm/kernel/calls.S b/arch/arm/kernel/calls.S index 37ae301cc47c..afeb71fa72cb 100644 --- a/arch/arm/kernel/calls.S +++ b/arch/arm/kernel/calls.S @@ -375,6 +375,7 @@ CALL(sys_rt_tgsigqueueinfo) CALL(sys_perf_event_open) /* 365 */ CALL(sys_recvmmsg) + CALL(sys_accept4) #ifndef syscalls_counted .equ syscalls_padding, ((NR_syscalls + 3) & ~3) - NR_syscalls #define syscalls_counted diff --git a/arch/arm/kernel/etm.c b/arch/arm/kernel/etm.c index 56418f98cd01..33c7077174db 100644 --- a/arch/arm/kernel/etm.c +++ b/arch/arm/kernel/etm.c @@ -230,7 +230,7 @@ static void etm_dump(void) etb_lock(t); } -static void sysrq_etm_dump(int key, struct tty_struct *tty) +static void sysrq_etm_dump(int key) { dev_dbg(tracer.dev, "Dumping ETB buffer\n"); etm_dump(); diff --git a/arch/arm/kernel/kgdb.c b/arch/arm/kernel/kgdb.c index 778c2f7024ff..d6e8b4d2e60d 100644 --- a/arch/arm/kernel/kgdb.c +++ b/arch/arm/kernel/kgdb.c @@ -79,7 +79,7 @@ sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *task) return; /* Initialize to zero */ - for (regno = 0; regno < GDB_MAX_REGS; regno++) + for (regno = 0; regno < DBG_MAX_REG_NUM; regno++) gdb_regs[regno] = 0; /* Otherwise, we have only some registers from switch_to() */ diff --git a/arch/arm/kernel/sys_arm.c b/arch/arm/kernel/sys_arm.c index c23501842b98..62e7c61d0342 100644 --- a/arch/arm/kernel/sys_arm.c +++ b/arch/arm/kernel/sys_arm.c @@ -62,8 +62,9 @@ asmlinkage int sys_vfork(struct pt_regs *regs) /* sys_execve() executes a new program. * This is called indirectly via a small wrapper */ -asmlinkage int sys_execve(char __user *filenamei, char __user * __user *argv, - char __user * __user *envp, struct pt_regs *regs) +asmlinkage int sys_execve(const char __user *filenamei, + const char __user *const __user *argv, + const char __user *const __user *envp, struct pt_regs *regs) { int error; char * filename; @@ -78,14 +79,17 @@ out: return error; } -int kernel_execve(const char *filename, char *const argv[], char *const envp[]) +int kernel_execve(const char *filename, + const char *const argv[], + const char *const envp[]) { struct pt_regs regs; int ret; memset(®s, 0, sizeof(struct pt_regs)); - ret = do_execve((char *)filename, (char __user * __user *)argv, - (char __user * __user *)envp, ®s); + ret = do_execve(filename, + (const char __user *const __user *)argv, + (const char __user *const __user *)envp, ®s); if (ret < 0) goto out; diff --git a/arch/arm/kernel/sys_oabi-compat.c b/arch/arm/kernel/sys_oabi-compat.c index 33ff678e32f2..4ad8da15ef2b 100644 --- a/arch/arm/kernel/sys_oabi-compat.c +++ b/arch/arm/kernel/sys_oabi-compat.c @@ -141,7 +141,7 @@ static long cp_oldabi_stat64(struct kstat *stat, return copy_to_user(statbuf,&tmp,sizeof(tmp)) ? -EFAULT : 0; } -asmlinkage long sys_oabi_stat64(char __user * filename, +asmlinkage long sys_oabi_stat64(const char __user * filename, struct oldabi_stat64 __user * statbuf) { struct kstat stat; @@ -151,7 +151,7 @@ asmlinkage long sys_oabi_stat64(char __user * filename, return error; } -asmlinkage long sys_oabi_lstat64(char __user * filename, +asmlinkage long sys_oabi_lstat64(const char __user * filename, struct oldabi_stat64 __user * statbuf) { struct kstat stat; @@ -172,7 +172,7 @@ asmlinkage long sys_oabi_fstat64(unsigned long fd, } asmlinkage long sys_oabi_fstatat64(int dfd, - char __user *filename, + const char __user *filename, struct oldabi_stat64 __user *statbuf, int flag) { diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c index 575ff1ae85a7..339150ab0ea5 100644 --- a/arch/arm/mach-imx/mach-cpuimx27.c +++ b/arch/arm/mach-imx/mach-cpuimx27.c @@ -279,13 +279,13 @@ static void __init eukrea_cpuimx27_init(void) #if defined(CONFIG_USB_ULPI) if (otg_mode_host) { otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, - USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); + ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); mxc_register_device(&mxc_otg_host, &otg_pdata); } usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, - USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); + ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); mxc_register_device(&mxc_usbh2, &usbh2_pdata); #endif diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c index a389d1148f18..23c9e1f37b9c 100644 --- a/arch/arm/mach-imx/mach-pca100.c +++ b/arch/arm/mach-imx/mach-pca100.c @@ -419,13 +419,13 @@ static void __init pca100_init(void) #if defined(CONFIG_USB_ULPI) if (otg_mode_host) { otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, - USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); + ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); mxc_register_device(&mxc_otg_host, &otg_pdata); } usbh2_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, - USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); + ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); mxc_register_device(&mxc_usbh2, &usbh2_pdata); #endif diff --git a/arch/arm/mach-ixp4xx/ixdp425-setup.c b/arch/arm/mach-ixp4xx/ixdp425-setup.c index 827cbc4402f4..ea9ee4ed0a3e 100644 --- a/arch/arm/mach-ixp4xx/ixdp425-setup.c +++ b/arch/arm/mach-ixp4xx/ixdp425-setup.c @@ -100,6 +100,7 @@ ixdp425_flash_nand_cmd_ctrl(struct mtd_info *mtd, int cmd, unsigned int ctrl) static struct platform_nand_data ixdp425_flash_nand_data = { .chip = { + .nr_chips = 1, .chip_delay = 30, .options = NAND_NO_AUTOINCR, #ifdef CONFIG_MTD_PARTITIONS diff --git a/arch/arm/mach-mx25/mach-cpuimx25.c b/arch/arm/mach-mx25/mach-cpuimx25.c index 56b2e26d23b4..a5f0174290b4 100644 --- a/arch/arm/mach-mx25/mach-cpuimx25.c +++ b/arch/arm/mach-mx25/mach-cpuimx25.c @@ -138,7 +138,7 @@ static void __init eukrea_cpuimx25_init(void) #if defined(CONFIG_USB_ULPI) if (otg_mode_host) { otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, - USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); + ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); mxc_register_device(&mxc_otg, &otg_pdata); } diff --git a/arch/arm/mach-mx3/mach-cpuimx35.c b/arch/arm/mach-mx3/mach-cpuimx35.c index 63f970f340a2..9770a6a973be 100644 --- a/arch/arm/mach-mx3/mach-cpuimx35.c +++ b/arch/arm/mach-mx3/mach-cpuimx35.c @@ -192,7 +192,7 @@ static void __init mxc_board_init(void) #if defined(CONFIG_USB_ULPI) if (otg_mode_host) { otg_pdata.otg = otg_ulpi_create(&mxc_ulpi_access_ops, - USB_OTG_DRV_VBUS | USB_OTG_DRV_VBUS_EXT); + ULPI_OTG_DRVVBUS | ULPI_OTG_DRVVBUS_EXT); mxc_register_device(&mxc_otg_host, &otg_pdata); } diff --git a/arch/arm/mach-mx3/mach-qong.c b/arch/arm/mach-mx3/mach-qong.c index d44ac70222a5..c8c380eef74c 100644 --- a/arch/arm/mach-mx3/mach-qong.c +++ b/arch/arm/mach-mx3/mach-qong.c @@ -165,6 +165,7 @@ static void qong_nand_select_chip(struct mtd_info *mtd, int chip) static struct platform_nand_data qong_nand_data = { .chip = { + .nr_chips = 1, .chip_delay = 20, .options = 0, }, diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile index 63b2d8859c3c..88d3a1e920f5 100644 --- a/arch/arm/mach-omap2/Makefile +++ b/arch/arm/mach-omap2/Makefile @@ -25,6 +25,7 @@ obj-$(CONFIG_LOCAL_TIMERS) += timer-mpu.o obj-$(CONFIG_HOTPLUG_CPU) += omap-hotplug.o obj-$(CONFIG_ARCH_OMAP4) += omap44xx-smc.o omap4-common.o +AFLAGS_omap-headsmp.o :=-Wa,-march=armv7-a AFLAGS_omap44xx-smc.o :=-Wa,-march=armv7-a # Functions loaded to SRAM diff --git a/arch/arm/mach-omap2/clock3xxx_data.c b/arch/arm/mach-omap2/clock3xxx_data.c index 138646deac89..dfdce2d82779 100644 --- a/arch/arm/mach-omap2/clock3xxx_data.c +++ b/arch/arm/mach-omap2/clock3xxx_data.c @@ -3417,7 +3417,13 @@ int __init omap3xxx_clk_init(void) struct omap_clk *c; u32 cpu_clkflg = CK_3XXX; - if (cpu_is_omap34xx()) { + if (cpu_is_omap3517()) { + cpu_mask = RATE_IN_3XXX | RATE_IN_3430ES2PLUS; + cpu_clkflg |= CK_3517; + } else if (cpu_is_omap3505()) { + cpu_mask = RATE_IN_3XXX | RATE_IN_3430ES2PLUS; + cpu_clkflg |= CK_3505; + } else if (cpu_is_omap34xx()) { cpu_mask = RATE_IN_3XXX; cpu_clkflg |= CK_343X; @@ -3432,12 +3438,6 @@ int __init omap3xxx_clk_init(void) cpu_mask |= RATE_IN_3430ES2PLUS; cpu_clkflg |= CK_3430ES2; } - } else if (cpu_is_omap3517()) { - cpu_mask = RATE_IN_3XXX | RATE_IN_3430ES2PLUS; - cpu_clkflg |= CK_3517; - } else if (cpu_is_omap3505()) { - cpu_mask = RATE_IN_3XXX | RATE_IN_3430ES2PLUS; - cpu_clkflg |= CK_3505; } if (omap3_has_192mhz_clk()) diff --git a/arch/arm/mach-omap2/id.c b/arch/arm/mach-omap2/id.c index e8256a2ed8e7..9a879f959509 100644 --- a/arch/arm/mach-omap2/id.c +++ b/arch/arm/mach-omap2/id.c @@ -284,8 +284,8 @@ static void __init omap3_check_revision(void) default: omap_revision = OMAP3630_REV_ES1_2; omap_chip.oc |= CHIP_IS_OMAP3630ES1_2; - break; } + break; default: /* Unknown default to latest silicon rev as default*/ omap_revision = OMAP3630_REV_ES1_2; diff --git a/arch/arm/mach-omap2/include/mach/entry-macro.S b/arch/arm/mach-omap2/include/mach/entry-macro.S index 50fd74916643..06e64e1fc28a 100644 --- a/arch/arm/mach-omap2/include/mach/entry-macro.S +++ b/arch/arm/mach-omap2/include/mach/entry-macro.S @@ -177,7 +177,10 @@ omap_irq_base: .word 0 cmpne \irqnr, \tmp cmpcs \irqnr, \irqnr .endm +#endif +#endif /* MULTI_OMAP2 */ +#ifdef CONFIG_SMP /* We assume that irqstat (the raw value of the IRQ acknowledge * register) is preserved from the macro above. * If there is an IPI, we immediately signal end of interrupt @@ -205,8 +208,7 @@ omap_irq_base: .word 0 streq \irqstat, [\base, #GIC_CPU_EOI] cmp \tmp, #0 .endm -#endif -#endif /* MULTI_OMAP2 */ +#endif /* CONFIG_SMP */ .macro irq_prio_table .endm diff --git a/arch/arm/mach-omap2/omap-smp.c b/arch/arm/mach-omap2/omap-smp.c index af3c20c8d3f9..9e9f70e18e3c 100644 --- a/arch/arm/mach-omap2/omap-smp.c +++ b/arch/arm/mach-omap2/omap-smp.c @@ -102,8 +102,7 @@ static void __init wakeup_secondary(void) * Send a 'sev' to wake the secondary core from WFE. * Drain the outstanding writes to memory */ - dsb(); - set_event(); + dsb_sev(); mb(); } diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index fb4994ad622e..7b03426c72a3 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -480,7 +480,9 @@ void omap_sram_idle(void) } /* Disable IO-PAD and IO-CHAIN wakeup */ - if (omap3_has_io_wakeup() && core_next_state < PWRDM_POWER_ON) { + if (omap3_has_io_wakeup() && + (per_next_state < PWRDM_POWER_ON || + core_next_state < PWRDM_POWER_ON)) { prm_clear_mod_reg_bits(OMAP3430_EN_IO_MASK, WKUP_MOD, PM_WKEN); omap3_disable_io_chain(); } diff --git a/arch/arm/mach-orion5x/ts78xx-setup.c b/arch/arm/mach-orion5x/ts78xx-setup.c index 5041d1bc26b1..696b1a97f9e2 100644 --- a/arch/arm/mach-orion5x/ts78xx-setup.c +++ b/arch/arm/mach-orion5x/ts78xx-setup.c @@ -216,6 +216,7 @@ static struct mtd_partition ts78xx_ts_nand_parts[] = { static struct platform_nand_data ts78xx_ts_nand_data = { .chip = { + .nr_chips = 1, .part_probe_types = ts_nand_part_probes, .partitions = ts78xx_ts_nand_parts, .nr_partitions = ARRAY_SIZE(ts78xx_ts_nand_parts), diff --git a/arch/arm/mach-s3c2410/include/mach/vmalloc.h b/arch/arm/mach-s3c2410/include/mach/vmalloc.h index 315b0078a34d..54297eb0bf5e 100644 --- a/arch/arm/mach-s3c2410/include/mach/vmalloc.h +++ b/arch/arm/mach-s3c2410/include/mach/vmalloc.h @@ -15,6 +15,6 @@ #ifndef __ASM_ARCH_VMALLOC_H #define __ASM_ARCH_VMALLOC_H -#define VMALLOC_END (0xE0000000) +#define VMALLOC_END 0xE0000000UL #endif /* __ASM_ARCH_VMALLOC_H */ diff --git a/arch/arm/mach-s3c64xx/Kconfig b/arch/arm/mach-s3c64xx/Kconfig index 071e8a1e0765..1e4d78af7d84 100644 --- a/arch/arm/mach-s3c64xx/Kconfig +++ b/arch/arm/mach-s3c64xx/Kconfig @@ -98,6 +98,15 @@ config MACH_ANW6410 help Machine support for the A&W6410 +config MACH_REAL6410 + bool "REAL6410" + select CPU_S3C6410 + select S3C_DEV_HSMMC + select S3C_DEV_HSMMC1 + select S3C64XX_SETUP_SDHCI + help + Machine support for the CoreWind REAL6410 + config MACH_SMDK6410 bool "SMDK6410" select CPU_S3C6410 diff --git a/arch/arm/mach-s3c64xx/Makefile b/arch/arm/mach-s3c64xx/Makefile index 48d3dfac8dd7..90221a2e0c55 100644 --- a/arch/arm/mach-s3c64xx/Makefile +++ b/arch/arm/mach-s3c64xx/Makefile @@ -52,6 +52,7 @@ obj-$(CONFIG_PM) += irq-pm.o obj-$(CONFIG_MACH_ANW6410) += mach-anw6410.o obj-$(CONFIG_MACH_SMDK6400) += mach-smdk6400.o obj-$(CONFIG_MACH_SMDK6410) += mach-smdk6410.o +obj-$(CONFIG_MACH_REAL6410) += mach-real6410.o obj-$(CONFIG_MACH_NCP) += mach-ncp.o obj-$(CONFIG_MACH_HMT) += mach-hmt.o obj-$(CONFIG_MACH_SMARTQ) += mach-smartq.o diff --git a/arch/arm/mach-s3c64xx/dma.c b/arch/arm/mach-s3c64xx/dma.c index 5567e037b0d1..e7d03ab41d80 100644 --- a/arch/arm/mach-s3c64xx/dma.c +++ b/arch/arm/mach-s3c64xx/dma.c @@ -697,7 +697,7 @@ static int s3c64xx_dma_init1(int chno, enum dma_ch chbase, chptr->number = chno; chptr->dmac = dmac; chptr->regs = regptr; - regptr += PL008_Cx_STRIDE; + regptr += PL080_Cx_STRIDE; } /* for the moment, permanently enable the controller */ diff --git a/arch/arm/mach-s3c64xx/include/mach/memory.h b/arch/arm/mach-s3c64xx/include/mach/memory.h index a3ac84a65480..42cc54e2ee30 100644 --- a/arch/arm/mach-s3c64xx/include/mach/memory.h +++ b/arch/arm/mach-s3c64xx/include/mach/memory.h @@ -15,4 +15,6 @@ #define PHYS_OFFSET UL(0x50000000) +#define CONSISTENT_DMA_SIZE SZ_8M + #endif diff --git a/arch/arm/mach-s3c64xx/include/mach/vmalloc.h b/arch/arm/mach-s3c64xx/include/mach/vmalloc.h index 7411ef3711a6..bc0e91389864 100644 --- a/arch/arm/mach-s3c64xx/include/mach/vmalloc.h +++ b/arch/arm/mach-s3c64xx/include/mach/vmalloc.h @@ -15,6 +15,6 @@ #ifndef __ASM_ARCH_VMALLOC_H #define __ASM_ARCH_VMALLOC_H -#define VMALLOC_END (0xE0000000) +#define VMALLOC_END 0xE0000000UL #endif /* __ASM_ARCH_VMALLOC_H */ diff --git a/arch/arm/mach-s3c64xx/mach-real6410.c b/arch/arm/mach-s3c64xx/mach-real6410.c new file mode 100644 index 000000000000..5c07d013b23d --- /dev/null +++ b/arch/arm/mach-s3c64xx/mach-real6410.c @@ -0,0 +1,152 @@ +/* linux/arch/arm/mach-s3c64xx/mach-real6410.c + * + * Copyright 2010 Darius Augulis <augulis.darius@gmail.com> + * Copyright 2008 Openmoko, Inc. + * Copyright 2008 Simtec Electronics + * Ben Dooks <ben@simtec.co.uk> + * http://armlinux.simtec.co.uk/ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * +*/ + +#include <linux/kernel.h> +#include <linux/types.h> +#include <linux/interrupt.h> +#include <linux/list.h> +#include <linux/init.h> +#include <linux/dm9000.h> +#include <linux/serial_core.h> +#include <linux/platform_device.h> +#include <asm/mach-types.h> +#include <asm/mach/arch.h> +#include <asm/mach/map.h> +#include <mach/map.h> +#include <mach/s3c6410.h> +#include <mach/regs-srom.h> +#include <plat/cpu.h> +#include <plat/devs.h> +#include <plat/regs-serial.h> + +#define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK +#define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB +#define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE + +static struct s3c2410_uartcfg real6410_uartcfgs[] __initdata = { + [0] = { + .hwport = 0, + .flags = 0, + .ucon = UCON, + .ulcon = ULCON, + .ufcon = UFCON, + }, + [1] = { + .hwport = 1, + .flags = 0, + .ucon = UCON, + .ulcon = ULCON, + .ufcon = UFCON, + }, + [2] = { + .hwport = 2, + .flags = 0, + .ucon = UCON, + .ulcon = ULCON, + .ufcon = UFCON, + }, + [3] = { + .hwport = 3, + .flags = 0, + .ucon = UCON, + .ulcon = ULCON, + .ufcon = UFCON, + }, +}; + +/* DM9000AEP 10/100 ethernet controller */ + +static struct resource real6410_dm9k_resource[] = { + [0] = { + .start = S3C64XX_PA_XM0CSN1, + .end = S3C64XX_PA_XM0CSN1 + 1, + .flags = IORESOURCE_MEM + }, + [1] = { + .start = S3C64XX_PA_XM0CSN1 + 4, + .end = S3C64XX_PA_XM0CSN1 + 5, + .flags = IORESOURCE_MEM + }, + [2] = { + .start = S3C_EINT(7), + .end = S3C_EINT(7), + .flags = IORESOURCE_IRQ, + } +}; + +static struct dm9000_plat_data real6410_dm9k_pdata = { + .flags = (DM9000_PLATF_16BITONLY | DM9000_PLATF_NO_EEPROM), +}; + +static struct platform_device real6410_device_eth = { + .name = "dm9000", + .id = -1, + .num_resources = ARRAY_SIZE(real6410_dm9k_resource), + .resource = real6410_dm9k_resource, + .dev = { + .platform_data = &real6410_dm9k_pdata, + }, +}; + +static struct platform_device *real6410_devices[] __initdata = { + &real6410_device_eth, + &s3c_device_hsmmc0, + &s3c_device_hsmmc1, +}; + +static void __init real6410_map_io(void) +{ + s3c64xx_init_io(NULL, 0); + s3c24xx_init_clocks(12000000); + s3c24xx_init_uarts(real6410_uartcfgs, ARRAY_SIZE(real6410_uartcfgs)); +} + +static void __init real6410_machine_init(void) +{ + u32 cs1; + + /* configure nCS1 width to 16 bits */ + + cs1 = __raw_readl(S3C64XX_SROM_BW) & + ~(S3C64XX_SROM_BW__CS_MASK << S3C64XX_SROM_BW__NCS1__SHIFT); + cs1 |= ((1 << S3C64XX_SROM_BW__DATAWIDTH__SHIFT) | + (1 << S3C64XX_SROM_BW__WAITENABLE__SHIFT) | + (1 << S3C64XX_SROM_BW__BYTEENABLE__SHIFT)) << + S3C64XX_SROM_BW__NCS1__SHIFT; + __raw_writel(cs1, S3C64XX_SROM_BW); + + /* set timing for nCS1 suitable for ethernet chip */ + + __raw_writel((0 << S3C64XX_SROM_BCX__PMC__SHIFT) | + (6 << S3C64XX_SROM_BCX__TACP__SHIFT) | + (4 << S3C64XX_SROM_BCX__TCAH__SHIFT) | + (1 << S3C64XX_SROM_BCX__TCOH__SHIFT) | + (13 << S3C64XX_SROM_BCX__TACC__SHIFT) | + (4 << S3C64XX_SROM_BCX__TCOS__SHIFT) | + (0 << S3C64XX_SROM_BCX__TACS__SHIFT), S3C64XX_SROM_BC1); + + platform_add_devices(real6410_devices, ARRAY_SIZE(real6410_devices)); +} + +MACHINE_START(REAL6410, "REAL6410") + /* Maintainer: Darius Augulis <augulis.darius@gmail.com> */ + .phys_io = S3C_PA_UART & 0xfff00000, + .io_pg_offst = (((u32)S3C_VA_UART) >> 18) & 0xfffc, + .boot_params = S3C64XX_PA_SDRAM + 0x100, + + .init_irq = s3c6410_init_irq, + .map_io = real6410_map_io, + .init_machine = real6410_machine_init, + .timer = &s3c24xx_timer, +MACHINE_END diff --git a/arch/arm/mach-s3c64xx/mach-smartq.c b/arch/arm/mach-s3c64xx/mach-smartq.c index 028d080dcd35..3a9639bc3d9b 100644 --- a/arch/arm/mach-s3c64xx/mach-smartq.c +++ b/arch/arm/mach-s3c64xx/mach-smartq.c @@ -16,6 +16,7 @@ #include <linux/platform_device.h> #include <linux/pwm_backlight.h> #include <linux/serial_core.h> +#include <linux/spi/spi_gpio.h> #include <linux/usb/gpio_vbus.h> #include <asm/mach-types.h> @@ -166,7 +167,7 @@ static struct s3c2410_ts_mach_info smartq_touchscreen_pdata __initdata = { static struct s3c_sdhci_platdata smartq_internal_hsmmc_pdata = { .max_width = 4, - /*.broken_card_detection = true,*/ + .cd_type = S3C_SDHCI_CD_PERMANENT, }; static struct s3c_hwmon_pdata smartq_hwmon_pdata __initdata = { @@ -184,6 +185,33 @@ static struct s3c_hwmon_pdata smartq_hwmon_pdata __initdata = { }, }; +static int __init smartq_lcd_setup_gpio(void) +{ + int ret; + + ret = gpio_request(S3C64XX_GPM(3), "LCD power"); + if (ret < 0) + return ret; + + /* turn power off */ + gpio_direction_output(S3C64XX_GPM(3), 0); + + return 0; +} + +/* GPM0 -> CS */ +static struct spi_gpio_platform_data smartq_lcd_control = { + .sck = S3C64XX_GPM(1), + .mosi = S3C64XX_GPM(2), + .miso = S3C64XX_GPM(2), +}; + +static struct platform_device smartq_lcd_control_device = { + .name = "spi-gpio", + .id = 1, + .dev.platform_data = &smartq_lcd_control, +}; + static void smartq_lcd_power_set(struct plat_lcd_data *pd, unsigned int power) { gpio_direction_output(S3C64XX_GPM(3), power); @@ -199,6 +227,9 @@ static struct platform_device smartq_lcd_power_device = { .dev.platform_data = &smartq_lcd_power_data, }; +static struct i2c_board_info smartq_i2c_devs[] __initdata = { + { I2C_BOARD_INFO("wm8987", 0x1a), }, +}; static struct platform_device *smartq_devices[] __initdata = { &s3c_device_hsmmc1, /* Init iNAND first, ... */ @@ -213,7 +244,9 @@ static struct platform_device *smartq_devices[] __initdata = { &s3c_device_timer[1], &s3c_device_ts, &s3c_device_usb_hsotg, + &s3c64xx_device_iis0, &smartq_backlight_device, + &smartq_lcd_control_device, &smartq_lcd_power_device, &smartq_usb_otg_vbus_dev, }; @@ -252,7 +285,6 @@ static int __init smartq_power_off_init(void) /* leave power on */ gpio_direction_output(S3C64XX_GPK(15), 0); - pm_power_off = smartq_power_off; return ret; @@ -354,6 +386,10 @@ void __init smartq_machine_init(void) s3c_sdhci2_set_platdata(&smartq_internal_hsmmc_pdata); s3c24xx_ts_set_platdata(&smartq_touchscreen_pdata); + i2c_register_board_info(0, smartq_i2c_devs, + ARRAY_SIZE(smartq_i2c_devs)); + + WARN_ON(smartq_lcd_setup_gpio()); WARN_ON(smartq_power_off_init()); WARN_ON(smartq_usb_host_init()); WARN_ON(smartq_usb_otg_init()); diff --git a/arch/arm/mach-s3c64xx/mach-smartq5.c b/arch/arm/mach-s3c64xx/mach-smartq5.c index a065062ec2a4..a4d59b076e3d 100644 --- a/arch/arm/mach-s3c64xx/mach-smartq5.c +++ b/arch/arm/mach-s3c64xx/mach-smartq5.c @@ -12,7 +12,6 @@ #include <linux/fb.h> #include <linux/gpio.h> #include <linux/gpio_keys.h> -#include <linux/i2c-gpio.h> #include <linux/init.h> #include <linux/input.h> #include <linux/leds.h> @@ -33,31 +32,6 @@ #include "mach-smartq.h" -static void __init smartq5_lcd_setup_gpio(void) -{ - gpio_request(S3C64XX_GPM(0), "LCD SCEN pin"); - gpio_request(S3C64XX_GPM(1), "LCD SCL pin"); - gpio_request(S3C64XX_GPM(2), "LCD SDA pin"); - gpio_request(S3C64XX_GPM(3), "LCD power"); - - /* turn power off */ - gpio_direction_output(S3C64XX_GPM(0), 1); - gpio_direction_input(S3C64XX_GPM(1)); - gpio_direction_input(S3C64XX_GPM(2)); - gpio_direction_output(S3C64XX_GPM(3), 0); -} - -static struct i2c_gpio_platform_data smartq5_lcd_control = { - .sda_pin = S3C64XX_GPM(2), - .scl_pin = S3C64XX_GPM(1), -}; - -static struct platform_device smartq5_lcd_control_device = { - .name = "i2c-gpio", - .id = 1, - .dev.platform_data = &smartq5_lcd_control, -}; - static struct gpio_led smartq5_leds[] __initdata = { { .name = "smartq5:green", @@ -134,10 +108,10 @@ static struct platform_device smartq5_buttons_device = { static struct s3c_fb_pd_win smartq5_fb_win0 = { .win_mode = { - .left_margin = 40, - .right_margin = 216, - .upper_margin = 10, - .lower_margin = 35, + .left_margin = 216, + .right_margin = 40, + .upper_margin = 35, + .lower_margin = 10, .hsync_len = 1, .vsync_len = 1, .xres = 800, @@ -159,7 +133,6 @@ static struct s3c_fb_platdata smartq5_lcd_pdata __initdata = { static struct platform_device *smartq5_devices[] __initdata = { &smartq5_leds_device, &smartq5_buttons_device, - &smartq5_lcd_control_device, }; static void __init smartq5_machine_init(void) @@ -167,7 +140,6 @@ static void __init smartq5_machine_init(void) s3c_fb_set_platdata(&smartq5_lcd_pdata); smartq_machine_init(); - smartq5_lcd_setup_gpio(); platform_add_devices(smartq5_devices, ARRAY_SIZE(smartq5_devices)); } diff --git a/arch/arm/mach-s3c64xx/mach-smartq7.c b/arch/arm/mach-s3c64xx/mach-smartq7.c index 0ecf45137546..e50a7d781732 100644 --- a/arch/arm/mach-s3c64xx/mach-smartq7.c +++ b/arch/arm/mach-s3c64xx/mach-smartq7.c @@ -12,7 +12,6 @@ #include <linux/fb.h> #include <linux/gpio.h> #include <linux/gpio_keys.h> -#include <linux/i2c-gpio.h> #include <linux/init.h> #include <linux/input.h> #include <linux/leds.h> @@ -33,31 +32,6 @@ #include "mach-smartq.h" -static void __init smartq7_lcd_setup_gpio(void) -{ - gpio_request(S3C64XX_GPM(0), "LCD CSB pin"); - gpio_request(S3C64XX_GPM(3), "LCD power"); - gpio_request(S3C64XX_GPM(4), "LCD power status"); - - /* turn power off */ - gpio_direction_output(S3C64XX_GPM(0), 1); - gpio_direction_output(S3C64XX_GPM(3), 0); - gpio_direction_input(S3C64XX_GPM(4)); -} - -static struct i2c_gpio_platform_data smartq7_lcd_control = { - .sda_pin = S3C64XX_GPM(2), - .scl_pin = S3C64XX_GPM(1), - .sda_is_open_drain = 1, - .scl_is_open_drain = 1, -}; - -static struct platform_device smartq7_lcd_control_device = { - .name = "i2c-gpio", - .id = 1, - .dev.platform_data = &smartq7_lcd_control, -}; - static struct gpio_led smartq7_leds[] __initdata = { { .name = "smartq7:red", @@ -175,7 +149,6 @@ static struct s3c_fb_platdata smartq7_lcd_pdata __initdata = { static struct platform_device *smartq7_devices[] __initdata = { &smartq7_leds_device, &smartq7_buttons_device, - &smartq7_lcd_control_device, }; static void __init smartq7_machine_init(void) @@ -183,7 +156,6 @@ static void __init smartq7_machine_init(void) s3c_fb_set_platdata(&smartq7_lcd_pdata); smartq_machine_init(); - smartq7_lcd_setup_gpio(); platform_add_devices(smartq7_devices, ARRAY_SIZE(smartq7_devices)); } diff --git a/arch/arm/mach-s3c64xx/mach-smdk6410.c b/arch/arm/mach-s3c64xx/mach-smdk6410.c index 2d43128f939f..d498219fff1b 100644 --- a/arch/arm/mach-s3c64xx/mach-smdk6410.c +++ b/arch/arm/mach-s3c64xx/mach-smdk6410.c @@ -155,6 +155,8 @@ static struct s3c_fb_pd_win smdk6410_fb_win0 = { }, .max_bpp = 32, .default_bpp = 16, + .virtual_y = 480 * 2, + .virtual_x = 800, }; /* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */ diff --git a/arch/arm/mach-s5p6440/include/mach/vmalloc.h b/arch/arm/mach-s5p6440/include/mach/vmalloc.h index 16df257b1dce..e3f0eebf5205 100644 --- a/arch/arm/mach-s5p6440/include/mach/vmalloc.h +++ b/arch/arm/mach-s5p6440/include/mach/vmalloc.h @@ -12,6 +12,6 @@ #ifndef __ASM_ARCH_VMALLOC_H #define __ASM_ARCH_VMALLOC_H -#define VMALLOC_END (0xE0000000) +#define VMALLOC_END 0xE0000000UL #endif /* __ASM_ARCH_VMALLOC_H */ diff --git a/arch/arm/mach-s5p6442/include/mach/vmalloc.h b/arch/arm/mach-s5p6442/include/mach/vmalloc.h index be3333688c20..f5c83f02c18e 100644 --- a/arch/arm/mach-s5p6442/include/mach/vmalloc.h +++ b/arch/arm/mach-s5p6442/include/mach/vmalloc.h @@ -12,6 +12,6 @@ #ifndef __ASM_ARCH_VMALLOC_H #define __ASM_ARCH_VMALLOC_H -#define VMALLOC_END (0xE0000000) +#define VMALLOC_END 0xE0000000UL #endif /* __ASM_ARCH_VMALLOC_H */ diff --git a/arch/arm/mach-s5pv210/include/mach/vmalloc.h b/arch/arm/mach-s5pv210/include/mach/vmalloc.h index 58f515e0747e..df9a28808323 100644 --- a/arch/arm/mach-s5pv210/include/mach/vmalloc.h +++ b/arch/arm/mach-s5pv210/include/mach/vmalloc.h @@ -17,6 +17,6 @@ #ifndef __ASM_ARCH_VMALLOC_H #define __ASM_ARCH_VMALLOC_H __FILE__ -#define VMALLOC_END (0xE0000000) +#define VMALLOC_END (0xE0000000UL) #endif /* __ASM_ARCH_VMALLOC_H */ diff --git a/arch/arm/mach-s5pv310/clock.c b/arch/arm/mach-s5pv310/clock.c index 77f2b4d85e6b..26a0f03df8ea 100644 --- a/arch/arm/mach-s5pv310/clock.c +++ b/arch/arm/mach-s5pv310/clock.c @@ -30,6 +30,16 @@ static struct clk clk_sclk_hdmi27m = { .rate = 27000000, }; +static int s5pv310_clksrc_mask_peril0_ctrl(struct clk *clk, int enable) +{ + return s5p_gatectrl(S5P_CLKSRC_MASK_PERIL0, clk, enable); +} + +static int s5pv310_clk_ip_peril_ctrl(struct clk *clk, int enable) +{ + return s5p_gatectrl(S5P_CLKGATE_IP_PERIL, clk, enable); +} + /* Core list of CMU_CPU side */ static struct clksrc_clk clk_mout_apll = { @@ -39,6 +49,14 @@ static struct clksrc_clk clk_mout_apll = { }, .sources = &clk_src_apll, .reg_src = { .reg = S5P_CLKSRC_CPU, .shift = 0, .size = 1 }, +}; + +static struct clksrc_clk clk_sclk_apll = { + .clk = { + .name = "sclk_apll", + .id = -1, + .parent = &clk_mout_apll.clk, + }, .reg_div = { .reg = S5P_CLKDIV_CPU, .shift = 24, .size = 3 }, }; @@ -61,7 +79,7 @@ static struct clksrc_clk clk_mout_mpll = { }; static struct clk *clkset_moutcore_list[] = { - [0] = &clk_mout_apll.clk, + [0] = &clk_sclk_apll.clk, [1] = &clk_mout_mpll.clk, }; @@ -154,7 +172,7 @@ static struct clksrc_clk clk_pclk_dbg = { static struct clk *clkset_corebus_list[] = { [0] = &clk_mout_mpll.clk, - [1] = &clk_mout_apll.clk, + [1] = &clk_sclk_apll.clk, }; static struct clksrc_sources clkset_mout_corebus = { @@ -220,7 +238,7 @@ static struct clksrc_clk clk_pclk_acp = { static struct clk *clkset_aclk_top_list[] = { [0] = &clk_mout_mpll.clk, - [1] = &clk_mout_apll.clk, + [1] = &clk_sclk_apll.clk, }; static struct clksrc_sources clkset_aclk_200 = { @@ -321,11 +339,6 @@ static struct clksrc_clk clk_sclk_vpll = { .reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 8, .size = 1 }, }; -static int s5pv310_clk_ip_peril_ctrl(struct clk *clk, int enable) -{ - return s5p_gatectrl(S5P_CLKGATE_IP_PERIL, clk, enable); -} - static struct clk init_clocks_disable[] = { { .name = "timers", @@ -337,7 +350,37 @@ static struct clk init_clocks_disable[] = { }; static struct clk init_clocks[] = { - /* Nothing here yet */ + { + .name = "uart", + .id = 0, + .enable = s5pv310_clk_ip_peril_ctrl, + .ctrlbit = (1 << 0), + }, { + .name = "uart", + .id = 1, + .enable = s5pv310_clk_ip_peril_ctrl, + .ctrlbit = (1 << 1), + }, { + .name = "uart", + .id = 2, + .enable = s5pv310_clk_ip_peril_ctrl, + .ctrlbit = (1 << 2), + }, { + .name = "uart", + .id = 3, + .enable = s5pv310_clk_ip_peril_ctrl, + .ctrlbit = (1 << 3), + }, { + .name = "uart", + .id = 4, + .enable = s5pv310_clk_ip_peril_ctrl, + .ctrlbit = (1 << 4), + }, { + .name = "uart", + .id = 5, + .enable = s5pv310_clk_ip_peril_ctrl, + .ctrlbit = (1 << 5), + } }; static struct clk *clkset_group_list[] = { @@ -359,8 +402,8 @@ static struct clksrc_clk clksrcs[] = { .clk = { .name = "uclk1", .id = 0, + .enable = s5pv310_clksrc_mask_peril0_ctrl, .ctrlbit = (1 << 0), - .enable = s5pv310_clk_ip_peril_ctrl, }, .sources = &clkset_group, .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 0, .size = 4 }, @@ -369,8 +412,8 @@ static struct clksrc_clk clksrcs[] = { .clk = { .name = "uclk1", .id = 1, - .enable = s5pv310_clk_ip_peril_ctrl, - .ctrlbit = (1 << 1), + .enable = s5pv310_clksrc_mask_peril0_ctrl, + .ctrlbit = (1 << 4), }, .sources = &clkset_group, .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 4, .size = 4 }, @@ -379,8 +422,8 @@ static struct clksrc_clk clksrcs[] = { .clk = { .name = "uclk1", .id = 2, - .enable = s5pv310_clk_ip_peril_ctrl, - .ctrlbit = (1 << 2), + .enable = s5pv310_clksrc_mask_peril0_ctrl, + .ctrlbit = (1 << 8), }, .sources = &clkset_group, .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 8, .size = 4 }, @@ -389,8 +432,8 @@ static struct clksrc_clk clksrcs[] = { .clk = { .name = "uclk1", .id = 3, - .enable = s5pv310_clk_ip_peril_ctrl, - .ctrlbit = (1 << 3), + .enable = s5pv310_clksrc_mask_peril0_ctrl, + .ctrlbit = (1 << 12), }, .sources = &clkset_group, .reg_src = { .reg = S5P_CLKSRC_PERIL0, .shift = 12, .size = 4 }, @@ -399,7 +442,7 @@ static struct clksrc_clk clksrcs[] = { .clk = { .name = "sclk_pwm", .id = -1, - .enable = s5pv310_clk_ip_peril_ctrl, + .enable = s5pv310_clksrc_mask_peril0_ctrl, .ctrlbit = (1 << 24), }, .sources = &clkset_group, @@ -411,6 +454,7 @@ static struct clksrc_clk clksrcs[] = { /* Clock initialization code */ static struct clksrc_clk *sysclks[] = { &clk_mout_apll, + &clk_sclk_apll, &clk_mout_epll, &clk_mout_mpll, &clk_moutcore, @@ -470,11 +514,11 @@ void __init_or_cpufreq s5pv310_setup_clocks(void) apll = s5p_get_pll45xx(xtal, __raw_readl(S5P_APLL_CON0), pll_4508); mpll = s5p_get_pll45xx(xtal, __raw_readl(S5P_MPLL_CON0), pll_4508); epll = s5p_get_pll46xx(xtal, __raw_readl(S5P_EPLL_CON0), - __raw_readl(S5P_EPLL_CON1), pll_4500); + __raw_readl(S5P_EPLL_CON1), pll_4600); vpllsrc = clk_get_rate(&clk_vpllsrc.clk); vpll = s5p_get_pll46xx(vpllsrc, __raw_readl(S5P_VPLL_CON0), - __raw_readl(S5P_VPLL_CON1), pll_4502); + __raw_readl(S5P_VPLL_CON1), pll_4650); clk_fout_apll.rate = apll; clk_fout_mpll.rate = mpll; diff --git a/arch/arm/mach-s5pv310/cpu.c b/arch/arm/mach-s5pv310/cpu.c index 196c9f12ed85..e5b261a99ab2 100644 --- a/arch/arm/mach-s5pv310/cpu.c +++ b/arch/arm/mach-s5pv310/cpu.c @@ -45,6 +45,16 @@ static struct map_desc s5pv310_iodesc[] __initdata = { .pfn = __phys_to_pfn(S5PV310_PA_L2CC), .length = SZ_4K, .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_SYSRAM, + .pfn = __phys_to_pfn(S5PV310_PA_SYSRAM), + .length = SZ_4K, + .type = MT_DEVICE, + }, { + .virtual = (unsigned long)S5P_VA_CMU, + .pfn = __phys_to_pfn(S5PV310_PA_CMU), + .length = SZ_128K, + .type = MT_DEVICE, }, }; diff --git a/arch/arm/mach-s5pv310/include/mach/irqs.h b/arch/arm/mach-s5pv310/include/mach/irqs.h index 56885ca3773c..4cdedda6e652 100644 --- a/arch/arm/mach-s5pv310/include/mach/irqs.h +++ b/arch/arm/mach-s5pv310/include/mach/irqs.h @@ -15,12 +15,14 @@ #include <plat/irqs.h> -/* Private Peripheral Interrupt */ +/* PPI: Private Peripheral Interrupt */ + #define IRQ_PPI(x) S5P_IRQ(x+16) #define IRQ_LOCALTIMER IRQ_PPI(13) -/* Shared Peripheral Interrupt */ +/* SPI: Shared Peripheral Interrupt */ + #define IRQ_SPI(x) S5P_IRQ(x+32) #define IRQ_EINT0 IRQ_SPI(40) @@ -36,7 +38,7 @@ #define IRQ_PCIE IRQ_SPI(50) #define IRQ_SYSTEM_TIMER IRQ_SPI(51) #define IRQ_MFC IRQ_SPI(52) -#define IRQ_WTD IRQ_SPI(53) +#define IRQ_WDT IRQ_SPI(53) #define IRQ_AUDIO_SS IRQ_SPI(54) #define IRQ_AC97 IRQ_SPI(55) #define IRQ_SPDIF IRQ_SPI(56) @@ -67,8 +69,9 @@ #define IRQ_IIC COMBINER_IRQ(27, 0) /* Set the default NR_IRQS */ + #define NR_IRQS COMBINER_IRQ(MAX_COMBINER_NR, 0) #define MAX_COMBINER_NR 39 -#endif /* ASM_ARCH_IRQS_H */ +#endif /* __ASM_ARCH_IRQS_H */ diff --git a/arch/arm/mach-s5pv310/include/mach/map.h b/arch/arm/mach-s5pv310/include/mach/map.h index 87697c9fca5b..213e1101a3b3 100644 --- a/arch/arm/mach-s5pv310/include/mach/map.h +++ b/arch/arm/mach-s5pv310/include/mach/map.h @@ -23,12 +23,16 @@ #include <plat/map-s5p.h> +#define S5PV310_PA_SYSRAM (0x02025000) + #define S5PV310_PA_CHIPID (0x10000000) #define S5P_PA_CHIPID S5PV310_PA_CHIPID #define S5PV310_PA_SYSCON (0x10020000) #define S5P_PA_SYSCON S5PV310_PA_SYSCON +#define S5PV310_PA_CMU (0x10030000) + #define S5PV310_PA_WATCHDOG (0x10060000) #define S5PV310_PA_COMBINER (0x10448000) @@ -39,8 +43,12 @@ #define S5PV310_PA_GIC_DIST (0x10501000) #define S5PV310_PA_L2CC (0x10502000) -#define S5PV310_PA_GPIO (0x11000000) -#define S5P_PA_GPIO S5PV310_PA_GPIO +#define S5PV310_PA_GPIO1 (0x11400000) +#define S5PV310_PA_GPIO2 (0x11000000) +#define S5PV310_PA_GPIO3 (0x03860000) +#define S5P_PA_GPIO S5PV310_PA_GPIO1 + +#define S5PV310_PA_HSMMC(x) (0x12510000 + ((x) * 0x10000)) #define S5PV310_PA_UART (0x13800000) @@ -63,6 +71,10 @@ /* compatibiltiy defines. */ #define S3C_PA_UART S5PV310_PA_UART +#define S3C_PA_HSMMC0 S5PV310_PA_HSMMC(0) +#define S3C_PA_HSMMC1 S5PV310_PA_HSMMC(1) +#define S3C_PA_HSMMC2 S5PV310_PA_HSMMC(2) +#define S3C_PA_HSMMC3 S5PV310_PA_HSMMC(3) #define S3C_PA_IIC S5PV310_PA_IIC0 #define S3C_PA_WDT S5PV310_PA_WATCHDOG diff --git a/arch/arm/mach-s5pv310/include/mach/regs-clock.h b/arch/arm/mach-s5pv310/include/mach/regs-clock.h index 59e3a7e94d80..4013553cd9be 100644 --- a/arch/arm/mach-s5pv310/include/mach/regs-clock.h +++ b/arch/arm/mach-s5pv310/include/mach/regs-clock.h @@ -15,48 +15,49 @@ #include <mach/map.h> -#define S5P_CLKREG(x) (S3C_VA_SYS + (x)) +#define S5P_CLKREG(x) (S5P_VA_CMU + (x)) #define S5P_INFORM0 S5P_CLKREG(0x800) -#define S5P_EPLL_CON0 S5P_CLKREG(0x1C110) -#define S5P_EPLL_CON1 S5P_CLKREG(0x1C114) -#define S5P_VPLL_CON0 S5P_CLKREG(0x1C120) -#define S5P_VPLL_CON1 S5P_CLKREG(0x1C124) +#define S5P_EPLL_CON0 S5P_CLKREG(0x0C110) +#define S5P_EPLL_CON1 S5P_CLKREG(0x0C114) +#define S5P_VPLL_CON0 S5P_CLKREG(0x0C120) +#define S5P_VPLL_CON1 S5P_CLKREG(0x0C124) -#define S5P_CLKSRC_TOP0 S5P_CLKREG(0x1C210) -#define S5P_CLKSRC_TOP1 S5P_CLKREG(0x1C214) +#define S5P_CLKSRC_TOP0 S5P_CLKREG(0x0C210) +#define S5P_CLKSRC_TOP1 S5P_CLKREG(0x0C214) -#define S5P_CLKSRC_PERIL0 S5P_CLKREG(0x1C250) +#define S5P_CLKSRC_PERIL0 S5P_CLKREG(0x0C250) -#define S5P_CLKDIV_TOP S5P_CLKREG(0x1C510) +#define S5P_CLKDIV_TOP S5P_CLKREG(0x0C510) -#define S5P_CLKDIV_PERIL0 S5P_CLKREG(0x1C550) -#define S5P_CLKDIV_PERIL1 S5P_CLKREG(0x1C554) -#define S5P_CLKDIV_PERIL2 S5P_CLKREG(0x1C558) -#define S5P_CLKDIV_PERIL3 S5P_CLKREG(0x1C55C) -#define S5P_CLKDIV_PERIL4 S5P_CLKREG(0x1C560) -#define S5P_CLKDIV_PERIL5 S5P_CLKREG(0x1C564) +#define S5P_CLKDIV_PERIL0 S5P_CLKREG(0x0C550) +#define S5P_CLKDIV_PERIL1 S5P_CLKREG(0x0C554) +#define S5P_CLKDIV_PERIL2 S5P_CLKREG(0x0C558) +#define S5P_CLKDIV_PERIL3 S5P_CLKREG(0x0C55C) +#define S5P_CLKDIV_PERIL4 S5P_CLKREG(0x0C560) +#define S5P_CLKDIV_PERIL5 S5P_CLKREG(0x0C564) -#define S5P_CLKGATE_IP_PERIL S5P_CLKREG(0x1C950) +#define S5P_CLKSRC_MASK_PERIL0 S5P_CLKREG(0x0C350) -#define S5P_CLKSRC_CORE S5P_CLKREG(0x20200) +#define S5P_CLKGATE_IP_PERIL S5P_CLKREG(0x0C950) -#define S5P_CLKDIV_CORE0 S5P_CLKREG(0x20500) +#define S5P_CLKSRC_CORE S5P_CLKREG(0x10200) +#define S5P_CLKDIV_CORE0 S5P_CLKREG(0x10500) -#define S5P_APLL_LOCK S5P_CLKREG(0x24000) -#define S5P_MPLL_LOCK S5P_CLKREG(0x24004) -#define S5P_APLL_CON0 S5P_CLKREG(0x24100) -#define S5P_APLL_CON1 S5P_CLKREG(0x24104) -#define S5P_MPLL_CON0 S5P_CLKREG(0x24108) -#define S5P_MPLL_CON1 S5P_CLKREG(0x2410C) +#define S5P_APLL_LOCK S5P_CLKREG(0x14000) +#define S5P_MPLL_LOCK S5P_CLKREG(0x14004) +#define S5P_APLL_CON0 S5P_CLKREG(0x14100) +#define S5P_APLL_CON1 S5P_CLKREG(0x14104) +#define S5P_MPLL_CON0 S5P_CLKREG(0x14108) +#define S5P_MPLL_CON1 S5P_CLKREG(0x1410C) -#define S5P_CLKSRC_CPU S5P_CLKREG(0x24200) -#define S5P_CLKMUX_STATCPU S5P_CLKREG(0x24400) +#define S5P_CLKSRC_CPU S5P_CLKREG(0x14200) +#define S5P_CLKMUX_STATCPU S5P_CLKREG(0x14400) -#define S5P_CLKDIV_CPU S5P_CLKREG(0x24500) -#define S5P_CLKDIV_STATCPU S5P_CLKREG(0x24600) +#define S5P_CLKDIV_CPU S5P_CLKREG(0x14500) +#define S5P_CLKDIV_STATCPU S5P_CLKREG(0x14600) -#define S5P_CLKGATE_SCLKCPU S5P_CLKREG(0x24800) +#define S5P_CLKGATE_SCLKCPU S5P_CLKREG(0x14800) #endif /* __ASM_ARCH_REGS_CLOCK_H */ diff --git a/arch/arm/mach-s5pv310/include/mach/vmalloc.h b/arch/arm/mach-s5pv310/include/mach/vmalloc.h index 3f565ebb7daa..256f221edf3a 100644 --- a/arch/arm/mach-s5pv310/include/mach/vmalloc.h +++ b/arch/arm/mach-s5pv310/include/mach/vmalloc.h @@ -17,6 +17,6 @@ #ifndef __ASM_ARCH_VMALLOC_H #define __ASM_ARCH_VMALLOC_H __FILE__ -#define VMALLOC_END (0xF0000000) +#define VMALLOC_END (0xF0000000UL) #endif /* __ASM_ARCH_VMALLOC_H */ diff --git a/arch/arm/mach-s5pv310/platsmp.c b/arch/arm/mach-s5pv310/platsmp.c index fe9469abd006..d357c198edee 100644 --- a/arch/arm/mach-s5pv310/platsmp.c +++ b/arch/arm/mach-s5pv310/platsmp.c @@ -187,6 +187,6 @@ void __init smp_prepare_cpus(unsigned int max_cpus) * until it receives a soft interrupt, and then the * secondary CPU branches to this address. */ - __raw_writel(BSYM(virt_to_phys(s5pv310_secondary_startup)), S5P_INFORM0); + __raw_writel(BSYM(virt_to_phys(s5pv310_secondary_startup)), S5P_VA_SYSRAM); } } diff --git a/arch/arm/mach-tegra/board-harmony.c b/arch/arm/mach-tegra/board-harmony.c index 05e78dd9b50c..9e305de56be9 100644 --- a/arch/arm/mach-tegra/board-harmony.c +++ b/arch/arm/mach-tegra/board-harmony.c @@ -91,10 +91,8 @@ static void __init tegra_harmony_fixup(struct machine_desc *desc, { mi->nr_banks = 2; mi->bank[0].start = PHYS_OFFSET; - mi->bank[0].node = PHYS_TO_NID(PHYS_OFFSET); mi->bank[0].size = 448 * SZ_1M; mi->bank[1].start = SZ_512M; - mi->bank[1].node = PHYS_TO_NID(SZ_512M); mi->bank[1].size = SZ_512M; } diff --git a/arch/arm/mach-tegra/include/mach/vmalloc.h b/arch/arm/mach-tegra/include/mach/vmalloc.h index 267a141730d9..fd6aa65b2dc6 100644 --- a/arch/arm/mach-tegra/include/mach/vmalloc.h +++ b/arch/arm/mach-tegra/include/mach/vmalloc.h @@ -23,6 +23,6 @@ #include <asm/sizes.h> -#define VMALLOC_END 0xFE000000 +#define VMALLOC_END 0xFE000000UL #endif diff --git a/arch/arm/mach-w90x900/include/mach/i2c.h b/arch/arm/mach-w90x900/include/mach/i2c.h new file mode 100644 index 000000000000..9ffb12d06e91 --- /dev/null +++ b/arch/arm/mach-w90x900/include/mach/i2c.h @@ -0,0 +1,9 @@ +#ifndef __ASM_ARCH_NUC900_I2C_H +#define __ASM_ARCH_NUC900_I2C_H + +struct nuc900_platform_i2c { + int bus_num; + unsigned long bus_freq; +}; + +#endif /* __ASM_ARCH_NUC900_I2C_H */ diff --git a/arch/arm/plat-omap/include/plat/smp.h b/arch/arm/plat-omap/include/plat/smp.h index 6a3ff65c0303..5177a9c5a25a 100644 --- a/arch/arm/plat-omap/include/plat/smp.h +++ b/arch/arm/plat-omap/include/plat/smp.h @@ -19,13 +19,6 @@ #include <asm/hardware/gic.h> -/* - * set_event() is used to wake up secondary core from wfe using sev. ROM - * code puts the second core into wfe(standby). - * - */ -#define set_event() __asm__ __volatile__ ("sev" : : : "memory") - /* Needed for secondary core boot */ extern void omap_secondary_startup(void); extern u32 omap_modify_auxcoreboot0(u32 set_mask, u32 clear_mask); diff --git a/arch/arm/plat-s5p/include/plat/map-s5p.h b/arch/arm/plat-s5p/include/plat/map-s5p.h index 54e9fb9d315e..c4ff88bf6477 100644 --- a/arch/arm/plat-s5p/include/plat/map-s5p.h +++ b/arch/arm/plat-s5p/include/plat/map-s5p.h @@ -17,6 +17,7 @@ #define S5P_VA_GPIO S3C_ADDR(0x00500000) #define S5P_VA_SYSTIMER S3C_ADDR(0x01200000) #define S5P_VA_SROMC S3C_ADDR(0x01100000) +#define S5P_VA_SYSRAM S3C_ADDR(0x01180000) #define S5P_VA_COMBINER_BASE S3C_ADDR(0x00600000) #define S5P_VA_COMBINER(x) (S5P_VA_COMBINER_BASE + ((x) >> 2) * 0x10) @@ -29,6 +30,7 @@ #define S5P_VA_GIC_DIST S5P_VA_COREPERI(0x1000) #define S5P_VA_L2CC S3C_ADDR(0x00900000) +#define S5P_VA_CMU S3C_ADDR(0x00920000) #define S5P_VA_UART(x) (S3C_VA_UART + ((x) * S3C_UART_OFFSET)) #define S5P_VA_UART0 S5P_VA_UART(0) diff --git a/arch/arm/plat-samsung/Kconfig b/arch/arm/plat-samsung/Kconfig index 4529dd6232bc..7c0bde781167 100644 --- a/arch/arm/plat-samsung/Kconfig +++ b/arch/arm/plat-samsung/Kconfig @@ -6,7 +6,7 @@ config PLAT_SAMSUNG bool - depends on ARCH_S3C2410 || ARCH_S3C24A0 || ARCH_S3C64XX + depends on PLAT_S3C24XX || ARCH_S3C64XX || PLAT_S5P select NO_IOPORT default y help diff --git a/arch/arm/plat-samsung/dev-hsmmc.c b/arch/arm/plat-samsung/dev-hsmmc.c index b0f93f11e281..9d2be0941410 100644 --- a/arch/arm/plat-samsung/dev-hsmmc.c +++ b/arch/arm/plat-samsung/dev-hsmmc.c @@ -70,4 +70,6 @@ void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd) set->cfg_gpio = pd->cfg_gpio; if (pd->cfg_card) set->cfg_card = pd->cfg_card; + if (pd->host_caps) + set->host_caps = pd->host_caps; } diff --git a/arch/arm/plat-samsung/dev-hsmmc1.c b/arch/arm/plat-samsung/dev-hsmmc1.c index 1504fd802865..a6c8295840af 100644 --- a/arch/arm/plat-samsung/dev-hsmmc1.c +++ b/arch/arm/plat-samsung/dev-hsmmc1.c @@ -70,4 +70,6 @@ void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd) set->cfg_gpio = pd->cfg_gpio; if (pd->cfg_card) set->cfg_card = pd->cfg_card; + if (pd->host_caps) + set->host_caps = pd->host_caps; } diff --git a/arch/arm/plat-samsung/dev-hsmmc2.c b/arch/arm/plat-samsung/dev-hsmmc2.c index b28ef173444d..cb0d7143381a 100644 --- a/arch/arm/plat-samsung/dev-hsmmc2.c +++ b/arch/arm/plat-samsung/dev-hsmmc2.c @@ -71,4 +71,6 @@ void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd) set->cfg_gpio = pd->cfg_gpio; if (pd->cfg_card) set->cfg_card = pd->cfg_card; + if (pd->host_caps) + set->host_caps = pd->host_caps; } |