diff options
Diffstat (limited to 'arch/arm')
27 files changed, 56 insertions, 51 deletions
diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts index e899de681f47..5be0e8fd2633 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-bletchley.dts @@ -45,8 +45,8 @@ num-chipselects = <1>; cs-gpios = <&gpio0 ASPEED_GPIO(Z, 0) GPIO_ACTIVE_LOW>; - tpmdev@0 { - compatible = "tcg,tpm_tis-spi"; + tpm@0 { + compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; spi-max-frequency = <33000000>; reg = <0>; }; diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400.dts index a677c827e758..5a8169bbda87 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-facebook-wedge400.dts @@ -80,8 +80,8 @@ gpio-miso = <&gpio ASPEED_GPIO(R, 5) GPIO_ACTIVE_HIGH>; num-chipselects = <1>; - tpmdev@0 { - compatible = "tcg,tpm_tis-spi"; + tpm@0 { + compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; spi-max-frequency = <33000000>; reg = <0>; }; diff --git a/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-tacoma.dts b/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-tacoma.dts index 3f6010ef2b86..213023bc5aec 100644 --- a/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-tacoma.dts +++ b/arch/arm/boot/dts/aspeed/aspeed-bmc-opp-tacoma.dts @@ -456,7 +456,7 @@ status = "okay"; tpm: tpm@2e { - compatible = "tcg,tpm-tis-i2c"; + compatible = "nuvoton,npct75x", "tcg,tpm-tis-i2c"; reg = <0x2e>; }; }; diff --git a/arch/arm/boot/dts/aspeed/ast2600-facebook-netbmc-common.dtsi b/arch/arm/boot/dts/aspeed/ast2600-facebook-netbmc-common.dtsi index 31590d3186a2..00e5887c926f 100644 --- a/arch/arm/boot/dts/aspeed/ast2600-facebook-netbmc-common.dtsi +++ b/arch/arm/boot/dts/aspeed/ast2600-facebook-netbmc-common.dtsi @@ -35,8 +35,8 @@ gpio-mosi = <&gpio0 ASPEED_GPIO(X, 4) GPIO_ACTIVE_HIGH>; gpio-miso = <&gpio0 ASPEED_GPIO(X, 5) GPIO_ACTIVE_HIGH>; - tpmdev@0 { - compatible = "tcg,tpm_tis-spi"; + tpm@0 { + compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; spi-max-frequency = <33000000>; reg = <0>; }; diff --git a/arch/arm/boot/dts/nxp/imx/imx6ull-phytec-tauri.dtsi b/arch/arm/boot/dts/nxp/imx/imx6ull-phytec-tauri.dtsi index 44cc4ff1d0df..d12fb44aeb14 100644 --- a/arch/arm/boot/dts/nxp/imx/imx6ull-phytec-tauri.dtsi +++ b/arch/arm/boot/dts/nxp/imx/imx6ull-phytec-tauri.dtsi @@ -116,7 +116,7 @@ tpm_tis: tpm@1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_tpm>; - compatible = "tcg,tpm_tis-spi"; + compatible = "infineon,slb9670", "tcg,tpm_tis-spi"; reg = <1>; spi-max-frequency = <20000000>; interrupt-parent = <&gpio5>; diff --git a/arch/arm/boot/dts/nxp/imx/imx7d-flex-concentrator.dts b/arch/arm/boot/dts/nxp/imx/imx7d-flex-concentrator.dts index 3a723843d562..9984b343cdf0 100644 --- a/arch/arm/boot/dts/nxp/imx/imx7d-flex-concentrator.dts +++ b/arch/arm/boot/dts/nxp/imx/imx7d-flex-concentrator.dts @@ -130,7 +130,7 @@ * TCG specification - Section 6.4.1 Clocking: * TPM shall support a SPI clock frequency range of 10-24 MHz. */ - st33htph: tpm-tis@0 { + st33htph: tpm@0 { compatible = "st,st33htpm-spi", "tcg,tpm_tis-spi"; reg = <0>; spi-max-frequency = <24000000>; diff --git a/arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi b/arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi index d7954ff466b4..e5254e32aa8f 100644 --- a/arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi +++ b/arch/arm/boot/dts/samsung/exynos4212-tab3.dtsi @@ -434,6 +434,7 @@ }; &fimd { + samsung,invert-vclk; status = "okay"; }; diff --git a/arch/arm/boot/dts/ti/omap/am335x-moxa-uc-2100-common.dtsi b/arch/arm/boot/dts/ti/omap/am335x-moxa-uc-2100-common.dtsi index b8730aa52ce6..a59331aa58e5 100644 --- a/arch/arm/boot/dts/ti/omap/am335x-moxa-uc-2100-common.dtsi +++ b/arch/arm/boot/dts/ti/omap/am335x-moxa-uc-2100-common.dtsi @@ -217,7 +217,7 @@ pinctrl-names = "default"; pinctrl-0 = <&spi1_pins>; - tpm_spi_tis@0 { + tpm@0 { compatible = "tcg,tpm_tis-spi"; reg = <0>; spi-max-frequency = <500000>; diff --git a/arch/arm/mach-imx/mmdc.c b/arch/arm/mach-imx/mmdc.c index 444a7eaa320c..25893d109190 100644 --- a/arch/arm/mach-imx/mmdc.c +++ b/arch/arm/mach-imx/mmdc.c @@ -452,7 +452,7 @@ static int mmdc_pmu_init(struct mmdc_pmu *pmu_mmdc, .active_events = 0, }; - pmu_mmdc->id = ida_simple_get(&mmdc_ida, 0, 0, GFP_KERNEL); + pmu_mmdc->id = ida_alloc(&mmdc_ida, GFP_KERNEL); return pmu_mmdc->id; } @@ -461,7 +461,7 @@ static void imx_mmdc_remove(struct platform_device *pdev) { struct mmdc_pmu *pmu_mmdc = platform_get_drvdata(pdev); - ida_simple_remove(&mmdc_ida, pmu_mmdc->id); + ida_free(&mmdc_ida, pmu_mmdc->id); cpuhp_state_remove_instance_nocalls(cpuhp_mmdc_state, &pmu_mmdc->node); perf_pmu_unregister(&pmu_mmdc->pmu); iounmap(pmu_mmdc->mmdc_base); @@ -529,7 +529,7 @@ pmu_register_err: cpuhp_state_remove_instance_nocalls(cpuhp_mmdc_state, &pmu_mmdc->node); hrtimer_cancel(&pmu_mmdc->hrtimer); pmu_release_id: - ida_simple_remove(&mmdc_ida, pmu_mmdc->id); + ida_free(&mmdc_ida, pmu_mmdc->id); pmu_free: kfree(pmu_mmdc); return ret; diff --git a/arch/arm/mach-omap2/am33xx-restart.c b/arch/arm/mach-omap2/am33xx-restart.c index ef2f18a56b65..bf6419d33565 100644 --- a/arch/arm/mach-omap2/am33xx-restart.c +++ b/arch/arm/mach-omap2/am33xx-restart.c @@ -9,7 +9,7 @@ #include "prm.h" /** - * am3xx_restart - trigger a software restart of the SoC + * am33xx_restart - trigger a software restart of the SoC * @mode: the "reboot mode", see arch/arm/kernel/{setup,process}.c * @cmd: passed from the userspace program rebooting the system (if provided) * diff --git a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c index be4557d1fdac..011076a5952f 100644 --- a/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c +++ b/arch/arm/mach-omap2/clkt2xxx_virt_prcm_set.c @@ -162,7 +162,7 @@ static int omap2_select_table_rate(struct clk_hw *hw, unsigned long rate, } /** - * omap2xxx_clkt_vps_check_bootloader_rate - determine which of the rate + * omap2xxx_clkt_vps_check_bootloader_rates - determine which of the rate * table sets matches the current CORE DPLL hardware rate * * Check the MPU rate set by bootloader. Sets the 'curr_prcm_set' diff --git a/arch/arm/mach-omap2/clockdomain.c b/arch/arm/mach-omap2/clockdomain.c index d145e7ac709b..69dc5b839335 100644 --- a/arch/arm/mach-omap2/clockdomain.c +++ b/arch/arm/mach-omap2/clockdomain.c @@ -990,7 +990,7 @@ void clkdm_allow_idle(struct clockdomain *clkdm) } /** - * clkdm_deny_idle - disable hwsup idle transitions for clkdm + * clkdm_deny_idle_nolock - disable hwsup idle transitions for clkdm * @clkdm: struct clockdomain * * * Prevent the hardware from automatically switching the clockdomain @@ -1110,7 +1110,7 @@ void clkdm_del_autodeps(struct clockdomain *clkdm) /** * clkdm_clk_enable - add an enabled downstream clock to this clkdm * @clkdm: struct clockdomain * - * @clk: struct clk * of the enabled downstream clock + * @unused: struct clk * of the enabled downstream clock * * Increment the usecount of the clockdomain @clkdm and ensure that it * is awake before @clk is enabled. Intended to be called by diff --git a/arch/arm/mach-omap2/cm33xx.c b/arch/arm/mach-omap2/cm33xx.c index c824d4e3db63..acdf72a541c0 100644 --- a/arch/arm/mach-omap2/cm33xx.c +++ b/arch/arm/mach-omap2/cm33xx.c @@ -357,7 +357,7 @@ static int am33xx_clkdm_save_context(struct clockdomain *clkdm) } /** - * am33xx_restore_save_context - Restore the clockdomain transition context + * am33xx_clkdm_restore_context - Restore the clockdomain transition context * @clkdm: The clockdomain pointer whose context needs to be restored * * Restore the clockdomain transition context. diff --git a/arch/arm/mach-omap2/cminst44xx.c b/arch/arm/mach-omap2/cminst44xx.c index 46670521b278..49483a888046 100644 --- a/arch/arm/mach-omap2/cminst44xx.c +++ b/arch/arm/mach-omap2/cminst44xx.c @@ -237,7 +237,7 @@ static void omap4_cminst_clkdm_disable_hwsup(u8 part, u16 inst, u16 cdoffs) } /** - * omap4_cminst_clkdm_force_sleep - try to take a clockdomain out of idle + * omap4_cminst_clkdm_force_wakeup - try to take a clockdomain out of idle * @part: PRCM partition ID that the clockdomain registers exist in * @inst: CM instance register offset (*_INST macro) * @cdoffs: Clockdomain register offset (*_CDOFFS macro) diff --git a/arch/arm/mach-omap2/omap-secure.c b/arch/arm/mach-omap2/omap-secure.c index 29c7350b06ab..c2e1aecd07cc 100644 --- a/arch/arm/mach-omap2/omap-secure.c +++ b/arch/arm/mach-omap2/omap-secure.c @@ -47,7 +47,7 @@ static void __init omap_optee_init_check(void) } /** - * omap_sec_dispatcher: Routine to dispatch low power secure + * omap_secure_dispatcher - Routine to dispatch low power secure * service routines * @idx: The HAL API index * @flag: The flag indicating criticality of operation @@ -183,7 +183,7 @@ static u32 rx51_secure_dispatcher(u32 idx, u32 process, u32 flag, u32 nargs, /** * rx51_secure_update_aux_cr: Routine to modify the contents of Auxiliary Control Register * @set_bits: bits to set in ACR - * @clr_bits: bits to clear in ACR + * @clear_bits: bits to clear in ACR * * Return the non-zero error value on failure. */ diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c index ba71928c0fcb..111677878d9c 100644 --- a/arch/arm/mach-omap2/omap_hwmod.c +++ b/arch/arm/mach-omap2/omap_hwmod.c @@ -900,7 +900,7 @@ static int _init_interface_clks(struct omap_hwmod *oh) } /** - * _init_opt_clk - get a struct clk * for the hwmod's optional clocks + * _init_opt_clks - get a struct clk * for the hwmod's optional clocks * @oh: struct omap_hwmod * * * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk @@ -2297,7 +2297,7 @@ static void __init parse_module_flags(struct omap_hwmod *oh, /** * _init - initialize internal data for the hwmod @oh * @oh: struct omap_hwmod * - * @n: (unused) + * @data: (unused) * * Look up the clocks and the address space used by the MPU to access * registers belonging to the hwmod @oh. @oh must already be @@ -2493,7 +2493,7 @@ static void _setup_postsetup(struct omap_hwmod *oh) /** * _setup - prepare IP block hardware for use * @oh: struct omap_hwmod * - * @n: (unused, pass NULL) + * @data: (unused, pass NULL) * * Configure the IP block represented by @oh. This may include * enabling the IP block, resetting it, and placing it into a @@ -3367,8 +3367,9 @@ static int omap_hwmod_check_module(struct device *dev, * omap_hwmod_allocate_module - allocate new module * @dev: struct device * @oh: module + * @data: module data * @sysc_fields: sysc register bits - * @clockdomain: clockdomain + * @clkdm: clockdomain * @rev_offs: revision register offset * @sysc_offs: sysconfig register offset * @syss_offs: sysstatus register offset diff --git a/arch/arm/mach-omap2/omap_hwmod_common_data.c b/arch/arm/mach-omap2/omap_hwmod_common_data.c index 246f1e5da99f..439232233c39 100644 --- a/arch/arm/mach-omap2/omap_hwmod_common_data.c +++ b/arch/arm/mach-omap2/omap_hwmod_common_data.c @@ -20,7 +20,7 @@ #include "omap_hwmod_common_data.h" -/** +/* * struct omap_hwmod_sysc_type1 - TYPE1 sysconfig scheme. * * To be used by hwmod structure to specify the sysconfig offsets @@ -36,7 +36,7 @@ struct sysc_regbits omap_hwmod_sysc_type1 = { .autoidle_shift = SYSC_TYPE1_AUTOIDLE_SHIFT, }; -/** +/* * struct omap_hwmod_sysc_type2 - TYPE2 sysconfig scheme. * * To be used by hwmod structure to specify the sysconfig offsets if the @@ -50,7 +50,7 @@ struct sysc_regbits omap_hwmod_sysc_type2 = { .dmadisable_shift = SYSC_TYPE2_DMADISABLE_SHIFT, }; -/** +/* * struct omap_hwmod_sysc_type3 - TYPE3 sysconfig scheme. * Used by some IPs on AM33xx */ diff --git a/arch/arm/mach-omap2/pmic-cpcap.c b/arch/arm/mach-omap2/pmic-cpcap.c index 668dc84fd31e..4f31e61c0c90 100644 --- a/arch/arm/mach-omap2/pmic-cpcap.c +++ b/arch/arm/mach-omap2/pmic-cpcap.c @@ -18,10 +18,10 @@ #include "vc.h" /** - * omap_cpcap_vsel_to_vdc - convert CPCAP VSEL value to microvolts DC + * omap_cpcap_vsel_to_uv - convert CPCAP VSEL value to microvolts DC * @vsel: CPCAP VSEL value to convert * - * Returns the microvolts DC that the CPCAP PMIC should generate when + * Returns: the microvolts DC that the CPCAP PMIC should generate when * programmed with @vsel. */ static unsigned long omap_cpcap_vsel_to_uv(unsigned char vsel) @@ -35,7 +35,7 @@ static unsigned long omap_cpcap_vsel_to_uv(unsigned char vsel) * omap_cpcap_uv_to_vsel - convert microvolts DC to CPCAP VSEL value * @uv: microvolts DC to convert * - * Returns the VSEL value necessary for the CPCAP PMIC to + * Returns: the VSEL value necessary for the CPCAP PMIC to * generate an output voltage equal to or greater than @uv microvolts DC. */ static unsigned char omap_cpcap_uv_to_vsel(unsigned long uv) @@ -82,10 +82,10 @@ static struct omap_voltdm_pmic omap_cpcap_iva = { }; /** - * omap_max8952_vsel_to_vdc - convert MAX8952 VSEL value to microvolts DC + * omap_max8952_vsel_to_uv - convert MAX8952 VSEL value to microvolts DC * @vsel: MAX8952 VSEL value to convert * - * Returns the microvolts DC that the MAX8952 Regulator should generate when + * Returns: the microvolts DC that the MAX8952 Regulator should generate when * programmed with @vsel. */ static unsigned long omap_max8952_vsel_to_uv(unsigned char vsel) @@ -99,7 +99,7 @@ static unsigned long omap_max8952_vsel_to_uv(unsigned char vsel) * omap_max8952_uv_to_vsel - convert microvolts DC to MAX8952 VSEL value * @uv: microvolts DC to convert * - * Returns the VSEL value necessary for the MAX8952 Regulator to + * Returns: the VSEL value necessary for the MAX8952 Regulator to * generate an output voltage equal to or greater than @uv microvolts DC. */ static unsigned char omap_max8952_uv_to_vsel(unsigned long uv) @@ -129,10 +129,10 @@ static struct omap_voltdm_pmic omap443x_max8952_mpu = { }; /** - * omap_fan5355_vsel_to_vdc - convert FAN535503 VSEL value to microvolts DC + * omap_fan535503_vsel_to_uv - convert FAN535503 VSEL value to microvolts DC * @vsel: FAN535503 VSEL value to convert * - * Returns the microvolts DC that the FAN535503 Regulator should generate when + * Returns: the microvolts DC that the FAN535503 Regulator should generate when * programmed with @vsel. */ static unsigned long omap_fan535503_vsel_to_uv(unsigned char vsel) @@ -144,10 +144,10 @@ static unsigned long omap_fan535503_vsel_to_uv(unsigned char vsel) } /** - * omap_fan535508_vsel_to_vdc - convert FAN535508 VSEL value to microvolts DC + * omap_fan535508_vsel_to_uv - convert FAN535508 VSEL value to microvolts DC * @vsel: FAN535508 VSEL value to convert * - * Returns the microvolts DC that the FAN535508 Regulator should generate when + * Returns: the microvolts DC that the FAN535508 Regulator should generate when * programmed with @vsel. */ static unsigned long omap_fan535508_vsel_to_uv(unsigned char vsel) @@ -165,7 +165,7 @@ static unsigned long omap_fan535508_vsel_to_uv(unsigned char vsel) * omap_fan535503_uv_to_vsel - convert microvolts DC to FAN535503 VSEL value * @uv: microvolts DC to convert * - * Returns the VSEL value necessary for the MAX8952 Regulator to + * Returns: the VSEL value necessary for the MAX8952 Regulator to * generate an output voltage equal to or greater than @uv microvolts DC. */ static unsigned char omap_fan535503_uv_to_vsel(unsigned long uv) @@ -184,7 +184,7 @@ static unsigned char omap_fan535503_uv_to_vsel(unsigned long uv) * omap_fan535508_uv_to_vsel - convert microvolts DC to FAN535508 VSEL value * @uv: microvolts DC to convert * - * Returns the VSEL value necessary for the MAX8952 Regulator to + * Returns: the VSEL value necessary for the MAX8952 Regulator to * generate an output voltage equal to or greater than @uv microvolts DC. */ static unsigned char omap_fan535508_uv_to_vsel(unsigned long uv) diff --git a/arch/arm/mach-omap2/powerdomain.c b/arch/arm/mach-omap2/powerdomain.c index 5e05dd1324e7..2441d96b7144 100644 --- a/arch/arm/mach-omap2/powerdomain.c +++ b/arch/arm/mach-omap2/powerdomain.c @@ -1162,7 +1162,7 @@ static int pwrdm_save_context(struct powerdomain *pwrdm, void *unused) } /** - * pwrdm_save_context - restore powerdomain registers + * pwrdm_restore_context - restore powerdomain registers * * Restore powerdomain control registers after a suspend or resume * event. diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c index 25093c1e5b9a..6c555438dd48 100644 --- a/arch/arm/mach-omap2/prm44xx.c +++ b/arch/arm/mach-omap2/prm44xx.c @@ -407,7 +407,7 @@ static bool omap44xx_prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx) } /** - * omap44xx_prm_clear_context_lost_flags_old - clear context loss flags + * omap44xx_prm_clear_context_loss_flags_old - clear context loss flags * @part: PRM partition ID (e.g., OMAP4430_PRM_PARTITION) * @inst: PRM instance offset (e.g., OMAP4430_PRM_MPU_INST) * @idx: CONTEXT register offset diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c index fd896f2295a1..3e1e5198bebf 100644 --- a/arch/arm/mach-omap2/prm_common.c +++ b/arch/arm/mach-omap2/prm_common.c @@ -370,7 +370,7 @@ bool prm_was_any_context_lost_old(u8 part, s16 inst, u16 idx) } /** - * prm_clear_context_lost_flags_old - clear context loss flags (old API) + * prm_clear_context_loss_flags_old - clear context loss flags (old API) * @part: PRM partition ID (e.g., OMAP4430_PRM_PARTITION) * @inst: PRM instance offset (e.g., OMAP4430_PRM_MPU_INST) * @idx: CONTEXT register offset @@ -497,6 +497,7 @@ int omap_prm_clear_mod_irqs(s16 module, u8 regs, u32 wkst_mask) /** * omap_prm_vp_check_txdone - check voltage processor TX done status + * @vp_id: unique VP instance ID * * Checks if voltage processor transmission has been completed. * Returns non-zero if a transmission has completed, 0 otherwise. @@ -514,6 +515,7 @@ u32 omap_prm_vp_check_txdone(u8 vp_id) /** * omap_prm_vp_clear_txdone - clears voltage processor TX done status + * @vp_id: unique VP instance ID * * Clears the status bit for completed voltage processor transmission * returned by prm_vp_check_txdone. diff --git a/arch/arm/mach-omap2/wd_timer.c b/arch/arm/mach-omap2/wd_timer.c index d4ea56a5f75a..898e7e332981 100644 --- a/arch/arm/mach-omap2/wd_timer.c +++ b/arch/arm/mach-omap2/wd_timer.c @@ -57,7 +57,7 @@ int omap2_wd_timer_disable(struct omap_hwmod *oh) } /** - * omap2_wdtimer_reset - reset and disable the WDTIMER IP block + * omap2_wd_timer_reset - reset and disable the WDTIMER IP block * @oh: struct omap_hwmod * * * After the WDTIMER IP blocks are reset on OMAP2/3, we must also take @@ -71,6 +71,8 @@ int omap2_wd_timer_disable(struct omap_hwmod *oh) * during a normal merge window. omap_hwmod_softreset() should be * renamed to omap_hwmod_set_ocp_softreset(), and omap_hwmod_softreset() * should call the hwmod _ocp_softreset() code. + * + * Returns: %0 on success or -errno value on error. */ int omap2_wd_timer_reset(struct omap_hwmod *oh) { diff --git a/arch/arm/mach-s3c/cpu.h b/arch/arm/mach-s3c/cpu.h index d0adc9b40e25..a0187606b999 100644 --- a/arch/arm/mach-s3c/cpu.h +++ b/arch/arm/mach-s3c/cpu.h @@ -76,6 +76,6 @@ extern void s3c24xx_init_uartdevs(char *name, struct s3c24xx_uart_resources *res, struct s3c2410_uartcfg *cfg, int no); -extern struct bus_type s3c6410_subsys; +extern const struct bus_type s3c6410_subsys; #endif diff --git a/arch/arm/mach-s3c/s3c6410.c b/arch/arm/mach-s3c/s3c6410.c index e79f18d0ca81..a29276a4fde5 100644 --- a/arch/arm/mach-s3c/s3c6410.c +++ b/arch/arm/mach-s3c/s3c6410.c @@ -57,7 +57,7 @@ void __init s3c6410_init_irq(void) s3c64xx_init_irq(~0 & ~(1 << 7), ~0); } -struct bus_type s3c6410_subsys = { +const struct bus_type s3c6410_subsys = { .name = "s3c6410-core", .dev_name = "s3c6410-core", }; diff --git a/arch/arm/mach-s3c/s3c64xx.c b/arch/arm/mach-s3c/s3c64xx.c index 9f9717874d67..6c70ea7f2931 100644 --- a/arch/arm/mach-s3c/s3c64xx.c +++ b/arch/arm/mach-s3c/s3c64xx.c @@ -149,7 +149,7 @@ static struct map_desc s3c_iodesc[] __initdata = { }, }; -static struct bus_type s3c64xx_subsys = { +static const struct bus_type s3c64xx_subsys = { .name = "s3c64xx-core", .dev_name = "s3c64xx-core", }; diff --git a/arch/arm/mach-s5pv210/pm.c b/arch/arm/mach-s5pv210/pm.c index d59c094cdea8..6fa70f787df4 100644 --- a/arch/arm/mach-s5pv210/pm.c +++ b/arch/arm/mach-s5pv210/pm.c @@ -47,7 +47,7 @@ static void s3c_pm_do_save(struct sleep_save *ptr, int count) } /** - * s3c_pm_do_restore() - restore register values from the save list. + * s3c_pm_do_restore_core() - restore register values from the save list. * @ptr: Pointer to an array of registers. * @count: Size of the ptr array. * diff --git a/arch/arm/mach-zynq/slcr.c b/arch/arm/mach-zynq/slcr.c index 9765b3f4c2fc..6aae14b0736c 100644 --- a/arch/arm/mach-zynq/slcr.c +++ b/arch/arm/mach-zynq/slcr.c @@ -10,7 +10,6 @@ #include <linux/mfd/syscon.h> #include <linux/of_address.h> #include <linux/regmap.h> -#include <linux/clk/zynq.h> #include "common.h" /* register offsets */ @@ -146,7 +145,7 @@ void zynq_slcr_cpu_stop(int cpu) } /** - * zynq_slcr_cpu_state - Read/write cpu state + * zynq_slcr_cpu_state_read - Read cpu state * @cpu: cpu number * * SLCR_REBOOT_STATUS save upper 2 bits (31/30 cpu states for cpu0 and cpu1) @@ -165,7 +164,7 @@ bool zynq_slcr_cpu_state_read(int cpu) } /** - * zynq_slcr_cpu_state - Read/write cpu state + * zynq_slcr_cpu_state_write - Write cpu state * @cpu: cpu number * @die: cpu state - true if cpu is going to die * |