diff options
Diffstat (limited to 'arch/ia64/sn')
-rw-r--r-- | arch/ia64/sn/kernel/sn2/sn2_smp.c | 2 | ||||
-rw-r--r-- | arch/ia64/sn/kernel/sn2/sn_hwperf.c | 11 | ||||
-rw-r--r-- | arch/ia64/sn/pci/pcibr/pcibr_provider.c | 6 | ||||
-rw-r--r-- | arch/ia64/sn/pci/tioce_provider.c | 16 |
4 files changed, 18 insertions, 17 deletions
diff --git a/arch/ia64/sn/kernel/sn2/sn2_smp.c b/arch/ia64/sn/kernel/sn2/sn2_smp.c index f3c69329e145..dfc6bf1c7b41 100644 --- a/arch/ia64/sn/kernel/sn2/sn2_smp.c +++ b/arch/ia64/sn/kernel/sn2/sn2_smp.c @@ -523,7 +523,7 @@ static ssize_t sn2_ptc_proc_write(struct file *file, const char __user *user, si return count; } -static struct seq_operations sn2_ptc_seq_ops = { +static const struct seq_operations sn2_ptc_seq_ops = { .start = sn2_ptc_seq_start, .next = sn2_ptc_seq_next, .stop = sn2_ptc_seq_stop, diff --git a/arch/ia64/sn/kernel/sn2/sn_hwperf.c b/arch/ia64/sn/kernel/sn2/sn_hwperf.c index 1a8e49607f11..4b0d1538e7e5 100644 --- a/arch/ia64/sn/kernel/sn2/sn_hwperf.c +++ b/arch/ia64/sn/kernel/sn2/sn_hwperf.c @@ -33,6 +33,7 @@ #include <linux/smp_lock.h> #include <linux/nodemask.h> #include <linux/smp.h> +#include <linux/mutex.h> #include <asm/processor.h> #include <asm/topology.h> @@ -50,7 +51,7 @@ static void *sn_hwperf_salheap = NULL; static int sn_hwperf_obj_cnt = 0; static nasid_t sn_hwperf_master_nasid = INVALID_NASID; static int sn_hwperf_init(void); -static DECLARE_MUTEX(sn_hwperf_init_mutex); +static DEFINE_MUTEX(sn_hwperf_init_mutex); #define cnode_possible(n) ((n) < num_cnodes) @@ -577,7 +578,7 @@ static void sn_topology_stop(struct seq_file *m, void *v) /* * /proc/sgi_sn/sn_topology, read-only using seq_file */ -static struct seq_operations sn_topology_seq_ops = { +static const struct seq_operations sn_topology_seq_ops = { .start = sn_topology_start, .next = sn_topology_next, .stop = sn_topology_stop, @@ -884,10 +885,10 @@ static int sn_hwperf_init(void) int e = 0; /* single threaded, once-only initialization */ - down(&sn_hwperf_init_mutex); + mutex_lock(&sn_hwperf_init_mutex); if (sn_hwperf_salheap) { - up(&sn_hwperf_init_mutex); + mutex_unlock(&sn_hwperf_init_mutex); return e; } @@ -936,7 +937,7 @@ out: sn_hwperf_salheap = NULL; sn_hwperf_obj_cnt = 0; } - up(&sn_hwperf_init_mutex); + mutex_unlock(&sn_hwperf_init_mutex); return e; } diff --git a/arch/ia64/sn/pci/pcibr/pcibr_provider.c b/arch/ia64/sn/pci/pcibr/pcibr_provider.c index ab3eaf85fe4d..2c676cc05418 100644 --- a/arch/ia64/sn/pci/pcibr/pcibr_provider.c +++ b/arch/ia64/sn/pci/pcibr/pcibr_provider.c @@ -100,11 +100,11 @@ u16 sn_ioboard_to_pci_bus(struct pci_bus *pci_bus) static irqreturn_t pcibr_error_intr_handler(int irq, void *arg) { - struct pcibus_info *soft = (struct pcibus_info *)arg; + struct pcibus_info *soft = arg; - if (sal_pcibr_error_interrupt(soft) < 0) { + if (sal_pcibr_error_interrupt(soft) < 0) panic("pcibr_error_intr_handler(): Fatal Bridge Error"); - } + return IRQ_HANDLED; } diff --git a/arch/ia64/sn/pci/tioce_provider.c b/arch/ia64/sn/pci/tioce_provider.c index e1a3e19d3d9c..999f14f986e2 100644 --- a/arch/ia64/sn/pci/tioce_provider.c +++ b/arch/ia64/sn/pci/tioce_provider.c @@ -752,13 +752,13 @@ tioce_kern_init(struct tioce_common *tioce_common) * Determine the secondary bus number of the port2 logical PPB. * This is used to decide whether a given pci device resides on * port1 or port2. Note: We don't have enough plumbing set up - * here to use pci_read_config_xxx() so use the raw_pci_ops vector. + * here to use pci_read_config_xxx() so use raw_pci_read(). */ seg = tioce_common->ce_pcibus.bs_persist_segment; bus = tioce_common->ce_pcibus.bs_persist_busnum; - raw_pci_ops->read(seg, bus, PCI_DEVFN(2, 0), PCI_SECONDARY_BUS, 1,&tmp); + raw_pci_read(seg, bus, PCI_DEVFN(2, 0), PCI_SECONDARY_BUS, 1,&tmp); tioce_kern->ce_port1_secondary = (u8) tmp; /* @@ -799,11 +799,11 @@ tioce_kern_init(struct tioce_common *tioce_common) /* mem base/limit */ - raw_pci_ops->read(seg, bus, PCI_DEVFN(dev, 0), + raw_pci_read(seg, bus, PCI_DEVFN(dev, 0), PCI_MEMORY_BASE, 2, &tmp); base = (u64)tmp << 16; - raw_pci_ops->read(seg, bus, PCI_DEVFN(dev, 0), + raw_pci_read(seg, bus, PCI_DEVFN(dev, 0), PCI_MEMORY_LIMIT, 2, &tmp); limit = (u64)tmp << 16; limit |= 0xfffffUL; @@ -817,21 +817,21 @@ tioce_kern_init(struct tioce_common *tioce_common) * attributes. */ - raw_pci_ops->read(seg, bus, PCI_DEVFN(dev, 0), + raw_pci_read(seg, bus, PCI_DEVFN(dev, 0), PCI_PREF_MEMORY_BASE, 2, &tmp); base = ((u64)tmp & PCI_PREF_RANGE_MASK) << 16; - raw_pci_ops->read(seg, bus, PCI_DEVFN(dev, 0), + raw_pci_read(seg, bus, PCI_DEVFN(dev, 0), PCI_PREF_BASE_UPPER32, 4, &tmp); base |= (u64)tmp << 32; - raw_pci_ops->read(seg, bus, PCI_DEVFN(dev, 0), + raw_pci_read(seg, bus, PCI_DEVFN(dev, 0), PCI_PREF_MEMORY_LIMIT, 2, &tmp); limit = ((u64)tmp & PCI_PREF_RANGE_MASK) << 16; limit |= 0xfffffUL; - raw_pci_ops->read(seg, bus, PCI_DEVFN(dev, 0), + raw_pci_read(seg, bus, PCI_DEVFN(dev, 0), PCI_PREF_LIMIT_UPPER32, 4, &tmp); limit |= (u64)tmp << 32; |