diff options
Diffstat (limited to 'arch/loongarch/boot/dts')
-rw-r--r-- | arch/loongarch/boot/dts/Makefile | 2 | ||||
-rw-r--r-- | arch/loongarch/boot/dts/loongson-2k0500-ref.dts | 4 | ||||
-rw-r--r-- | arch/loongarch/boot/dts/loongson-2k0500.dtsi | 86 | ||||
-rw-r--r-- | arch/loongarch/boot/dts/loongson-2k1000-ref.dts | 8 | ||||
-rw-r--r-- | arch/loongarch/boot/dts/loongson-2k1000.dtsi | 25 | ||||
-rw-r--r-- | arch/loongarch/boot/dts/loongson-2k2000-ref.dts | 33 | ||||
-rw-r--r-- | arch/loongarch/boot/dts/loongson-2k2000.dtsi | 95 |
7 files changed, 227 insertions, 26 deletions
diff --git a/arch/loongarch/boot/dts/Makefile b/arch/loongarch/boot/dts/Makefile index 747d0c3f6389..15d5e14fe418 100644 --- a/arch/loongarch/boot/dts/Makefile +++ b/arch/loongarch/boot/dts/Makefile @@ -1,5 +1,3 @@ # SPDX-License-Identifier: GPL-2.0-only dtb-y = loongson-2k0500-ref.dtb loongson-2k1000-ref.dtb loongson-2k2000-ref.dtb - -obj-$(CONFIG_BUILTIN_DTB) += $(addsuffix .dtb.o, $(CONFIG_BUILTIN_DTB_NAME)) diff --git a/arch/loongarch/boot/dts/loongson-2k0500-ref.dts b/arch/loongarch/boot/dts/loongson-2k0500-ref.dts index 8aefb0c12672..a34734a6c3ce 100644 --- a/arch/loongarch/boot/dts/loongson-2k0500-ref.dts +++ b/arch/loongarch/boot/dts/loongson-2k0500-ref.dts @@ -44,14 +44,14 @@ &gmac0 { status = "okay"; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; bus_id = <0x0>; }; &gmac1 { status = "okay"; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; bus_id = <0x1>; }; diff --git a/arch/loongarch/boot/dts/loongson-2k0500.dtsi b/arch/loongarch/boot/dts/loongson-2k0500.dtsi index 444779c21034..3b38ff8853a7 100644 --- a/arch/loongarch/boot/dts/loongson-2k0500.dtsi +++ b/arch/loongarch/boot/dts/loongson-2k0500.dtsi @@ -6,6 +6,7 @@ /dts-v1/; #include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/clock/loongson,ls2k-clk.h> / { #address-cells = <2>; @@ -19,14 +20,15 @@ compatible = "loongson,la264"; device_type = "cpu"; reg = <0x0>; - clocks = <&cpu_clk>; + clocks = <&clk LOONGSON2_NODE_CLK>; }; }; - cpu_clk: cpu-clk { + ref_100m: clock-ref-100m { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <500000000>; + clock-frequency = <100000000>; + clock-output-names = "ref_100m"; }; cpuintc: interrupt-controller { @@ -35,6 +37,28 @@ interrupt-controller; }; + thermal-zones { + cpu-thermal { + polling-delay-passive = <1000>; + polling-delay = <5000>; + thermal-sensors = <&tsensor 0>; + + trips { + cpu-alert { + temperature = <33000>; + hysteresis = <2000>; + type = "active"; + }; + + cpu-crit { + temperature = <85000>; + hysteresis = <5000>; + type = "critical"; + }; + }; + }; + }; + bus@10000000 { compatible = "simple-bus"; ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>, @@ -52,6 +76,54 @@ ranges = <1 0x0 0x0 0x16400000 0x4000>; }; + clk: clock-controller@1fe10400 { + compatible = "loongson,ls2k0500-clk"; + reg = <0x0 0x1fe10400 0x0 0x2c>; + #clock-cells = <1>; + clocks = <&ref_100m>; + clock-names = "ref_100m"; + }; + + dma-controller@1fe10c00 { + compatible = "loongson,ls2k0500-apbdma", "loongson,ls2k1000-apbdma"; + reg = <0 0x1fe10c00 0 0x8>; + interrupt-parent = <&eiointc>; + interrupts = <67>; + clocks = <&clk LOONGSON2_APB_CLK>; + #dma-cells = <1>; + status = "disabled"; + }; + + dma-controller@1fe10c10 { + compatible = "loongson,ls2k0500-apbdma", "loongson,ls2k1000-apbdma"; + reg = <0 0x1fe10c10 0 0x8>; + interrupt-parent = <&eiointc>; + interrupts = <68>; + clocks = <&clk LOONGSON2_APB_CLK>; + #dma-cells = <1>; + status = "disabled"; + }; + + dma-controller@1fe10c20 { + compatible = "loongson,ls2k0500-apbdma", "loongson,ls2k1000-apbdma"; + reg = <0 0x1fe10c20 0 0x8>; + interrupt-parent = <&eiointc>; + interrupts = <69>; + clocks = <&clk LOONGSON2_APB_CLK>; + #dma-cells = <1>; + status = "disabled"; + }; + + dma-controller@1fe10c30 { + compatible = "loongson,ls2k0500-apbdma", "loongson,ls2k1000-apbdma"; + reg = <0 0x1fe10c30 0 0x8>; + interrupt-parent = <&eiointc>; + interrupts = <70>; + clocks = <&clk LOONGSON2_APB_CLK>; + #dma-cells = <1>; + status = "disabled"; + }; + liointc0: interrupt-controller@1fe11400 { compatible = "loongson,liointc-2.0"; reg = <0x0 0x1fe11400 0x0 0x40>, @@ -139,6 +211,14 @@ status = "disabled"; }; + tsensor: thermal-sensor@1fe11500 { + compatible = "loongson,ls2k0500-thermal", "loongson,ls2k1000-thermal"; + reg = <0x0 0x1fe11500 0x0 0x30>; + interrupt-parent = <&liointc0>; + interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; + #thermal-sensor-cells = <1>; + }; + uart0: serial@1ff40800 { compatible = "ns16550a"; reg = <0x0 0x1ff40800 0x0 0x10>; diff --git a/arch/loongarch/boot/dts/loongson-2k1000-ref.dts b/arch/loongarch/boot/dts/loongson-2k1000-ref.dts index ed4d32434041..23cf26cc3e5f 100644 --- a/arch/loongarch/boot/dts/loongson-2k1000-ref.dts +++ b/arch/loongarch/boot/dts/loongson-2k1000-ref.dts @@ -43,7 +43,7 @@ &gmac0 { status = "okay"; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; phy-handle = <&phy0>; mdio { compatible = "snps,dwmac-mdio"; @@ -58,7 +58,7 @@ &gmac1 { status = "okay"; - phy-mode = "rgmii"; + phy-mode = "rgmii-id"; phy-handle = <&phy1>; mdio { compatible = "snps,dwmac-mdio"; @@ -113,10 +113,6 @@ status = "okay"; }; -&clk { - status = "okay"; -}; - &rtc0 { status = "okay"; }; diff --git a/arch/loongarch/boot/dts/loongson-2k1000.dtsi b/arch/loongarch/boot/dts/loongson-2k1000.dtsi index 49a70f8c3cab..8dff2aa52417 100644 --- a/arch/loongarch/boot/dts/loongson-2k1000.dtsi +++ b/arch/loongarch/boot/dts/loongson-2k1000.dtsi @@ -100,6 +100,13 @@ #size-cells = <2>; dma-coherent; + isa@18000000 { + compatible = "isa"; + #size-cells = <1>; + #address-cells = <2>; + ranges = <1 0x0 0x0 0x18000000 0x4000>; + }; + liointc0: interrupt-controller@1fe01400 { compatible = "loongson,liointc-2.0"; reg = <0x0 0x1fe01400 0x0 0x40>, @@ -152,7 +159,6 @@ #clock-cells = <1>; clocks = <&ref_100m>; clock-names = "ref_100m"; - status = "disabled"; }; gpio0: gpio@1fe00500 { @@ -260,7 +266,7 @@ status = "disabled"; }; - dma-controller@1fe00c20 { + apbdma2: dma-controller@1fe00c20 { compatible = "loongson,ls2k1000-apbdma"; reg = <0x0 0x1fe00c20 0x0 0x8>; interrupt-parent = <&liointc1>; @@ -270,7 +276,7 @@ status = "disabled"; }; - dma-controller@1fe00c30 { + apbdma3: dma-controller@1fe00c30 { compatible = "loongson,ls2k1000-apbdma"; reg = <0x0 0x1fe00c30 0x0 0x8>; interrupt-parent = <&liointc1>; @@ -346,6 +352,19 @@ status = "disabled"; }; + i2s: i2s@1fe2d000 { + compatible = "loongson,ls2k1000-i2s"; + reg = <0 0x1fe2d000 0 0x14>, + <0 0x1fe00438 0 0x8>; + interrupt-parent = <&liointc0>; + interrupts = <5 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk LOONGSON2_APB_CLK>; + dmas = <&apbdma2 0>, <&apbdma3 0>; + dma-names = "tx", "rx"; + #sound-dai-cells = <0>; + status = "disabled"; + }; + spi0: spi@1fff0220 { compatible = "loongson,ls2k1000-spi"; reg = <0x0 0x1fff0220 0x0 0x10>; diff --git a/arch/loongarch/boot/dts/loongson-2k2000-ref.dts b/arch/loongarch/boot/dts/loongson-2k2000-ref.dts index dca91caf895e..ea9e6985d0e9 100644 --- a/arch/loongarch/boot/dts/loongson-2k2000-ref.dts +++ b/arch/loongarch/boot/dts/loongson-2k2000-ref.dts @@ -61,12 +61,45 @@ &gmac0 { status = "okay"; + + phy-mode = "gmii"; + phy-handle = <&phy0>; + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + phy0: ethernet-phy@0 { + reg = <2>; + }; + }; }; &gmac1 { status = "okay"; + + phy-mode = "gmii"; + phy-handle = <&phy1>; + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + phy1: ethernet-phy@1 { + reg = <2>; + }; + }; }; &gmac2 { status = "okay"; + + phy-mode = "rgmii-id"; + phy-handle = <&phy2>; + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + phy2: ethernet-phy@2 { + reg = <0>; + }; + }; }; diff --git a/arch/loongarch/boot/dts/loongson-2k2000.dtsi b/arch/loongarch/boot/dts/loongson-2k2000.dtsi index a231949b5f55..b4ff55a33e90 100644 --- a/arch/loongarch/boot/dts/loongson-2k2000.dtsi +++ b/arch/loongarch/boot/dts/loongson-2k2000.dtsi @@ -6,6 +6,7 @@ /dts-v1/; #include <dt-bindings/interrupt-controller/irq.h> +#include <dt-bindings/clock/loongson,ls2k-clk.h> / { #address-cells = <2>; @@ -19,21 +20,22 @@ compatible = "loongson,la364"; device_type = "cpu"; reg = <0x0>; - clocks = <&cpu_clk>; + clocks = <&clk LOONGSON2_NODE_CLK>; }; cpu1: cpu@2 { compatible = "loongson,la364"; device_type = "cpu"; reg = <0x1>; - clocks = <&cpu_clk>; + clocks = <&clk LOONGSON2_NODE_CLK>; }; }; - cpu_clk: cpu-clk { + ref_100m: clock-ref-100m { compatible = "fixed-clock"; #clock-cells = <0>; - clock-frequency = <1400000000>; + clock-frequency = <100000000>; + clock-output-names = "ref_100m"; }; cpuintc: interrupt-controller { @@ -42,6 +44,28 @@ interrupt-controller; }; + thermal-zones { + cpu-thermal { + polling-delay-passive = <1000>; + polling-delay = <5000>; + thermal-sensors = <&tsensor 0>; + + trips { + cpu-alert { + temperature = <40000>; + hysteresis = <2000>; + type = "active"; + }; + + cpu-crit { + temperature = <85000>; + hysteresis = <5000>; + type = "critical"; + }; + }; + }; + }; + bus@10000000 { compatible = "simple-bus"; ranges = <0x0 0x10000000 0x0 0x10000000 0x0 0x10000000>, @@ -51,6 +75,21 @@ #address-cells = <2>; #size-cells = <2>; + isa@18400000 { + compatible = "isa"; + #size-cells = <1>; + #address-cells = <2>; + ranges = <1 0x0 0x0 0x18400000 0x4000>; + }; + + clk: clock-controller@10010480 { + compatible = "loongson,ls2k2000-clk"; + reg = <0x0 0x10010480 0x0 0x100>; + #clock-cells = <1>; + clocks = <&ref_100m>; + clock-names = "ref_100m"; + }; + pmc: power-management@100d0000 { compatible = "loongson,ls2k2000-pmc", "loongson,ls2k0500-pmc", "syscon"; reg = <0x0 0x100d0000 0x0 0x58>; @@ -73,6 +112,15 @@ }; }; + tsensor: thermal-sensor@1fe01460 { + compatible = "loongson,ls2k2000-thermal"; + reg = <0x0 0x1fe01460 0x0 0x30>, + <0x0 0x1fe0019c 0x0 0x4>; + interrupt-parent = <&liointc>; + interrupts = <7 IRQ_TYPE_LEVEL_HIGH>; + #thermal-sensor-cells = <1>; + }; + liointc: interrupt-controller@1fe01400 { compatible = "loongson,liointc-1.0"; reg = <0x0 0x1fe01400 0x0 0x64>; @@ -109,6 +157,8 @@ msi: msi-controller@1fe01140 { compatible = "loongson,pch-msi-1.0"; reg = <0x0 0x1fe01140 0x0 0x8>; + interrupt-controller; + #interrupt-cells = <1>; msi-controller; loongson,msi-base-vec = <64>; loongson,msi-num-vecs = <192>; @@ -123,6 +173,22 @@ status = "disabled"; }; + i2c@1fe00120 { + compatible = "loongson,ls2k-i2c"; + reg = <0x0 0x1fe00120 0x0 0x8>; + interrupt-parent = <&liointc>; + interrupts = <8 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + + i2c@1fe00130 { + compatible = "loongson,ls2k-i2c"; + reg = <0x0 0x1fe00130 0x0 0x8>; + interrupt-parent = <&liointc>; + interrupts = <9 IRQ_TYPE_LEVEL_HIGH>; + status = "disabled"; + }; + uart0: serial@1fe001e0 { compatible = "ns16550a"; reg = <0x0 0x1fe001e0 0x0 0x10>; @@ -140,27 +206,34 @@ #address-cells = <3>; #size-cells = <2>; device_type = "pci"; + msi-parent = <&msi>; bus-range = <0x0 0xff>; - ranges = <0x01000000 0x0 0x00008000 0x0 0x18400000 0x0 0x00008000>, + ranges = <0x01000000 0x0 0x00008000 0x0 0x18408000 0x0 0x00008000>, <0x02000000 0x0 0x60000000 0x0 0x60000000 0x0 0x20000000>; gmac0: ethernet@3,0 { reg = <0x1800 0x0 0x0 0x0 0x0>; - interrupts = <12 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <12 IRQ_TYPE_LEVEL_HIGH>, + <13 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq", "eth_lpi"; interrupt-parent = <&pic>; status = "disabled"; }; gmac1: ethernet@3,1 { reg = <0x1900 0x0 0x0 0x0 0x0>; - interrupts = <14 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <14 IRQ_TYPE_LEVEL_HIGH>, + <15 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq", "eth_lpi"; interrupt-parent = <&pic>; status = "disabled"; }; gmac2: ethernet@3,2 { reg = <0x1a00 0x0 0x0 0x0 0x0>; - interrupts = <17 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <17 IRQ_TYPE_LEVEL_HIGH>, + <18 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "macirq", "eth_lpi"; interrupt-parent = <&pic>; status = "disabled"; }; @@ -186,9 +259,11 @@ status = "disabled"; }; - hda@7,0 { + i2s@7,0 { reg = <0x3800 0x0 0x0 0x0 0x0>; - interrupts = <58 IRQ_TYPE_LEVEL_HIGH>; + interrupts = <78 IRQ_TYPE_LEVEL_HIGH>, + <79 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tx", "rx"; interrupt-parent = <&pic>; status = "disabled"; }; |