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-rw-r--r--arch/microblaze/kernel/.gitignore1
-rw-r--r--arch/microblaze/kernel/Makefile8
-rw-r--r--arch/microblaze/kernel/asm-offsets.c11
-rw-r--r--arch/microblaze/kernel/cpu/cache.c3
-rw-r--r--arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c7
-rw-r--r--arch/microblaze/kernel/cpu/cpuinfo.c1
-rw-r--r--arch/microblaze/kernel/cpu/pvr.c1
-rw-r--r--arch/microblaze/kernel/dma.c3
-rw-r--r--arch/microblaze/kernel/entry-nommu.S622
-rw-r--r--arch/microblaze/kernel/entry.S307
-rw-r--r--arch/microblaze/kernel/exceptions.c9
-rw-r--r--arch/microblaze/kernel/ftrace.c5
-rw-r--r--arch/microblaze/kernel/head.S20
-rw-r--r--arch/microblaze/kernel/hw_exception_handler.S132
-rw-r--r--arch/microblaze/kernel/irq.c16
-rw-r--r--arch/microblaze/kernel/kgdb.c2
-rw-r--r--arch/microblaze/kernel/microblaze_ksyms.c4
-rw-r--r--arch/microblaze/kernel/misc.S3
-rw-r--r--arch/microblaze/kernel/module.c28
-rw-r--r--arch/microblaze/kernel/process.c31
-rw-r--r--arch/microblaze/kernel/prom.c2
-rw-r--r--arch/microblaze/kernel/ptrace.c5
-rw-r--r--arch/microblaze/kernel/reset.c1
-rw-r--r--arch/microblaze/kernel/setup.c14
-rw-r--r--arch/microblaze/kernel/signal.c37
-rw-r--r--arch/microblaze/kernel/stacktrace.c4
-rw-r--r--arch/microblaze/kernel/syscall_table.S3
-rw-r--r--arch/microblaze/kernel/syscalls/Makefile30
-rw-r--r--arch/microblaze/kernel/syscalls/syscall.tbl32
-rw-r--r--arch/microblaze/kernel/syscalls/syscallhdr.sh36
-rw-r--r--arch/microblaze/kernel/syscalls/syscalltbl.sh32
-rw-r--r--arch/microblaze/kernel/timer.c14
-rw-r--r--arch/microblaze/kernel/traps.c13
-rw-r--r--arch/microblaze/kernel/unwind.c51
-rw-r--r--arch/microblaze/kernel/vmlinux.lds.S6
35 files changed, 444 insertions, 1050 deletions
diff --git a/arch/microblaze/kernel/.gitignore b/arch/microblaze/kernel/.gitignore
index c5f676c3c224..bbb90f92d051 100644
--- a/arch/microblaze/kernel/.gitignore
+++ b/arch/microblaze/kernel/.gitignore
@@ -1 +1,2 @@
+# SPDX-License-Identifier: GPL-2.0-only
vmlinux.lds
diff --git a/arch/microblaze/kernel/Makefile b/arch/microblaze/kernel/Makefile
index dd71637437f4..4393bee64eaf 100644
--- a/arch/microblaze/kernel/Makefile
+++ b/arch/microblaze/kernel/Makefile
@@ -12,9 +12,9 @@ CFLAGS_REMOVE_ftrace.o = -pg
CFLAGS_REMOVE_process.o = -pg
endif
-extra-y := head.o vmlinux.lds
+extra-y := vmlinux.lds
-obj-y += dma.o exceptions.o \
+obj-y += head.o dma.o exceptions.o \
hw_exception_handler.o irq.o \
process.o prom.o ptrace.o \
reset.o setup.o signal.o sys_microblaze.o timer.o traps.o unwind.o
@@ -22,9 +22,9 @@ obj-y += dma.o exceptions.o \
obj-y += cpu/
obj-$(CONFIG_MODULES) += microblaze_ksyms.o module.o
-obj-$(CONFIG_MMU) += misc.o
+obj-y += misc.o
obj-$(CONFIG_STACKTRACE) += stacktrace.o
obj-$(CONFIG_FUNCTION_TRACER) += ftrace.o mcount.o
obj-$(CONFIG_KGDB) += kgdb.o
-obj-y += entry$(MMU).o
+obj-y += entry.o
diff --git a/arch/microblaze/kernel/asm-offsets.c b/arch/microblaze/kernel/asm-offsets.c
index c1b459c97571..104c3ac5f30c 100644
--- a/arch/microblaze/kernel/asm-offsets.c
+++ b/arch/microblaze/kernel/asm-offsets.c
@@ -70,8 +70,6 @@ int main(int argc, char *argv[])
/* struct task_struct */
DEFINE(TS_THREAD_INFO, offsetof(struct task_struct, stack));
-#ifdef CONFIG_MMU
- DEFINE(TASK_STATE, offsetof(struct task_struct, state));
DEFINE(TASK_FLAGS, offsetof(struct task_struct, flags));
DEFINE(TASK_PTRACE, offsetof(struct task_struct, ptrace));
DEFINE(TASK_BLOCKED, offsetof(struct task_struct, blocked));
@@ -84,12 +82,10 @@ int main(int argc, char *argv[])
DEFINE(PGDIR, offsetof(struct thread_struct, pgdir));
BLANK();
-#endif
/* struct thread_info */
DEFINE(TI_TASK, offsetof(struct thread_info, task));
DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
- DEFINE(TI_ADDR_LIMIT, offsetof(struct thread_info, addr_limit));
DEFINE(TI_CPU_CONTEXT, offsetof(struct thread_info, cpu_context));
DEFINE(TI_PREEMPT_COUNT, offsetof(struct thread_info, preempt_count));
BLANK();
@@ -124,5 +120,12 @@ int main(int argc, char *argv[])
DEFINE(CC_FSR, offsetof(struct cpu_context, fsr));
BLANK();
+ /* struct cpuinfo */
+ DEFINE(CI_DCS, offsetof(struct cpuinfo, dcache_size));
+ DEFINE(CI_DCL, offsetof(struct cpuinfo, dcache_line_length));
+ DEFINE(CI_ICS, offsetof(struct cpuinfo, icache_size));
+ DEFINE(CI_ICL, offsetof(struct cpuinfo, icache_line_length));
+ BLANK();
+
return 0;
}
diff --git a/arch/microblaze/kernel/cpu/cache.c b/arch/microblaze/kernel/cpu/cache.c
index 0bde47e4fa69..dcba53803fa5 100644
--- a/arch/microblaze/kernel/cpu/cache.c
+++ b/arch/microblaze/kernel/cpu/cache.c
@@ -92,7 +92,8 @@ static inline void __disable_dcache_nomsr(void)
#define CACHE_LOOP_LIMITS(start, end, cache_line_length, cache_size) \
do { \
int align = ~(cache_line_length - 1); \
- end = min(start + cache_size, end); \
+ if (start < UINT_MAX - cache_size) \
+ end = min(start + cache_size, end); \
start &= align; \
} while (0)
diff --git a/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c b/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c
index a32daec96c12..c7ee51b0900e 100644
--- a/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c
+++ b/arch/microblaze/kernel/cpu/cpuinfo-pvr-full.c
@@ -22,13 +22,8 @@
#define CI(c, p) { ci->c = PVR_##p(pvr); }
-#if defined(CONFIG_EARLY_PRINTK) && defined(CONFIG_SERIAL_UARTLITE_CONSOLE)
#define err_printk(x) \
- early_printk("ERROR: Microblaze " x "-different for PVR and DTS\n");
-#else
-#define err_printk(x) \
- pr_info("ERROR: Microblaze " x "-different for PVR and DTS\n");
-#endif
+ pr_err("ERROR: Microblaze " x "-different for PVR and DTS\n");
void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu)
{
diff --git a/arch/microblaze/kernel/cpu/cpuinfo.c b/arch/microblaze/kernel/cpu/cpuinfo.c
index ef2f49471a2a..cd9b4450763b 100644
--- a/arch/microblaze/kernel/cpu/cpuinfo.c
+++ b/arch/microblaze/kernel/cpu/cpuinfo.c
@@ -51,6 +51,7 @@ const struct cpu_ver_key cpu_ver_lookup[] = {
{"9.5", 0x22},
{"9.6", 0x23},
{"10.0", 0x24},
+ {"11.0", 0x25},
{NULL, 0},
};
diff --git a/arch/microblaze/kernel/cpu/pvr.c b/arch/microblaze/kernel/cpu/pvr.c
index 8d0dc6db48cf..f139052a39bd 100644
--- a/arch/microblaze/kernel/cpu/pvr.c
+++ b/arch/microblaze/kernel/cpu/pvr.c
@@ -14,6 +14,7 @@
#include <linux/compiler.h>
#include <asm/exceptions.h>
#include <asm/pvr.h>
+#include <linux/irqflags.h>
/*
* Until we get an assembler that knows about the pvr registers,
diff --git a/arch/microblaze/kernel/dma.c b/arch/microblaze/kernel/dma.c
index d7bebd04247b..04d091ade417 100644
--- a/arch/microblaze/kernel/dma.c
+++ b/arch/microblaze/kernel/dma.c
@@ -8,9 +8,8 @@
*/
#include <linux/device.h>
-#include <linux/dma-noncoherent.h>
+#include <linux/dma-map-ops.h>
#include <linux/gfp.h>
-#include <linux/dma-debug.h>
#include <linux/export.h>
#include <linux/bug.h>
#include <asm/cacheflush.h>
diff --git a/arch/microblaze/kernel/entry-nommu.S b/arch/microblaze/kernel/entry-nommu.S
deleted file mode 100644
index 7e394fc2c439..000000000000
--- a/arch/microblaze/kernel/entry-nommu.S
+++ /dev/null
@@ -1,622 +0,0 @@
-/*
- * Copyright (C) 2007-2009 Michal Simek <monstr@monstr.eu>
- * Copyright (C) 2007-2009 PetaLogix
- * Copyright (C) 2006 Atmark Techno, Inc.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- */
-
-#include <linux/linkage.h>
-#include <asm/thread_info.h>
-#include <linux/errno.h>
-#include <asm/entry.h>
-#include <asm/asm-offsets.h>
-#include <asm/registers.h>
-#include <asm/unistd.h>
-#include <asm/percpu.h>
-#include <asm/signal.h>
-
-#if CONFIG_XILINX_MICROBLAZE0_USE_MSR_INSTR
- .macro disable_irq
- msrclr r0, MSR_IE
- .endm
-
- .macro enable_irq
- msrset r0, MSR_IE
- .endm
-
- .macro clear_bip
- msrclr r0, MSR_BIP
- .endm
-#else
- .macro disable_irq
- mfs r11, rmsr
- andi r11, r11, ~MSR_IE
- mts rmsr, r11
- .endm
-
- .macro enable_irq
- mfs r11, rmsr
- ori r11, r11, MSR_IE
- mts rmsr, r11
- .endm
-
- .macro clear_bip
- mfs r11, rmsr
- andi r11, r11, ~MSR_BIP
- mts rmsr, r11
- .endm
-#endif
-
-ENTRY(_interrupt)
- swi r1, r0, PER_CPU(ENTRY_SP) /* save the current sp */
- swi r11, r0, PER_CPU(R11_SAVE) /* temporarily save r11 */
- lwi r11, r0, PER_CPU(KM) /* load mode indicator */
- beqid r11, 1f
- nop
- brid 2f /* jump over */
- addik r1, r1, (-PT_SIZE) /* room for pt_regs (delay slot) */
-1: /* switch to kernel stack */
- lwi r1, r0, PER_CPU(CURRENT_SAVE) /* get the saved current */
- lwi r1, r1, TS_THREAD_INFO /* get the thread info */
- /* calculate kernel stack pointer */
- addik r1, r1, THREAD_SIZE - PT_SIZE
-2:
- swi r11, r1, PT_MODE /* store the mode */
- lwi r11, r0, PER_CPU(R11_SAVE) /* reload r11 */
- swi r2, r1, PT_R2
- swi r3, r1, PT_R3
- swi r4, r1, PT_R4
- swi r5, r1, PT_R5
- swi r6, r1, PT_R6
- swi r7, r1, PT_R7
- swi r8, r1, PT_R8
- swi r9, r1, PT_R9
- swi r10, r1, PT_R10
- swi r11, r1, PT_R11
- swi r12, r1, PT_R12
- swi r13, r1, PT_R13
- swi r14, r1, PT_R14
- swi r14, r1, PT_PC
- swi r15, r1, PT_R15
- swi r16, r1, PT_R16
- swi r17, r1, PT_R17
- swi r18, r1, PT_R18
- swi r19, r1, PT_R19
- swi r20, r1, PT_R20
- swi r21, r1, PT_R21
- swi r22, r1, PT_R22
- swi r23, r1, PT_R23
- swi r24, r1, PT_R24
- swi r25, r1, PT_R25
- swi r26, r1, PT_R26
- swi r27, r1, PT_R27
- swi r28, r1, PT_R28
- swi r29, r1, PT_R29
- swi r30, r1, PT_R30
- swi r31, r1, PT_R31
- /* special purpose registers */
- mfs r11, rmsr
- swi r11, r1, PT_MSR
- mfs r11, rear
- swi r11, r1, PT_EAR
- mfs r11, resr
- swi r11, r1, PT_ESR
- mfs r11, rfsr
- swi r11, r1, PT_FSR
- /* reload original stack pointer and save it */
- lwi r11, r0, PER_CPU(ENTRY_SP)
- swi r11, r1, PT_R1
- /* update mode indicator we are in kernel mode */
- addik r11, r0, 1
- swi r11, r0, PER_CPU(KM)
- /* restore r31 */
- lwi r31, r0, PER_CPU(CURRENT_SAVE)
- /* prepare the link register, the argument and jump */
- addik r15, r0, ret_from_intr - 8
- addk r6, r0, r15
- braid do_IRQ
- add r5, r0, r1
-
-ret_from_intr:
- lwi r11, r1, PT_MODE
- bneid r11, no_intr_resched
-
-3:
- lwi r6, r31, TS_THREAD_INFO /* get thread info */
- lwi r19, r6, TI_FLAGS /* get flags in thread info */
- /* do an extra work if any bits are set */
-
- andi r11, r19, _TIF_NEED_RESCHED
- beqi r11, 1f
- bralid r15, schedule
- nop
- bri 3b
-1: andi r11, r19, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME
- beqid r11, no_intr_resched
- addk r5, r1, r0
- bralid r15, do_notify_resume
- addk r6, r0, r0
- bri 3b
-
-no_intr_resched:
- /* Disable interrupts, we are now committed to the state restore */
- disable_irq
-
- /* save mode indicator */
- lwi r11, r1, PT_MODE
- swi r11, r0, PER_CPU(KM)
-
- /* save r31 */
- swi r31, r0, PER_CPU(CURRENT_SAVE)
-restore_context:
- /* special purpose registers */
- lwi r11, r1, PT_FSR
- mts rfsr, r11
- lwi r11, r1, PT_ESR
- mts resr, r11
- lwi r11, r1, PT_EAR
- mts rear, r11
- lwi r11, r1, PT_MSR
- mts rmsr, r11
-
- lwi r31, r1, PT_R31
- lwi r30, r1, PT_R30
- lwi r29, r1, PT_R29
- lwi r28, r1, PT_R28
- lwi r27, r1, PT_R27
- lwi r26, r1, PT_R26
- lwi r25, r1, PT_R25
- lwi r24, r1, PT_R24
- lwi r23, r1, PT_R23
- lwi r22, r1, PT_R22
- lwi r21, r1, PT_R21
- lwi r20, r1, PT_R20
- lwi r19, r1, PT_R19
- lwi r18, r1, PT_R18
- lwi r17, r1, PT_R17
- lwi r16, r1, PT_R16
- lwi r15, r1, PT_R15
- lwi r14, r1, PT_PC
- lwi r13, r1, PT_R13
- lwi r12, r1, PT_R12
- lwi r11, r1, PT_R11
- lwi r10, r1, PT_R10
- lwi r9, r1, PT_R9
- lwi r8, r1, PT_R8
- lwi r7, r1, PT_R7
- lwi r6, r1, PT_R6
- lwi r5, r1, PT_R5
- lwi r4, r1, PT_R4
- lwi r3, r1, PT_R3
- lwi r2, r1, PT_R2
- lwi r1, r1, PT_R1
- rtid r14, 0
- nop
-
-ENTRY(_reset)
- brai 0;
-
-ENTRY(_user_exception)
- swi r1, r0, PER_CPU(ENTRY_SP) /* save the current sp */
- swi r11, r0, PER_CPU(R11_SAVE) /* temporarily save r11 */
- lwi r11, r0, PER_CPU(KM) /* load mode indicator */
- beqid r11, 1f /* Already in kernel mode? */
- nop
- brid 2f /* jump over */
- addik r1, r1, (-PT_SIZE) /* Room for pt_regs (delay slot) */
-1: /* Switch to kernel stack */
- lwi r1, r0, PER_CPU(CURRENT_SAVE) /* get the saved current */
- lwi r1, r1, TS_THREAD_INFO /* get the thread info */
- /* calculate kernel stack pointer */
- addik r1, r1, THREAD_SIZE - PT_SIZE
-2:
- swi r11, r1, PT_MODE /* store the mode */
- lwi r11, r0, PER_CPU(R11_SAVE) /* reload r11 */
- /* save them on stack */
- swi r2, r1, PT_R2
- swi r3, r1, PT_R3 /* r3: _always_ in clobber list; see unistd.h */
- swi r4, r1, PT_R4 /* r4: _always_ in clobber list; see unistd.h */
- swi r5, r1, PT_R5
- swi r6, r1, PT_R6
- swi r7, r1, PT_R7
- swi r8, r1, PT_R8
- swi r9, r1, PT_R9
- swi r10, r1, PT_R10
- swi r11, r1, PT_R11
- /* r12: _always_ in clobber list; see unistd.h */
- swi r12, r1, PT_R12
- swi r13, r1, PT_R13
- /* r14: _always_ in clobber list; see unistd.h */
- swi r14, r1, PT_R14
- /* but we want to return to the next inst. */
- addik r14, r14, 0x4
- swi r14, r1, PT_PC /* increment by 4 and store in pc */
- swi r15, r1, PT_R15
- swi r16, r1, PT_R16
- swi r17, r1, PT_R17
- swi r18, r1, PT_R18
- swi r19, r1, PT_R19
- swi r20, r1, PT_R20
- swi r21, r1, PT_R21
- swi r22, r1, PT_R22
- swi r23, r1, PT_R23
- swi r24, r1, PT_R24
- swi r25, r1, PT_R25
- swi r26, r1, PT_R26
- swi r27, r1, PT_R27
- swi r28, r1, PT_R28
- swi r29, r1, PT_R29
- swi r30, r1, PT_R30
- swi r31, r1, PT_R31
-
- disable_irq
- nop /* make sure IE bit is in effect */
- clear_bip /* once IE is in effect it is safe to clear BIP */
- nop
-
- /* special purpose registers */
- mfs r11, rmsr
- swi r11, r1, PT_MSR
- mfs r11, rear
- swi r11, r1, PT_EAR
- mfs r11, resr
- swi r11, r1, PT_ESR
- mfs r11, rfsr
- swi r11, r1, PT_FSR
- /* reload original stack pointer and save it */
- lwi r11, r0, PER_CPU(ENTRY_SP)
- swi r11, r1, PT_R1
- /* update mode indicator we are in kernel mode */
- addik r11, r0, 1
- swi r11, r0, PER_CPU(KM)
- /* restore r31 */
- lwi r31, r0, PER_CPU(CURRENT_SAVE)
- /* re-enable interrupts now we are in kernel mode */
- enable_irq
-
- /* See if the system call number is valid. */
- addi r11, r12, -__NR_syscalls
- bgei r11, 1f /* return to user if not valid */
- /* Figure out which function to use for this system call. */
- /* Note Microblaze barrel shift is optional, so don't rely on it */
- add r12, r12, r12 /* convert num -> ptr */
- addik r30, r0, 1 /* restarts allowed */
- add r12, r12, r12
- lwi r12, r12, sys_call_table /* Get function pointer */
- addik r15, r0, ret_to_user-8 /* set return address */
- bra r12 /* Make the system call. */
- bri 0 /* won't reach here */
-1:
- brid ret_to_user /* jump to syscall epilogue */
- addi r3, r0, -ENOSYS /* set errno in delay slot */
-
-/*
- * Debug traps are like a system call, but entered via brki r14, 0x60
- * All we need to do is send the SIGTRAP signal to current, ptrace and
- * do_notify_resume will handle the rest
- */
-ENTRY(_debug_exception)
- swi r1, r0, PER_CPU(ENTRY_SP) /* save the current sp */
- lwi r1, r0, PER_CPU(CURRENT_SAVE) /* get the saved current */
- lwi r1, r1, TS_THREAD_INFO /* get the thread info */
- addik r1, r1, THREAD_SIZE - PT_SIZE /* get the kernel stack */
- swi r11, r0, PER_CPU(R11_SAVE) /* temporarily save r11 */
- lwi r11, r0, PER_CPU(KM) /* load mode indicator */
-//save_context:
- swi r11, r1, PT_MODE /* store the mode */
- lwi r11, r0, PER_CPU(R11_SAVE) /* reload r11 */
- /* save them on stack */
- swi r2, r1, PT_R2
- swi r3, r1, PT_R3 /* r3: _always_ in clobber list; see unistd.h */
- swi r4, r1, PT_R4 /* r4: _always_ in clobber list; see unistd.h */
- swi r5, r1, PT_R5
- swi r6, r1, PT_R6
- swi r7, r1, PT_R7
- swi r8, r1, PT_R8
- swi r9, r1, PT_R9
- swi r10, r1, PT_R10
- swi r11, r1, PT_R11
- /* r12: _always_ in clobber list; see unistd.h */
- swi r12, r1, PT_R12
- swi r13, r1, PT_R13
- /* r14: _always_ in clobber list; see unistd.h */
- swi r14, r1, PT_R14
- swi r14, r1, PT_PC /* Will return to interrupted instruction */
- swi r15, r1, PT_R15
- swi r16, r1, PT_R16
- swi r17, r1, PT_R17
- swi r18, r1, PT_R18
- swi r19, r1, PT_R19
- swi r20, r1, PT_R20
- swi r21, r1, PT_R21
- swi r22, r1, PT_R22
- swi r23, r1, PT_R23
- swi r24, r1, PT_R24
- swi r25, r1, PT_R25
- swi r26, r1, PT_R26
- swi r27, r1, PT_R27
- swi r28, r1, PT_R28
- swi r29, r1, PT_R29
- swi r30, r1, PT_R30
- swi r31, r1, PT_R31
-
- disable_irq
- nop /* make sure IE bit is in effect */
- clear_bip /* once IE is in effect it is safe to clear BIP */
- nop
-
- /* special purpose registers */
- mfs r11, rmsr
- swi r11, r1, PT_MSR
- mfs r11, rear
- swi r11, r1, PT_EAR
- mfs r11, resr
- swi r11, r1, PT_ESR
- mfs r11, rfsr
- swi r11, r1, PT_FSR
- /* reload original stack pointer and save it */
- lwi r11, r0, PER_CPU(ENTRY_SP)
- swi r11, r1, PT_R1
- /* update mode indicator we are in kernel mode */
- addik r11, r0, 1
- swi r11, r0, PER_CPU(KM)
- /* restore r31 */
- lwi r31, r0, PER_CPU(CURRENT_SAVE)
- /* re-enable interrupts now we are in kernel mode */
- enable_irq
-
- addi r5, r0, SIGTRAP /* sending the trap signal */
- add r6, r0, r31 /* to current */
- bralid r15, send_sig
- add r7, r0, r0 /* 3rd param zero */
-
- addik r30, r0, 1 /* restarts allowed ??? */
- /* Restore r3/r4 to work around how ret_to_user works */
- lwi r3, r1, PT_R3
- lwi r4, r1, PT_R4
- bri ret_to_user
-
-ENTRY(_break)
- bri 0
-
-/* struct task_struct *_switch_to(struct thread_info *prev,
- struct thread_info *next); */
-ENTRY(_switch_to)
- /* prepare return value */
- addk r3, r0, r31
-
- /* save registers in cpu_context */
- /* use r11 and r12, volatile registers, as temp register */
- addik r11, r5, TI_CPU_CONTEXT
- swi r1, r11, CC_R1
- swi r2, r11, CC_R2
- /* skip volatile registers.
- * they are saved on stack when we jumped to _switch_to() */
- /* dedicated registers */
- swi r13, r11, CC_R13
- swi r14, r11, CC_R14
- swi r15, r11, CC_R15
- swi r16, r11, CC_R16
- swi r17, r11, CC_R17
- swi r18, r11, CC_R18
- /* save non-volatile registers */
- swi r19, r11, CC_R19
- swi r20, r11, CC_R20
- swi r21, r11, CC_R21
- swi r22, r11, CC_R22
- swi r23, r11, CC_R23
- swi r24, r11, CC_R24
- swi r25, r11, CC_R25
- swi r26, r11, CC_R26
- swi r27, r11, CC_R27
- swi r28, r11, CC_R28
- swi r29, r11, CC_R29
- swi r30, r11, CC_R30
- /* special purpose registers */
- mfs r12, rmsr
- swi r12, r11, CC_MSR
- mfs r12, rear
- swi r12, r11, CC_EAR
- mfs r12, resr
- swi r12, r11, CC_ESR
- mfs r12, rfsr
- swi r12, r11, CC_FSR
-
- /* update r31, the current */
- lwi r31, r6, TI_TASK
- swi r31, r0, PER_CPU(CURRENT_SAVE)
-
- /* get new process' cpu context and restore */
- addik r11, r6, TI_CPU_CONTEXT
-
- /* special purpose registers */
- lwi r12, r11, CC_FSR
- mts rfsr, r12
- lwi r12, r11, CC_ESR
- mts resr, r12
- lwi r12, r11, CC_EAR
- mts rear, r12
- lwi r12, r11, CC_MSR
- mts rmsr, r12
- /* non-volatile registers */
- lwi r30, r11, CC_R30
- lwi r29, r11, CC_R29
- lwi r28, r11, CC_R28
- lwi r27, r11, CC_R27
- lwi r26, r11, CC_R26
- lwi r25, r11, CC_R25
- lwi r24, r11, CC_R24
- lwi r23, r11, CC_R23
- lwi r22, r11, CC_R22
- lwi r21, r11, CC_R21
- lwi r20, r11, CC_R20
- lwi r19, r11, CC_R19
- /* dedicated registers */
- lwi r18, r11, CC_R18
- lwi r17, r11, CC_R17
- lwi r16, r11, CC_R16
- lwi r15, r11, CC_R15
- lwi r14, r11, CC_R14
- lwi r13, r11, CC_R13
- /* skip volatile registers */
- lwi r2, r11, CC_R2
- lwi r1, r11, CC_R1
-
- rtsd r15, 8
- nop
-
-ENTRY(ret_from_fork)
- addk r5, r0, r3
- brlid r15, schedule_tail
- nop
- swi r31, r1, PT_R31 /* save r31 in user context. */
- /* will soon be restored to r31 in ret_to_user */
- addk r3, r0, r0
- brid ret_to_user
- nop
-
-ENTRY(ret_from_kernel_thread)
- brlid r15, schedule_tail
- addk r5, r0, r3
- brald r15, r20
- addk r5, r0, r19
- brid ret_to_user
- addk r3, r0, r0
-
-work_pending:
- lwi r11, r1, PT_MODE
- bneid r11, 2f
-3:
- enable_irq
- andi r11, r19, _TIF_NEED_RESCHED
- beqi r11, 1f
- bralid r15, schedule
- nop
- bri 4f
-1: andi r11, r19, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME
- beqi r11, no_work_pending
- addk r5, r30, r0
- bralid r15, do_notify_resume
- addik r6, r0, 1
- addk r30, r0, r0 /* no restarts from now on */
-4:
- disable_irq
- lwi r6, r31, TS_THREAD_INFO /* get thread info */
- lwi r19, r6, TI_FLAGS /* get flags in thread info */
- bri 3b
-
-ENTRY(ret_to_user)
- disable_irq
-
- swi r4, r1, PT_R4 /* return val */
- swi r3, r1, PT_R3 /* return val */
-
- lwi r6, r31, TS_THREAD_INFO /* get thread info */
- lwi r19, r6, TI_FLAGS /* get flags in thread info */
- bnei r19, work_pending /* do an extra work if any bits are set */
-no_work_pending:
- disable_irq
-
-2:
- /* save r31 */
- swi r31, r0, PER_CPU(CURRENT_SAVE)
- /* save mode indicator */
- lwi r18, r1, PT_MODE
- swi r18, r0, PER_CPU(KM)
-//restore_context:
- /* special purpose registers */
- lwi r18, r1, PT_FSR
- mts rfsr, r18
- lwi r18, r1, PT_ESR
- mts resr, r18
- lwi r18, r1, PT_EAR
- mts rear, r18
- lwi r18, r1, PT_MSR
- mts rmsr, r18
-
- lwi r31, r1, PT_R31
- lwi r30, r1, PT_R30
- lwi r29, r1, PT_R29
- lwi r28, r1, PT_R28
- lwi r27, r1, PT_R27
- lwi r26, r1, PT_R26
- lwi r25, r1, PT_R25
- lwi r24, r1, PT_R24
- lwi r23, r1, PT_R23
- lwi r22, r1, PT_R22
- lwi r21, r1, PT_R21
- lwi r20, r1, PT_R20
- lwi r19, r1, PT_R19
- lwi r18, r1, PT_R18
- lwi r17, r1, PT_R17
- lwi r16, r1, PT_R16
- lwi r15, r1, PT_R15
- lwi r14, r1, PT_PC
- lwi r13, r1, PT_R13
- lwi r12, r1, PT_R12
- lwi r11, r1, PT_R11
- lwi r10, r1, PT_R10
- lwi r9, r1, PT_R9
- lwi r8, r1, PT_R8
- lwi r7, r1, PT_R7
- lwi r6, r1, PT_R6
- lwi r5, r1, PT_R5
- lwi r4, r1, PT_R4 /* return val */
- lwi r3, r1, PT_R3 /* return val */
- lwi r2, r1, PT_R2
- lwi r1, r1, PT_R1
-
- rtid r14, 0
- nop
-
-sys_rt_sigreturn_wrapper:
- addk r30, r0, r0 /* no restarts for this one */
- brid sys_rt_sigreturn
- addk r5, r1, r0
-
- /* Interrupt vector table */
- .section .init.ivt, "ax"
- .org 0x0
- brai _reset
- brai _user_exception
- brai _interrupt
- brai _break
- brai _hw_exception_handler
- .org 0x60
- brai _debug_exception
-
-.section .rodata,"a"
-#include "syscall_table.S"
-
-syscall_table_size=(.-sys_call_table)
-
-type_SYSCALL:
- .ascii "SYSCALL\0"
-type_IRQ:
- .ascii "IRQ\0"
-type_IRQ_PREEMPT:
- .ascii "IRQ (PREEMPTED)\0"
-type_SYSCALL_PREEMPT:
- .ascii " SYSCALL (PREEMPTED)\0"
-
- /*
- * Trap decoding for stack unwinder
- * Tuples are (start addr, end addr, string)
- * If return address lies on [start addr, end addr],
- * unwinder displays 'string'
- */
-
- .align 4
-.global microblaze_trap_handlers
-microblaze_trap_handlers:
- /* Exact matches come first */
- .word ret_to_user ; .word ret_to_user ; .word type_SYSCALL
- .word ret_from_intr; .word ret_from_intr ; .word type_IRQ
- /* Fuzzy matches go here */
- .word ret_from_intr; .word no_intr_resched; .word type_IRQ_PREEMPT
- .word work_pending ; .word no_work_pending; .word type_SYSCALL_PREEMPT
- /* End of table */
- .word 0 ; .word 0 ; .word 0
diff --git a/arch/microblaze/kernel/entry.S b/arch/microblaze/kernel/entry.S
index de7083bd1d24..582d7256d815 100644
--- a/arch/microblaze/kernel/entry.S
+++ b/arch/microblaze/kernel/entry.S
@@ -27,9 +27,11 @@
#include <asm/page.h>
#include <asm/unistd.h>
+#include <asm/xilinx_mb_manager.h>
#include <linux/errno.h>
#include <asm/signal.h>
+#include <asm/mmu.h>
#undef DEBUG
@@ -287,6 +289,44 @@ syscall_debug_table:
.text
+.extern cpuinfo
+
+C_ENTRY(mb_flush_dcache):
+ addik r1, r1, -PT_SIZE
+ SAVE_REGS
+
+ addik r3, r0, cpuinfo
+ lwi r7, r3, CI_DCS
+ lwi r8, r3, CI_DCL
+ sub r9, r7, r8
+1:
+ wdc.flush r9, r0
+ bgtid r9, 1b
+ addk r9, r9, r8
+
+ RESTORE_REGS
+ addik r1, r1, PT_SIZE
+ rtsd r15, 8
+ nop
+
+C_ENTRY(mb_invalidate_icache):
+ addik r1, r1, -PT_SIZE
+ SAVE_REGS
+
+ addik r3, r0, cpuinfo
+ lwi r7, r3, CI_ICS
+ lwi r8, r3, CI_ICL
+ sub r9, r7, r8
+1:
+ wic r9, r0
+ bgtid r9, 1b
+ addk r9, r9, r8
+
+ RESTORE_REGS
+ addik r1, r1, PT_SIZE
+ rtsd r15, 8
+ nop
+
/*
* User trap.
*
@@ -456,7 +496,7 @@ TRAP_return: /* Make global symbol for debugging */
/* This the initial entry point for a new child thread, with an appropriate
- stack in place that makes it look the the child is in the middle of an
+ stack in place that makes it look like the child is in the middle of a
syscall. This function is actually `returned to' from switch_thread
(copy_thread makes ret_from_fork the return address in each new thread's
saved context). */
@@ -728,7 +768,7 @@ no_intr_resched:
bri 6f;
/* MS: Return to kernel state. */
2:
-#ifdef CONFIG_PREEMPT
+#ifdef CONFIG_PREEMPTION
lwi r11, CURRENT_TASK, TS_THREAD_INFO;
/* MS: get preempt_count from thread info */
lwi r5, r11, TI_PREEMPT_COUNT;
@@ -753,6 +793,160 @@ IRQ_return: /* MS: Make global symbol for debugging */
rtid r14, 0
nop
+#ifdef CONFIG_MB_MANAGER
+
+#define PT_PID PT_SIZE
+#define PT_TLBI PT_SIZE + 4
+#define PT_ZPR PT_SIZE + 8
+#define PT_TLBL0 PT_SIZE + 12
+#define PT_TLBH0 PT_SIZE + 16
+
+C_ENTRY(_xtmr_manager_reset):
+ lwi r1, r0, xmb_manager_stackpointer
+
+ /* Restore MSR */
+ lwi r2, r1, PT_MSR
+ mts rmsr, r2
+ bri 4
+
+ /* restore Special purpose registers */
+ lwi r2, r1, PT_PID
+ mts rpid, r2
+
+ lwi r2, r1, PT_TLBI
+ mts rtlbx, r2
+
+ lwi r2, r1, PT_ZPR
+ mts rzpr, r2
+
+#if CONFIG_XILINX_MICROBLAZE0_USE_FPU
+ lwi r2, r1, PT_FSR
+ mts rfsr, r2
+#endif
+
+ /* restore all the tlb's */
+ addik r3, r0, TOPHYS(tlb_skip)
+ addik r6, r0, PT_TLBL0
+ addik r7, r0, PT_TLBH0
+restore_tlb:
+ add r6, r6, r1
+ add r7, r7, r1
+ lwi r2, r6, 0
+ mts rtlblo, r2
+ lwi r2, r7, 0
+ mts rtlbhi, r2
+ addik r6, r6, 4
+ addik r7, r7, 4
+ bgtid r3, restore_tlb
+ addik r3, r3, -1
+
+ lwi r5, r0, TOPHYS(xmb_manager_dev)
+ lwi r8, r0, TOPHYS(xmb_manager_reset_callback)
+ set_vms
+ /* return from reset need -8 to adjust for rtsd r15, 8 */
+ addik r15, r0, ret_from_reset - 8
+ rtbd r8, 0
+ nop
+
+ret_from_reset:
+ set_bip /* Ints masked for state restore */
+ VM_OFF
+ /* MS: Restore all regs */
+ RESTORE_REGS
+ lwi r14, r1, PT_R14
+ lwi r16, r1, PT_PC
+ addik r1, r1, PT_SIZE + 36
+ rtbd r16, 0
+ nop
+
+/*
+ * Break handler for MB Manager. Enter to _xmb_manager_break by
+ * injecting fault in one of the TMR Microblaze core.
+ * FIXME: This break handler supports getting
+ * called from kernel space only.
+ */
+C_ENTRY(_xmb_manager_break):
+ /*
+ * Reserve memory in the stack for context store/restore
+ * (which includes memory for storing tlbs (max two tlbs))
+ */
+ addik r1, r1, -PT_SIZE - 36
+ swi r1, r0, xmb_manager_stackpointer
+ SAVE_REGS
+ swi r14, r1, PT_R14 /* rewrite saved R14 value */
+ swi r16, r1, PT_PC; /* PC and r16 are the same */
+
+ lwi r6, r0, TOPHYS(xmb_manager_baseaddr)
+ lwi r7, r0, TOPHYS(xmb_manager_crval)
+ /*
+ * When the break vector gets asserted because of error injection,
+ * the break signal must be blocked before exiting from the
+ * break handler, below code configures the tmr manager
+ * control register to block break signal.
+ */
+ swi r7, r6, 0
+
+ /* Save the special purpose registers */
+ mfs r2, rpid
+ swi r2, r1, PT_PID
+
+ mfs r2, rtlbx
+ swi r2, r1, PT_TLBI
+
+ mfs r2, rzpr
+ swi r2, r1, PT_ZPR
+
+#if CONFIG_XILINX_MICROBLAZE0_USE_FPU
+ mfs r2, rfsr
+ swi r2, r1, PT_FSR
+#endif
+ mfs r2, rmsr
+ swi r2, r1, PT_MSR
+
+ /* Save all the tlb's */
+ addik r3, r0, TOPHYS(tlb_skip)
+ addik r6, r0, PT_TLBL0
+ addik r7, r0, PT_TLBH0
+save_tlb:
+ add r6, r6, r1
+ add r7, r7, r1
+ mfs r2, rtlblo
+ swi r2, r6, 0
+ mfs r2, rtlbhi
+ swi r2, r7, 0
+ addik r6, r6, 4
+ addik r7, r7, 4
+ bgtid r3, save_tlb
+ addik r3, r3, -1
+
+ lwi r5, r0, TOPHYS(xmb_manager_dev)
+ lwi r8, r0, TOPHYS(xmb_manager_callback)
+ /* return from break need -8 to adjust for rtsd r15, 8 */
+ addik r15, r0, ret_from_break - 8
+ rtbd r8, 0
+ nop
+
+ret_from_break:
+ /* flush the d-cache */
+ bralid r15, mb_flush_dcache
+ nop
+
+ /*
+ * To make sure microblaze i-cache is in a proper state
+ * invalidate the i-cache.
+ */
+ bralid r15, mb_invalidate_icache
+ nop
+
+ set_bip; /* Ints masked for state restore */
+ VM_OFF;
+ mbar 1
+ mbar 2
+ bri 4
+ suspend
+ nop
+#endif
+
/*
* Debug trap for KGDB. Enter to _debug_exception by brki r16, 0x18
* and call handling function with saved pt_regs
@@ -957,25 +1151,132 @@ ENTRY(_switch_to)
rtsd r15, 8
nop
+#ifdef CONFIG_MB_MANAGER
+.global xmb_inject_err
+.section .text
+.align 2
+.ent xmb_inject_err
+.type xmb_inject_err, @function
+xmb_inject_err:
+ addik r1, r1, -PT_SIZE
+ SAVE_REGS
+
+ /* Switch to real mode */
+ VM_OFF;
+ set_bip;
+ mbar 1
+ mbar 2
+ bralid r15, XMB_INJECT_ERR_OFFSET
+ nop;
+
+ /* enable virtual mode */
+ set_vms;
+ /* barrier for instructions and data accesses */
+ mbar 1
+ mbar 2
+ /*
+ * Enable Interrupts, Virtual Protected Mode, equalize
+ * initial state for all possible entries.
+ */
+ rtbd r0, 1f
+ nop;
+1:
+ RESTORE_REGS
+ addik r1, r1, PT_SIZE
+ rtsd r15, 8;
+ nop;
+.end xmb_inject_err
+
+.section .data
+.global xmb_manager_dev
+.global xmb_manager_baseaddr
+.global xmb_manager_crval
+.global xmb_manager_callback
+.global xmb_manager_reset_callback
+.global xmb_manager_stackpointer
+.align 4
+xmb_manager_dev:
+ .long 0
+xmb_manager_baseaddr:
+ .long 0
+xmb_manager_crval:
+ .long 0
+xmb_manager_callback:
+ .long 0
+xmb_manager_reset_callback:
+ .long 0
+xmb_manager_stackpointer:
+ .long 0
+
+/*
+ * When the break vector gets asserted because of error injection,
+ * the break signal must be blocked before exiting from the
+ * break handler, Below api updates the manager address and
+ * control register and error count callback arguments,
+ * which will be used by the break handler to block the
+ * break and call the callback function.
+ */
+.global xmb_manager_register
+.section .text
+.align 2
+.ent xmb_manager_register
+.type xmb_manager_register, @function
+xmb_manager_register:
+ swi r5, r0, xmb_manager_baseaddr
+ swi r6, r0, xmb_manager_crval
+ swi r7, r0, xmb_manager_callback
+ swi r8, r0, xmb_manager_dev
+ swi r9, r0, xmb_manager_reset_callback
+
+ rtsd r15, 8;
+ nop;
+.end xmb_manager_register
+#endif
+
ENTRY(_reset)
+ VM_OFF
brai 0; /* Jump to reset vector */
/* These are compiled and loaded into high memory, then
* copied into place in mach_early_setup */
.section .init.ivt, "ax"
-#if CONFIG_MANUAL_RESET_VECTOR
+#if CONFIG_MANUAL_RESET_VECTOR && !defined(CONFIG_MB_MANAGER)
.org 0x0
brai CONFIG_MANUAL_RESET_VECTOR
+#elif defined(CONFIG_MB_MANAGER)
+ .org 0x0
+ brai TOPHYS(_xtmr_manager_reset);
#endif
.org 0x8
brai TOPHYS(_user_exception); /* syscall handler */
.org 0x10
brai TOPHYS(_interrupt); /* Interrupt handler */
+#ifdef CONFIG_MB_MANAGER
+ .org 0x18
+ brai TOPHYS(_xmb_manager_break); /* microblaze manager break handler */
+#else
.org 0x18
brai TOPHYS(_debug_exception); /* debug trap handler */
+#endif
.org 0x20
brai TOPHYS(_hw_exception_handler); /* HW exception handler */
+#ifdef CONFIG_MB_MANAGER
+ /*
+ * For TMR Inject API which injects the error should
+ * be executed from LMB.
+ * TMR Inject is programmed with address of 0x200 so that
+ * when program counter matches with this address error will
+ * be injected. 0x200 is expected to be next available bram
+ * offset, hence used for this api.
+ */
+ .org XMB_INJECT_ERR_OFFSET
+xmb_inject_error:
+ nop
+ rtsd r15, 8
+ nop
+#endif
+
.section .rodata,"a"
#include "syscall_table.S"
diff --git a/arch/microblaze/kernel/exceptions.c b/arch/microblaze/kernel/exceptions.c
index cf99c411503e..fd153d5fab98 100644
--- a/arch/microblaze/kernel/exceptions.c
+++ b/arch/microblaze/kernel/exceptions.c
@@ -44,10 +44,10 @@ void die(const char *str, struct pt_regs *fp, long err)
pr_warn("Oops: %s, sig: %ld\n", str, err);
show_regs(fp);
spin_unlock_irq(&die_lock);
- /* do_exit() should take care of panic'ing from an interrupt
+ /* make_task_dead() should take care of panic'ing from an interrupt
* context so we don't handle it here
*/
- do_exit(err);
+ make_task_dead(err);
}
/* for user application debugging */
@@ -69,9 +69,7 @@ void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
asmlinkage void full_exception(struct pt_regs *regs, unsigned int type,
int fsr, int addr)
{
-#ifdef CONFIG_MMU
addr = regs->pc;
-#endif
#if 0
pr_warn("Exception %02x in %s mode, FSR=%08x PC=%08x ESR=%08x\n",
@@ -132,13 +130,10 @@ asmlinkage void full_exception(struct pt_regs *regs, unsigned int type,
fsr = FPE_FLTRES;
_exception(SIGFPE, regs, fsr, addr);
break;
-
-#ifdef CONFIG_MMU
case MICROBLAZE_PRIVILEGED_EXCEPTION:
pr_debug("Privileged exception\n");
_exception(SIGILL, regs, ILL_PRVOPC, addr);
break;
-#endif
default:
/* FIXME what to do in unexpected exception */
pr_warn("Unexpected exception %02x PC=%08x in %s mode\n",
diff --git a/arch/microblaze/kernel/ftrace.c b/arch/microblaze/kernel/ftrace.c
index 224eea40e1ee..188749d62709 100644
--- a/arch/microblaze/kernel/ftrace.c
+++ b/arch/microblaze/kernel/ftrace.c
@@ -163,11 +163,6 @@ int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
return ret;
}
-int __init ftrace_dyn_arch_init(void)
-{
- return 0;
-}
-
int ftrace_update_ftrace_func(ftrace_func_t func)
{
unsigned long ip = (unsigned long)(&ftrace_call);
diff --git a/arch/microblaze/kernel/head.S b/arch/microblaze/kernel/head.S
index 7d2894418691..ec2fcb545e64 100644
--- a/arch/microblaze/kernel/head.S
+++ b/arch/microblaze/kernel/head.S
@@ -34,7 +34,6 @@
#include <asm/page.h>
#include <linux/of_fdt.h> /* for OF_DT_HEADER */
-#ifdef CONFIG_MMU
#include <asm/setup.h> /* COMMAND_LINE_SIZE */
#include <asm/mmu.h>
#include <asm/processor.h>
@@ -48,8 +47,6 @@ empty_zero_page:
swapper_pg_dir:
.space PAGE_SIZE
-#endif /* CONFIG_MMU */
-
.section .rodata
.align 4
endian_check:
@@ -108,8 +105,6 @@ _copy_fdt:
addik r3, r3, -4 /* descrement loop */
no_fdt_arg:
-#ifdef CONFIG_MMU
-
#ifndef CONFIG_CMDLINE_BOOL
/*
* handling command line
@@ -121,10 +116,10 @@ no_fdt_arg:
tophys(r4,r4) /* convert to phys address */
ori r3, r0, COMMAND_LINE_SIZE - 1 /* number of loops */
_copy_command_line:
- /* r2=r5+r6 - r5 contain pointer to command line */
+ /* r2=r5+r11 - r5 contain pointer to command line */
lbu r2, r5, r11
beqid r2, skip /* Skip if no data */
- sb r2, r4, r11 /* addr[r4+r6]= r2 */
+ sb r2, r4, r11 /* addr[r4+r11]= r2 */
addik r11, r11, 1 /* increment counting */
bgtid r3, _copy_command_line /* loop for all entries */
addik r3, r3, -1 /* decrement loop */
@@ -139,8 +134,8 @@ skip:
ori r4, r0, TOPHYS(_bram_load_start) /* save bram context */
ori r3, r0, (LMB_SIZE - 4)
_copy_bram:
- lw r7, r0, r11 /* r7 = r0 + r6 */
- sw r7, r4, r11 /* addr[r4 + r6] = r7 */
+ lw r7, r0, r11 /* r7 = r0 + r11 */
+ sw r7, r4, r11 /* addr[r4 + r11] = r7 */
addik r11, r11, 4 /* increment counting */
bgtid r3, _copy_bram /* loop for all entries */
addik r3, r3, -4 /* descrement loop */
@@ -329,7 +324,6 @@ turn_on_mmu:
nop
start_here:
-#endif /* CONFIG_MMU */
/* Initialize small data anchors */
addik r13, r0, _KERNEL_SDA_BASE_
@@ -345,11 +339,6 @@ start_here:
brald r15, r11
nop
-#ifndef CONFIG_MMU
- addik r15, r0, machine_halt
- braid start_kernel
- nop
-#else
/*
* Initialize the MMU.
*/
@@ -383,4 +372,3 @@ kernel_load_context:
nop
rted r17, 0 /* enable MMU and jump to start_kernel */
nop
-#endif /* CONFIG_MMU */
diff --git a/arch/microblaze/kernel/hw_exception_handler.S b/arch/microblaze/kernel/hw_exception_handler.S
index 95558f32d60a..07ea23965f81 100644
--- a/arch/microblaze/kernel/hw_exception_handler.S
+++ b/arch/microblaze/kernel/hw_exception_handler.S
@@ -68,9 +68,9 @@
#include <asm/entry.h>
#include <asm/current.h>
#include <linux/linkage.h>
+#include <linux/pgtable.h>
#include <asm/mmu.h>
-#include <asm/pgtable.h>
#include <asm/signal.h>
#include <asm/registers.h>
#include <asm/asm-offsets.h>
@@ -80,7 +80,6 @@
/* Helpful Macros */
#define NUM_TO_REG(num) r ## num
-#ifdef CONFIG_MMU
#define RESTORE_STATE \
lwi r5, r1, 0; \
mts rmsr, r5; \
@@ -92,7 +91,6 @@
lwi r11, r1, PT_R11; \
lwi r31, r1, PT_R31; \
lwi r1, r1, PT_R1;
-#endif /* CONFIG_MMU */
#define LWREG_NOP \
bri ex_handler_unhandled; \
@@ -102,10 +100,6 @@
bri ex_handler_unhandled; \
nop;
-/* FIXME this is weird - for noMMU kernel is not possible to use brid
- * instruction which can shorten executed time
- */
-
/* r3 is the source */
#define R3_TO_LWREG_V(regnum) \
swi r3, r1, 4 * regnum; \
@@ -126,7 +120,6 @@
or r3, r0, NUM_TO_REG (regnum); \
bri ex_sw_tail;
-#ifdef CONFIG_MMU
#define R3_TO_LWREG_VM_V(regnum) \
brid ex_lw_end_vm; \
swi r3, r7, 4 * regnum;
@@ -193,7 +186,6 @@
.endm
#endif
-#endif /* CONFIG_MMU */
.extern other_exception_handler /* Defined in exception.c */
@@ -251,7 +243,6 @@
*/
/* wrappers to restore state before coming to entry.S */
-#ifdef CONFIG_MMU
.section .data
.align 4
pt_pool_space:
@@ -316,31 +307,24 @@ _MB_HW_ExceptionVectorTable:
.long TOPHYS(ex_handler_unhandled)
.long TOPHYS(ex_handler_unhandled)
.long TOPHYS(ex_handler_unhandled)
-#endif
.global _hw_exception_handler
.section .text
.align 4
.ent _hw_exception_handler
_hw_exception_handler:
-#ifndef CONFIG_MMU
- addik r1, r1, -(EX_HANDLER_STACK_SIZ); /* Create stack frame */
-#else
swi r1, r0, TOPHYS(pt_pool_space + PT_R1); /* GET_SP */
/* Save date to kernel memory. Here is the problem
* when you came from user space */
ori r1, r0, TOPHYS(pt_pool_space);
-#endif
swi r3, r1, PT_R3
swi r4, r1, PT_R4
swi r5, r1, PT_R5
swi r6, r1, PT_R6
-#ifdef CONFIG_MMU
swi r11, r1, PT_R11
swi r31, r1, PT_R31
lwi r31, r0, TOPHYS(PER_CPU(CURRENT_SAVE)) /* get saved current */
-#endif
mfs r5, rmsr;
nop
@@ -350,18 +334,8 @@ _hw_exception_handler:
mfs r3, rear;
nop
-#ifndef CONFIG_MMU
- andi r5, r4, 0x1000; /* Check ESR[DS] */
- beqi r5, not_in_delay_slot; /* Branch if ESR[DS] not set */
- mfs r17, rbtr; /* ESR[DS] set - return address in BTR */
- nop
-not_in_delay_slot:
- swi r17, r1, PT_R17
-#endif
-
andi r5, r4, 0x1F; /* Extract ESR[EXC] */
-#ifdef CONFIG_MMU
/* Calculate exception vector offset = r5 << 2 */
addk r6, r5, r5; /* << 1 */
addk r6, r6, r6; /* << 2 */
@@ -383,73 +357,6 @@ not_in_delay_slot:
full_exception_trapw:
RESTORE_STATE
bri full_exception_trap
-#else
- /* Exceptions enabled here. This will allow nested exceptions */
- mfs r6, rmsr;
- nop
- swi r6, r1, 0; /* RMSR_OFFSET */
- ori r6, r6, 0x100; /* Turn ON the EE bit */
- andi r6, r6, ~2; /* Disable interrupts */
- mts rmsr, r6;
- nop
-
- xori r6, r5, 1; /* 00001 = Unaligned Exception */
- /* Jump to unalignment exception handler */
- beqi r6, handle_unaligned_ex;
-
-handle_other_ex: /* Handle Other exceptions here */
- /* Save other volatiles before we make procedure calls below */
- swi r7, r1, PT_R7
- swi r8, r1, PT_R8
- swi r9, r1, PT_R9
- swi r10, r1, PT_R10
- swi r11, r1, PT_R11
- swi r12, r1, PT_R12
- swi r14, r1, PT_R14
- swi r15, r1, PT_R15
- swi r18, r1, PT_R18
-
- or r5, r1, r0
- andi r6, r4, 0x1F; /* Load ESR[EC] */
- lwi r7, r0, PER_CPU(KM) /* MS: saving current kernel mode to regs */
- swi r7, r1, PT_MODE
- mfs r7, rfsr
- nop
- addk r8, r17, r0; /* Load exception address */
- bralid r15, full_exception; /* Branch to the handler */
- nop;
- mts rfsr, r0; /* Clear sticky fsr */
- nop
-
- /*
- * Trigger execution of the signal handler by enabling
- * interrupts and calling an invalid syscall.
- */
- mfs r5, rmsr;
- nop
- ori r5, r5, 2;
- mts rmsr, r5; /* enable interrupt */
- nop
- addi r12, r0, __NR_syscalls;
- brki r14, 0x08;
- mfs r5, rmsr; /* disable interrupt */
- nop
- andi r5, r5, ~2;
- mts rmsr, r5;
- nop
-
- lwi r7, r1, PT_R7
- lwi r8, r1, PT_R8
- lwi r9, r1, PT_R9
- lwi r10, r1, PT_R10
- lwi r11, r1, PT_R11
- lwi r12, r1, PT_R12
- lwi r14, r1, PT_R14
- lwi r15, r1, PT_R15
- lwi r18, r1, PT_R18
-
- bri ex_handler_done; /* Complete exception handling */
-#endif
/* 0x01 - Unaligned data access exception
* This occurs when a word access is not aligned on a word boundary,
@@ -463,7 +370,6 @@ handle_unaligned_ex:
* R4 = ESR
* R3 = EAR
*/
-#ifdef CONFIG_MMU
andi r6, r4, 0x1000 /* Check ESR[DS] */
beqi r6, _no_delayslot /* Branch if ESR[DS] not set */
mfs r17, rbtr; /* ESR[DS] set - return address in BTR */
@@ -472,7 +378,7 @@ _no_delayslot:
/* jump to high level unaligned handler */
RESTORE_STATE;
bri unaligned_data_trap
-#endif
+
andi r6, r4, 0x3E0; /* Mask and extract the register operand */
srl r6, r6; /* r6 >> 5 */
srl r6, r6;
@@ -558,25 +464,10 @@ ex_shw:
ex_sw_end: /* Exception handling of store word, ends. */
ex_handler_done:
-#ifndef CONFIG_MMU
- lwi r5, r1, 0 /* RMSR */
- mts rmsr, r5
- nop
- lwi r3, r1, PT_R3
- lwi r4, r1, PT_R4
- lwi r5, r1, PT_R5
- lwi r6, r1, PT_R6
- lwi r17, r1, PT_R17
-
- rted r17, 0
- addik r1, r1, (EX_HANDLER_STACK_SIZ); /* Restore stack frame */
-#else
RESTORE_STATE;
rted r17, 0
nop
-#endif
-#ifdef CONFIG_MMU
/* Exception vector entry code. This code runs with address translation
* turned off (i.e. using physical addresses). */
@@ -882,13 +773,7 @@ ex_handler_done:
* bits 20 and 21 are zero.
*/
andi r3, r3, PAGE_MASK
-#ifdef CONFIG_MICROBLAZE_64K_PAGES
- ori r3, r3, TLB_VALID | TLB_PAGESZ(PAGESZ_64K)
-#elif CONFIG_MICROBLAZE_16K_PAGES
- ori r3, r3, TLB_VALID | TLB_PAGESZ(PAGESZ_16K)
-#else
ori r3, r3, TLB_VALID | TLB_PAGESZ(PAGESZ_4K)
-#endif
mts rtlbhi, r3 /* Load TLB HI */
nop
@@ -926,10 +811,8 @@ ex_handler_done:
rtsd r15,8
nop
-#endif
.end _hw_exception_handler
-#ifdef CONFIG_MMU
/* Unaligned data access exception last on a 4k page for MMU.
* When this is called, we are in virtual mode with exceptions enabled
* and registers 1-13,15,17,18 saved.
@@ -1044,7 +927,6 @@ ex_unaligned_fixup:
.word store6,ex_unaligned_fixup;
.previous;
.end _unaligned_data_exception
-#endif /* CONFIG_MMU */
.global ex_handler_unhandled
ex_handler_unhandled:
@@ -1093,11 +975,7 @@ lw_r27: R3_TO_LWREG (27);
lw_r28: R3_TO_LWREG (28);
lw_r29: R3_TO_LWREG (29);
lw_r30: R3_TO_LWREG (30);
-#ifdef CONFIG_MMU
lw_r31: R3_TO_LWREG_V (31);
-#else
-lw_r31: R3_TO_LWREG (31);
-#endif
sw_table:
sw_r0: SWREG_TO_R3 (0);
@@ -1131,13 +1009,8 @@ sw_r27: SWREG_TO_R3 (27);
sw_r28: SWREG_TO_R3 (28);
sw_r29: SWREG_TO_R3 (29);
sw_r30: SWREG_TO_R3 (30);
-#ifdef CONFIG_MMU
sw_r31: SWREG_TO_R3_V (31);
-#else
-sw_r31: SWREG_TO_R3 (31);
-#endif
-#ifdef CONFIG_MMU
lw_table_vm:
lw_r0_vm: R3_TO_LWREG_VM (0);
lw_r1_vm: R3_TO_LWREG_VM_V (1);
@@ -1205,7 +1078,6 @@ sw_r28_vm: SWREG_TO_R3_VM_V (28);
sw_r29_vm: SWREG_TO_R3_VM_V (29);
sw_r30_vm: SWREG_TO_R3_VM_V (30);
sw_r31_vm: SWREG_TO_R3_VM_V (31);
-#endif /* CONFIG_MMU */
/* Temporary data structures used in the handler */
.section .data
diff --git a/arch/microblaze/kernel/irq.c b/arch/microblaze/kernel/irq.c
index 903dad822fad..1f8cb4c4f74f 100644
--- a/arch/microblaze/kernel/irq.c
+++ b/arch/microblaze/kernel/irq.c
@@ -20,27 +20,13 @@
#include <linux/irqchip.h>
#include <linux/of_irq.h>
-static u32 concurrent_irq;
-
void __irq_entry do_IRQ(struct pt_regs *regs)
{
- unsigned int irq;
struct pt_regs *old_regs = set_irq_regs(regs);
trace_hardirqs_off();
irq_enter();
- irq = xintc_get_irq();
-next_irq:
- BUG_ON(!irq);
- generic_handle_irq(irq);
-
- irq = xintc_get_irq();
- if (irq != -1U) {
- pr_debug("next irq: %d\n", irq);
- ++concurrent_irq;
- goto next_irq;
- }
-
+ handle_arch_irq(regs);
irq_exit();
set_irq_regs(old_regs);
trace_hardirqs_on();
diff --git a/arch/microblaze/kernel/kgdb.c b/arch/microblaze/kernel/kgdb.c
index 130cd0f064ce..df4b9d0112e5 100644
--- a/arch/microblaze/kernel/kgdb.c
+++ b/arch/microblaze/kernel/kgdb.c
@@ -31,7 +31,7 @@
#define GDB_RTLBLO 55
#define GDB_RTLBHI 56
-/* keep pvr separately because it is unchangeble */
+/* keep pvr separately because it is unchangeable */
static struct pvr_s pvr;
void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)
diff --git a/arch/microblaze/kernel/microblaze_ksyms.c b/arch/microblaze/kernel/microblaze_ksyms.c
index 92e12c2c2ec1..c892e173ec99 100644
--- a/arch/microblaze/kernel/microblaze_ksyms.c
+++ b/arch/microblaze/kernel/microblaze_ksyms.c
@@ -6,7 +6,6 @@
#include <linux/export.h>
#include <linux/string.h>
-#include <linux/cryptohash.h>
#include <linux/delay.h>
#include <linux/in6.h>
#include <linux/syscalls.h>
@@ -27,16 +26,13 @@ EXPORT_SYMBOL(_mcount);
* Assembly functions that may be used (directly or indirectly) by modules
*/
EXPORT_SYMBOL(__copy_tofrom_user);
-EXPORT_SYMBOL(__strncpy_user);
#ifdef CONFIG_OPT_LIB_ASM
EXPORT_SYMBOL(memcpy);
EXPORT_SYMBOL(memmove);
#endif
-#ifdef CONFIG_MMU
EXPORT_SYMBOL(empty_zero_page);
-#endif
EXPORT_SYMBOL(mbc);
diff --git a/arch/microblaze/kernel/misc.S b/arch/microblaze/kernel/misc.S
index 6759af688451..1228a09d8109 100644
--- a/arch/microblaze/kernel/misc.S
+++ b/arch/microblaze/kernel/misc.S
@@ -39,7 +39,7 @@ _tlbia_1:
rsubi r11, r12, MICROBLAZE_TLB_SIZE - 1
bneid r11, _tlbia_1 /* loop for all entries */
addik r12, r12, 1
- /* sync */
+ mbar 1 /* sync */
rtsd r15, 8
nop
.size _tlbia, . - _tlbia
@@ -58,6 +58,7 @@ _tlbie:
blti r12, _tlbie_1 /* Check if found */
mts rtlbhi, r0 /* flush: ensure V is clear */
nop
+ mbar 1 /* sync */
_tlbie_1:
rtsd r15, 8
nop
diff --git a/arch/microblaze/kernel/module.c b/arch/microblaze/kernel/module.c
index d9a2014a222f..e5db3a57b9e3 100644
--- a/arch/microblaze/kernel/module.c
+++ b/arch/microblaze/kernel/module.c
@@ -11,8 +11,8 @@
#include <linux/vmalloc.h>
#include <linux/fs.h>
#include <linux/string.h>
+#include <linux/pgtable.h>
-#include <asm/pgtable.h>
#include <asm/cacheflush.h>
int apply_relocate_add(Elf32_Shdr *sechdrs, const char *strtab,
@@ -24,9 +24,6 @@ int apply_relocate_add(Elf32_Shdr *sechdrs, const char *strtab,
Elf32_Sym *sym;
unsigned long int *location;
unsigned long int value;
-#if __GNUC__ < 4
- unsigned long int old_value;
-#endif
pr_debug("Applying add relocation section %u to %u\n",
relsec, sechdrs[relsec].sh_info);
@@ -49,40 +46,17 @@ int apply_relocate_add(Elf32_Shdr *sechdrs, const char *strtab,
*/
case R_MICROBLAZE_32:
-#if __GNUC__ < 4
- old_value = *location;
- *location = value + old_value;
-
- pr_debug("R_MICROBLAZE_32 (%08lx->%08lx)\n",
- old_value, value);
-#else
*location = value;
-#endif
break;
case R_MICROBLAZE_64:
-#if __GNUC__ < 4
- /* Split relocs only required/used pre gcc4.1.1 */
- old_value = ((location[0] & 0x0000FFFF) << 16) |
- (location[1] & 0x0000FFFF);
- value += old_value;
-#endif
location[0] = (location[0] & 0xFFFF0000) |
(value >> 16);
location[1] = (location[1] & 0xFFFF0000) |
(value & 0xFFFF);
-#if __GNUC__ < 4
- pr_debug("R_MICROBLAZE_64 (%08lx->%08lx)\n",
- old_value, value);
-#endif
break;
case R_MICROBLAZE_64_PCREL:
-#if __GNUC__ < 4
- old_value = (location[0] & 0xFFFF) << 16 |
- (location[1] & 0xFFFF);
- value -= old_value;
-#endif
value -= (unsigned long int)(location) + 4;
location[0] = (location[0] & 0xFFFF0000) |
(value >> 16);
diff --git a/arch/microblaze/kernel/process.c b/arch/microblaze/kernel/process.c
index 6527ec22f158..56342e11442d 100644
--- a/arch/microblaze/kernel/process.c
+++ b/arch/microblaze/kernel/process.c
@@ -18,8 +18,6 @@
#include <linux/tick.h>
#include <linux/bitops.h>
#include <linux/ptrace.h>
-#include <asm/pgalloc.h>
-#include <linux/uaccess.h> /* for USER_DS macros */
#include <asm/cacheflush.h>
void show_regs(struct pt_regs *regs)
@@ -54,25 +52,25 @@ void flush_thread(void)
{
}
-int copy_thread(unsigned long clone_flags, unsigned long usp,
- unsigned long arg, struct task_struct *p)
+int copy_thread(struct task_struct *p, const struct kernel_clone_args *args)
{
+ unsigned long clone_flags = args->flags;
+ unsigned long usp = args->stack;
+ unsigned long tls = args->tls;
struct pt_regs *childregs = task_pt_regs(p);
struct thread_info *ti = task_thread_info(p);
- if (unlikely(p->flags & PF_KTHREAD)) {
+ if (unlikely(args->fn)) {
/* if we're creating a new kernel thread then just zeroing all
* the registers. That's OK for a brand new thread.*/
memset(childregs, 0, sizeof(struct pt_regs));
memset(&ti->cpu_context, 0, sizeof(struct cpu_context));
ti->cpu_context.r1 = (unsigned long)childregs;
- ti->cpu_context.r20 = (unsigned long)usp; /* fn */
- ti->cpu_context.r19 = (unsigned long)arg;
+ ti->cpu_context.r20 = (unsigned long)args->fn;
+ ti->cpu_context.r19 = (unsigned long)args->fn_arg;
childregs->pt_mode = 1;
local_save_flags(childregs->msr);
-#ifdef CONFIG_MMU
ti->cpu_context.msr = childregs->msr & ~MSR_IE;
-#endif
ti->cpu_context.r15 = (unsigned long)ret_from_kernel_thread - 8;
return 0;
}
@@ -82,9 +80,6 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
memset(&ti->cpu_context, 0, sizeof(struct cpu_context));
ti->cpu_context.r1 = (unsigned long)childregs;
-#ifndef CONFIG_MMU
- ti->cpu_context.msr = (unsigned long)childregs->msr;
-#else
childregs->msr |= MSR_UMS;
/* we should consider the fact that childregs is a copy of the parent
@@ -106,7 +101,6 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
ti->cpu_context.msr = (childregs->msr|MSR_VM);
ti->cpu_context.msr &= ~MSR_UMS; /* switch_to to kernel mode */
ti->cpu_context.msr &= ~MSR_IE;
-#endif
ti->cpu_context.r15 = (unsigned long)ret_from_fork - 8;
/*
@@ -114,12 +108,12 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
* which contains TLS area
*/
if (clone_flags & CLONE_SETTLS)
- childregs->r21 = childregs->r10;
+ childregs->r21 = tls;
return 0;
}
-unsigned long get_wchan(struct task_struct *p)
+unsigned long __get_wchan(struct task_struct *p)
{
/* TBD (used by procfs) */
return 0;
@@ -131,24 +125,19 @@ void start_thread(struct pt_regs *regs, unsigned long pc, unsigned long usp)
regs->pc = pc;
regs->r1 = usp;
regs->pt_mode = 0;
-#ifdef CONFIG_MMU
regs->msr |= MSR_UMS;
regs->msr &= ~MSR_VM;
-#endif
}
-#ifdef CONFIG_MMU
#include <linux/elfcore.h>
/*
* Set up a thread for executing a new program
*/
-int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpregs)
+int elf_core_copy_task_fpregs(struct task_struct *t, elf_fpregset_t *fpu)
{
return 0; /* MicroBlaze has no separate FPU registers */
}
-#endif /* CONFIG_MMU */
void arch_cpu_idle(void)
{
- local_irq_enable();
}
diff --git a/arch/microblaze/kernel/prom.c b/arch/microblaze/kernel/prom.c
index c5c6186a7e8b..e424c796e297 100644
--- a/arch/microblaze/kernel/prom.c
+++ b/arch/microblaze/kernel/prom.c
@@ -20,7 +20,7 @@ void __init early_init_devtree(void *params)
early_init_dt_scan(params);
if (!strlen(boot_command_line))
- strlcpy(boot_command_line, cmd_line, COMMAND_LINE_SIZE);
+ strscpy(boot_command_line, cmd_line, COMMAND_LINE_SIZE);
memblock_allow_resize();
diff --git a/arch/microblaze/kernel/ptrace.c b/arch/microblaze/kernel/ptrace.c
index badd286882ae..5234d0c1dcaa 100644
--- a/arch/microblaze/kernel/ptrace.c
+++ b/arch/microblaze/kernel/ptrace.c
@@ -33,7 +33,6 @@
#include <linux/elf.h>
#include <linux/audit.h>
#include <linux/seccomp.h>
-#include <linux/tracehook.h>
#include <linux/errno.h>
#include <asm/processor.h>
@@ -140,7 +139,7 @@ asmlinkage unsigned long do_syscall_trace_enter(struct pt_regs *regs)
secure_computing_strict(regs->r12);
if (test_thread_flag(TIF_SYSCALL_TRACE) &&
- tracehook_report_syscall_entry(regs))
+ ptrace_report_syscall_entry(regs))
/*
* Tracing decided this syscall should not happen.
* We'll return a bogus call number to get an ENOSYS
@@ -161,7 +160,7 @@ asmlinkage void do_syscall_trace_leave(struct pt_regs *regs)
step = test_thread_flag(TIF_SINGLESTEP);
if (step || test_thread_flag(TIF_SYSCALL_TRACE))
- tracehook_report_syscall_exit(regs, step);
+ ptrace_report_syscall_exit(regs, step);
}
void ptrace_disable(struct task_struct *child)
diff --git a/arch/microblaze/kernel/reset.c b/arch/microblaze/kernel/reset.c
index 5f4722908164..2f66c7963084 100644
--- a/arch/microblaze/kernel/reset.c
+++ b/arch/microblaze/kernel/reset.c
@@ -9,7 +9,6 @@
#include <linux/init.h>
#include <linux/delay.h>
-#include <linux/of_platform.h>
#include <linux/reboot.h>
void machine_shutdown(void)
diff --git a/arch/microblaze/kernel/setup.c b/arch/microblaze/kernel/setup.c
index 522a0c5d9c59..f417333eccae 100644
--- a/arch/microblaze/kernel/setup.c
+++ b/arch/microblaze/kernel/setup.c
@@ -9,7 +9,7 @@
*/
#include <linux/init.h>
-#include <linux/clk-provider.h>
+#include <linux/of_clk.h>
#include <linux/clocksource.h>
#include <linux/string.h>
#include <linux/seq_file.h>
@@ -18,6 +18,7 @@
#include <linux/console.h>
#include <linux/debugfs.h>
#include <linux/of_fdt.h>
+#include <linux/pgtable.h>
#include <asm/setup.h>
#include <asm/sections.h>
@@ -33,7 +34,6 @@
#include <asm/entry.h>
#include <asm/cpuinfo.h>
-#include <asm/pgtable.h>
DEFINE_PER_CPU(unsigned int, KSP); /* Saved kernel stack pointer */
DEFINE_PER_CPU(unsigned int, KM); /* Kernel/user mode */
@@ -41,20 +41,18 @@ DEFINE_PER_CPU(unsigned int, ENTRY_SP); /* Saved SP on kernel entry */
DEFINE_PER_CPU(unsigned int, R11_SAVE); /* Temp variable for entry */
DEFINE_PER_CPU(unsigned int, CURRENT_SAVE); /* Saved current pointer */
-unsigned int boot_cpuid;
/*
* Placed cmd_line to .data section because can be initialized from
* ASM code. Default position is BSS section which is cleared
* in machine_early_init().
*/
-char cmd_line[COMMAND_LINE_SIZE] __attribute__ ((section(".data")));
+char cmd_line[COMMAND_LINE_SIZE] __section(".data");
void __init setup_arch(char **cmdline_p)
{
*cmdline_p = boot_command_line;
setup_memory();
- parse_early_param();
console_verbose();
@@ -65,10 +63,6 @@ void __init setup_arch(char **cmdline_p)
microblaze_cache_init();
xilinx_pci_init();
-
-#if defined(CONFIG_DUMMY_CONSOLE)
- conswitchp = &dummy_con;
-#endif
}
#ifdef CONFIG_MTD_UCLINUX
@@ -196,12 +190,10 @@ static int microblaze_debugfs_init(void)
}
arch_initcall(microblaze_debugfs_init);
-# ifdef CONFIG_MMU
static int __init debugfs_tlb(void)
{
debugfs_create_u32("tlb_skip", S_IRUGO, of_debugfs_root, &tlb_skip);
return 0;
}
device_initcall(debugfs_tlb);
-# endif
#endif
diff --git a/arch/microblaze/kernel/signal.c b/arch/microblaze/kernel/signal.c
index c9125c328949..c78a0ff48066 100644
--- a/arch/microblaze/kernel/signal.c
+++ b/arch/microblaze/kernel/signal.c
@@ -11,7 +11,7 @@
*
* 1997-11-28 Modified for POSIX.1b signals by Richard Henderson
*
- * This file was was derived from the sh version, arch/sh/kernel/signal.c
+ * This file was derived from the sh version, arch/sh/kernel/signal.c
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file COPYING in the main directory of this
@@ -31,12 +31,10 @@
#include <linux/personality.h>
#include <linux/percpu.h>
#include <linux/linkage.h>
-#include <linux/tracehook.h>
+#include <linux/resume_user_mode.h>
#include <asm/entry.h>
#include <asm/ucontext.h>
#include <linux/uaccess.h>
-#include <asm/pgtable.h>
-#include <asm/pgalloc.h>
#include <linux/syscalls.h>
#include <asm/cacheflush.h>
#include <asm/syscalls.h>
@@ -159,13 +157,8 @@ static int setup_rt_frame(struct ksignal *ksig, sigset_t *set,
struct rt_sigframe __user *frame;
int err = 0, sig = ksig->sig;
unsigned long address = 0;
-#ifdef CONFIG_MMU
- pgd_t *pgdp;
- p4d_t *p4dp;
- pud_t *pudp;
pmd_t *pmdp;
pte_t *ptep;
-#endif
frame = get_sigframe(ksig, regs, sizeof(*frame));
@@ -197,15 +190,11 @@ static int setup_rt_frame(struct ksignal *ksig, sigset_t *set,
regs->r15 = ((unsigned long)frame->tramp)-8;
address = ((unsigned long)frame->tramp);
-#ifdef CONFIG_MMU
- pgdp = pgd_offset(current->mm, address);
- p4dp = p4d_offset(pgdp, address);
- pudp = pud_offset(p4dp, address);
- pmdp = pmd_offset(pudp, address);
+ pmdp = pmd_off(current->mm, address);
preempt_disable();
ptep = pte_offset_map(pmdp, address);
- if (pte_present(*ptep)) {
+ if (ptep && pte_present(*ptep)) {
address = (unsigned long) page_address(pte_page(*ptep));
/* MS: I need add offset in page */
address += ((unsigned long)frame->tramp) & ~PAGE_MASK;
@@ -214,12 +203,9 @@ static int setup_rt_frame(struct ksignal *ksig, sigset_t *set,
invalidate_icache_range(address, address + 8);
flush_dcache_range(address, address + 8);
}
- pte_unmap(ptep);
+ if (ptep)
+ pte_unmap(ptep);
preempt_enable();
-#else
- flush_icache_range(address, address + 8);
- flush_dcache_range(address, address + 8);
-#endif
if (err)
return -EFAULT;
@@ -257,7 +243,7 @@ handle_restart(struct pt_regs *regs, struct k_sigaction *ka, int has_handler)
regs->r3 = -EINTR;
break;
}
- /* fallthrough */
+ fallthrough;
case -ERESTARTNOINTR:
do_restart:
/* offset of 4 bytes to re-execute trap (brki) instruction */
@@ -298,7 +284,7 @@ static void do_signal(struct pt_regs *regs, int in_syscall)
#ifdef DEBUG_SIG
pr_info("do signal: %p %d\n", regs, in_syscall);
pr_info("do signal2: %lx %lx %ld [%lx]\n", regs->pc, regs->r1,
- regs->r12, current_thread_info()->flags);
+ regs->r12, read_thread_flags());
#endif
if (get_signal(&ksig)) {
@@ -321,9 +307,10 @@ static void do_signal(struct pt_regs *regs, int in_syscall)
asmlinkage void do_notify_resume(struct pt_regs *regs, int in_syscall)
{
- if (test_thread_flag(TIF_SIGPENDING))
+ if (test_thread_flag(TIF_SIGPENDING) ||
+ test_thread_flag(TIF_NOTIFY_SIGNAL))
do_signal(regs, in_syscall);
- if (test_and_clear_thread_flag(TIF_NOTIFY_RESUME))
- tracehook_notify_resume(regs);
+ if (test_thread_flag(TIF_NOTIFY_RESUME))
+ resume_user_mode_work(regs);
}
diff --git a/arch/microblaze/kernel/stacktrace.c b/arch/microblaze/kernel/stacktrace.c
index b4debe283a79..b266c4d6ed9d 100644
--- a/arch/microblaze/kernel/stacktrace.c
+++ b/arch/microblaze/kernel/stacktrace.c
@@ -20,12 +20,12 @@ void save_stack_trace(struct stack_trace *trace)
{
/* Exclude our helper functions from the trace*/
trace->skip += 2;
- microblaze_unwind(NULL, trace);
+ microblaze_unwind(NULL, trace, "");
}
EXPORT_SYMBOL_GPL(save_stack_trace);
void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace)
{
- microblaze_unwind(tsk, trace);
+ microblaze_unwind(tsk, trace, "");
}
EXPORT_SYMBOL_GPL(save_stack_trace_tsk);
diff --git a/arch/microblaze/kernel/syscall_table.S b/arch/microblaze/kernel/syscall_table.S
index ce006646f741..3bc60a2b159e 100644
--- a/arch/microblaze/kernel/syscall_table.S
+++ b/arch/microblaze/kernel/syscall_table.S
@@ -1,6 +1,5 @@
/* SPDX-License-Identifier: GPL-2.0 */
-#define __SYSCALL(nr, entry, nargs) .long entry
+#define __SYSCALL(nr, entry) .long entry
ENTRY(sys_call_table)
#include <asm/syscall_table.h>
-#undef __SYSCALL
diff --git a/arch/microblaze/kernel/syscalls/Makefile b/arch/microblaze/kernel/syscalls/Makefile
index 659faefdcb1d..b265e4bc16c2 100644
--- a/arch/microblaze/kernel/syscalls/Makefile
+++ b/arch/microblaze/kernel/syscalls/Makefile
@@ -2,37 +2,31 @@
kapi := arch/$(SRCARCH)/include/generated/asm
uapi := arch/$(SRCARCH)/include/generated/uapi/asm
-_dummy := $(shell [ -d '$(uapi)' ] || mkdir -p '$(uapi)') \
- $(shell [ -d '$(kapi)' ] || mkdir -p '$(kapi)')
+$(shell mkdir -p $(uapi) $(kapi))
-syscall := $(srctree)/$(src)/syscall.tbl
-syshdr := $(srctree)/$(src)/syscallhdr.sh
-systbl := $(srctree)/$(src)/syscalltbl.sh
+syscall := $(src)/syscall.tbl
+syshdr := $(srctree)/scripts/syscallhdr.sh
+systbl := $(srctree)/scripts/syscalltbl.sh
quiet_cmd_syshdr = SYSHDR $@
- cmd_syshdr = $(CONFIG_SHELL) '$(syshdr)' '$<' '$@' \
- '$(syshdr_abis_$(basetarget))' \
- '$(syshdr_pfx_$(basetarget))' \
- '$(syshdr_offset_$(basetarget))'
+ cmd_syshdr = $(CONFIG_SHELL) $(syshdr) --emit-nr $< $@
quiet_cmd_systbl = SYSTBL $@
- cmd_systbl = $(CONFIG_SHELL) '$(systbl)' '$<' '$@' \
- '$(systbl_abis_$(basetarget))' \
- '$(systbl_abi_$(basetarget))' \
- '$(systbl_offset_$(basetarget))'
+ cmd_systbl = $(CONFIG_SHELL) $(systbl) $< $@
-$(uapi)/unistd_32.h: $(syscall) $(syshdr)
+$(uapi)/unistd_32.h: $(syscall) $(syshdr) FORCE
$(call if_changed,syshdr)
-$(kapi)/syscall_table.h: $(syscall) $(systbl)
+$(kapi)/syscall_table.h: $(syscall) $(systbl) FORCE
$(call if_changed,systbl)
uapisyshdr-y += unistd_32.h
kapisyshdr-y += syscall_table.h
-targets += $(uapisyshdr-y) $(kapisyshdr-y)
+uapisyshdr-y := $(addprefix $(uapi)/, $(uapisyshdr-y))
+kapisyshdr-y := $(addprefix $(kapi)/, $(kapisyshdr-y))
+targets += $(addprefix ../../../../, $(uapisyshdr-y) $(kapisyshdr-y))
PHONY += all
-all: $(addprefix $(uapi)/,$(uapisyshdr-y))
-all: $(addprefix $(kapi)/,$(kapisyshdr-y))
+all: $(uapisyshdr-y) $(kapisyshdr-y)
@:
diff --git a/arch/microblaze/kernel/syscalls/syscall.tbl b/arch/microblaze/kernel/syscalls/syscall.tbl
index 09b0cd7dab0a..b00ab2cabab9 100644
--- a/arch/microblaze/kernel/syscalls/syscall.tbl
+++ b/arch/microblaze/kernel/syscalls/syscall.tbl
@@ -141,7 +141,7 @@
131 common quotactl sys_quotactl
132 common getpgid sys_getpgid
133 common fchdir sys_fchdir
-134 common bdflush sys_bdflush
+134 common bdflush sys_ni_syscall
135 common sysfs sys_sysfs
136 common personality sys_personality
137 common afs_syscall sys_ni_syscall
@@ -156,7 +156,7 @@
146 common writev sys_writev
147 common getsid sys_getsid
148 common fdatasync sys_fdatasync
-149 common _sysctl sys_sysctl
+149 common _sysctl sys_ni_syscall
150 common mlock sys_mlock
151 common munlock sys_munlock
152 common mlockall sys_mlockall
@@ -260,7 +260,7 @@
250 common fadvise64 sys_fadvise64
# 251 is available for reuse (was briefly sys_set_zone_reclaim)
252 common exit_group sys_exit_group
-253 common lookup_dcookie sys_lookup_dcookie
+253 common lookup_dcookie sys_ni_syscall
254 common epoll_create sys_epoll_create
255 common epoll_ctl sys_epoll_ctl
256 common epoll_wait sys_epoll_wait
@@ -441,3 +441,29 @@
433 common fspick sys_fspick
434 common pidfd_open sys_pidfd_open
435 common clone3 sys_clone3
+436 common close_range sys_close_range
+437 common openat2 sys_openat2
+438 common pidfd_getfd sys_pidfd_getfd
+439 common faccessat2 sys_faccessat2
+440 common process_madvise sys_process_madvise
+441 common epoll_pwait2 sys_epoll_pwait2
+442 common mount_setattr sys_mount_setattr
+443 common quotactl_fd sys_quotactl_fd
+444 common landlock_create_ruleset sys_landlock_create_ruleset
+445 common landlock_add_rule sys_landlock_add_rule
+446 common landlock_restrict_self sys_landlock_restrict_self
+# 447 reserved for memfd_secret
+448 common process_mrelease sys_process_mrelease
+449 common futex_waitv sys_futex_waitv
+450 common set_mempolicy_home_node sys_set_mempolicy_home_node
+451 common cachestat sys_cachestat
+452 common fchmodat2 sys_fchmodat2
+453 common map_shadow_stack sys_map_shadow_stack
+454 common futex_wake sys_futex_wake
+455 common futex_wait sys_futex_wait
+456 common futex_requeue sys_futex_requeue
+457 common statmount sys_statmount
+458 common listmount sys_listmount
+459 common lsm_get_self_attr sys_lsm_get_self_attr
+460 common lsm_set_self_attr sys_lsm_set_self_attr
+461 common lsm_list_modules sys_lsm_list_modules
diff --git a/arch/microblaze/kernel/syscalls/syscallhdr.sh b/arch/microblaze/kernel/syscalls/syscallhdr.sh
deleted file mode 100644
index 2e9062a926a3..000000000000
--- a/arch/microblaze/kernel/syscalls/syscallhdr.sh
+++ /dev/null
@@ -1,36 +0,0 @@
-#!/bin/sh
-# SPDX-License-Identifier: GPL-2.0
-
-in="$1"
-out="$2"
-my_abis=`echo "($3)" | tr ',' '|'`
-prefix="$4"
-offset="$5"
-
-fileguard=_UAPI_ASM_MICROBLAZE_`basename "$out" | sed \
- -e 'y/abcdefghijklmnopqrstuvwxyz/ABCDEFGHIJKLMNOPQRSTUVWXYZ/' \
- -e 's/[^A-Z0-9_]/_/g' -e 's/__/_/g'`
-grep -E "^[0-9A-Fa-fXx]+[[:space:]]+${my_abis}" "$in" | sort -n | (
- printf "#ifndef %s\n" "${fileguard}"
- printf "#define %s\n" "${fileguard}"
- printf "\n"
-
- nxt=0
- while read nr abi name entry ; do
- if [ -z "$offset" ]; then
- printf "#define __NR_%s%s\t%s\n" \
- "${prefix}" "${name}" "${nr}"
- else
- printf "#define __NR_%s%s\t(%s + %s)\n" \
- "${prefix}" "${name}" "${offset}" "${nr}"
- fi
- nxt=$((nr+1))
- done
-
- printf "\n"
- printf "#ifdef __KERNEL__\n"
- printf "#define __NR_syscalls\t%s\n" "${nxt}"
- printf "#endif\n"
- printf "\n"
- printf "#endif /* %s */" "${fileguard}"
-) > "$out"
diff --git a/arch/microblaze/kernel/syscalls/syscalltbl.sh b/arch/microblaze/kernel/syscalls/syscalltbl.sh
deleted file mode 100644
index 85d78d9309ad..000000000000
--- a/arch/microblaze/kernel/syscalls/syscalltbl.sh
+++ /dev/null
@@ -1,32 +0,0 @@
-#!/bin/sh
-# SPDX-License-Identifier: GPL-2.0
-
-in="$1"
-out="$2"
-my_abis=`echo "($3)" | tr ',' '|'`
-my_abi="$4"
-offset="$5"
-
-emit() {
- t_nxt="$1"
- t_nr="$2"
- t_entry="$3"
-
- while [ $t_nxt -lt $t_nr ]; do
- printf "__SYSCALL(%s, sys_ni_syscall, )\n" "${t_nxt}"
- t_nxt=$((t_nxt+1))
- done
- printf "__SYSCALL(%s, %s, )\n" "${t_nxt}" "${t_entry}"
-}
-
-grep -E "^[0-9A-Fa-fXx]+[[:space:]]+${my_abis}" "$in" | sort -n | (
- nxt=0
- if [ -z "$offset" ]; then
- offset=0
- fi
-
- while read nr abi name entry ; do
- emit $((nxt+offset)) $((nr+offset)) $entry
- nxt=$((nr+1))
- done
-) > "$out"
diff --git a/arch/microblaze/kernel/timer.c b/arch/microblaze/kernel/timer.c
index a6683484b3a1..26c385582c3b 100644
--- a/arch/microblaze/kernel/timer.c
+++ b/arch/microblaze/kernel/timer.c
@@ -161,13 +161,6 @@ static irqreturn_t timer_interrupt(int irq, void *dev_id)
return IRQ_HANDLED;
}
-static struct irqaction timer_irqaction = {
- .handler = timer_interrupt,
- .flags = IRQF_TIMER,
- .name = "timer",
- .dev_id = &clockevent_xilinx_timer,
-};
-
static __init int xilinx_clockevent_init(void)
{
clockevent_xilinx_timer.mult =
@@ -258,6 +251,10 @@ static int __init xilinx_timer_init(struct device_node *timer)
u32 timer_num = 1;
int ret;
+ /* If this property is present, the device is a PWM and not a timer */
+ if (of_property_read_bool(timer, "#pwm-cells"))
+ return 0;
+
if (initialized)
return -EINVAL;
@@ -309,7 +306,8 @@ static int __init xilinx_timer_init(struct device_node *timer)
freq_div_hz = timer_clock_freq / HZ;
- ret = setup_irq(irq, &timer_irqaction);
+ ret = request_irq(irq, timer_interrupt, IRQF_TIMER, "timer",
+ &clockevent_xilinx_timer);
if (ret) {
pr_err("Failed to setup IRQ");
return ret;
diff --git a/arch/microblaze/kernel/traps.c b/arch/microblaze/kernel/traps.c
index 45bbba9d919f..080aa769218d 100644
--- a/arch/microblaze/kernel/traps.c
+++ b/arch/microblaze/kernel/traps.c
@@ -8,6 +8,7 @@
* for more details.
*/
+#include <linux/cpu.h>
#include <linux/export.h>
#include <linux/kernel.h>
#include <linux/kallsyms.h>
@@ -31,7 +32,7 @@ static int __init kstack_setup(char *s)
}
__setup("kstack=", kstack_setup);
-void show_stack(struct task_struct *task, unsigned long *sp)
+void show_stack(struct task_struct *task, unsigned long *sp, const char *loglvl)
{
unsigned long words_to_show;
u32 fp = (u32) sp;
@@ -50,7 +51,7 @@ void show_stack(struct task_struct *task, unsigned long *sp)
if (kstack_depth_to_print && (words_to_show > kstack_depth_to_print))
words_to_show = kstack_depth_to_print;
- pr_info("Kernel Stack:\n");
+ printk("%sKernel Stack:\n", loglvl);
/*
* Make the first line an 'odd' size if necessary to get
@@ -65,11 +66,11 @@ void show_stack(struct task_struct *task, unsigned long *sp)
words_to_show -= line1_words;
}
}
- print_hex_dump(KERN_INFO, "", DUMP_PREFIX_ADDRESS, 32, 4, (void *)fp,
+ print_hex_dump(loglvl, "", DUMP_PREFIX_ADDRESS, 32, 4, (void *)fp,
words_to_show << 2, 0);
- pr_info("\n\nCall Trace:\n");
- microblaze_unwind(task, NULL);
- pr_info("\n");
+ printk("%s\n\nCall Trace:\n", loglvl);
+ microblaze_unwind(task, NULL, loglvl);
+ printk("%s\n", loglvl);
if (!task)
task = current;
diff --git a/arch/microblaze/kernel/unwind.c b/arch/microblaze/kernel/unwind.c
index 34c270cb11fc..a530a7a6be7d 100644
--- a/arch/microblaze/kernel/unwind.c
+++ b/arch/microblaze/kernel/unwind.c
@@ -154,26 +154,19 @@ static int lookup_prev_stack_frame(unsigned long fp, unsigned long pc,
static void microblaze_unwind_inner(struct task_struct *task,
unsigned long pc, unsigned long fp,
unsigned long leaf_return,
- struct stack_trace *trace);
+ struct stack_trace *trace,
+ const char *loglvl);
/**
* unwind_trap - Unwind through a system trap, that stored previous state
* on the stack.
*/
-#ifdef CONFIG_MMU
static inline void unwind_trap(struct task_struct *task, unsigned long pc,
- unsigned long fp, struct stack_trace *trace)
+ unsigned long fp, struct stack_trace *trace,
+ const char *loglvl)
{
/* To be implemented */
}
-#else
-static inline void unwind_trap(struct task_struct *task, unsigned long pc,
- unsigned long fp, struct stack_trace *trace)
-{
- const struct pt_regs *regs = (const struct pt_regs *) fp;
- microblaze_unwind_inner(task, regs->pc, regs->r1, regs->r15, trace);
-}
-#endif
/**
* microblaze_unwind_inner - Unwind the stack from the specified point
@@ -184,11 +177,13 @@ static inline void unwind_trap(struct task_struct *task, unsigned long pc,
* the caller's return address.
* @trace : Where to store stack backtrace (PC values).
* NULL == print backtrace to kernel log
+ * @loglvl : Used for printk log level if (trace == NULL).
*/
static void microblaze_unwind_inner(struct task_struct *task,
unsigned long pc, unsigned long fp,
unsigned long leaf_return,
- struct stack_trace *trace)
+ struct stack_trace *trace,
+ const char *loglvl)
{
int ofs = 0;
@@ -210,16 +205,7 @@ static void microblaze_unwind_inner(struct task_struct *task,
* HW exception handler doesn't save all registers,
* so we open-code a special case of unwind_trap()
*/
-#ifndef CONFIG_MMU
- const struct pt_regs *regs =
- (const struct pt_regs *) fp;
-#endif
- pr_info("HW EXCEPTION\n");
-#ifndef CONFIG_MMU
- microblaze_unwind_inner(task, regs->r17 - 4,
- fp + EX_HANDLER_STACK_SIZ,
- regs->r15, trace);
-#endif
+ printk("%sHW EXCEPTION\n", loglvl);
return;
}
@@ -228,8 +214,8 @@ static void microblaze_unwind_inner(struct task_struct *task,
if ((return_to >= handler->start_addr)
&& (return_to <= handler->end_addr)) {
if (!trace)
- pr_info("%s\n", handler->trap_name);
- unwind_trap(task, pc, fp, trace);
+ printk("%s%s\n", loglvl, handler->trap_name);
+ unwind_trap(task, pc, fp, trace, loglvl);
return;
}
}
@@ -248,13 +234,13 @@ static void microblaze_unwind_inner(struct task_struct *task,
} else {
/* Have we reached userland? */
if (unlikely(pc == task_pt_regs(task)->pc)) {
- pr_info("[<%p>] PID %lu [%s]\n",
- (void *) pc,
+ printk("%s[<%p>] PID %lu [%s]\n",
+ loglvl, (void *) pc,
(unsigned long) task->pid,
task->comm);
break;
} else
- print_ip_sym(pc);
+ print_ip_sym(loglvl, pc);
}
/* Stop when we reach anything not part of the kernel */
@@ -282,14 +268,16 @@ static void microblaze_unwind_inner(struct task_struct *task,
* @task : Task whose stack we are to unwind (NULL == current)
* @trace : Where to store stack backtrace (PC values).
* NULL == print backtrace to kernel log
+ * @loglvl : Used for printk log level if (trace == NULL).
*/
-void microblaze_unwind(struct task_struct *task, struct stack_trace *trace)
+void microblaze_unwind(struct task_struct *task, struct stack_trace *trace,
+ const char *loglvl)
{
if (task) {
if (task == current) {
const struct pt_regs *regs = task_pt_regs(task);
microblaze_unwind_inner(task, regs->pc, regs->r1,
- regs->r15, trace);
+ regs->r15, trace, loglvl);
} else {
struct thread_info *thread_info =
(struct thread_info *)(task->stack);
@@ -299,7 +287,8 @@ void microblaze_unwind(struct task_struct *task, struct stack_trace *trace)
microblaze_unwind_inner(task,
(unsigned long) &_switch_to,
cpu_context->r1,
- cpu_context->r15, trace);
+ cpu_context->r15,
+ trace, loglvl);
}
} else {
unsigned long pc, fp;
@@ -314,7 +303,7 @@ void microblaze_unwind(struct task_struct *task, struct stack_trace *trace)
);
/* Since we are not a leaf function, use leaf_return = 0 */
- microblaze_unwind_inner(current, pc, fp, 0, trace);
+ microblaze_unwind_inner(current, pc, fp, 0, trace, loglvl);
}
}
diff --git a/arch/microblaze/kernel/vmlinux.lds.S b/arch/microblaze/kernel/vmlinux.lds.S
index 2c09fa3a8a01..ae50d3d04a7d 100644
--- a/arch/microblaze/kernel/vmlinux.lds.S
+++ b/arch/microblaze/kernel/vmlinux.lds.S
@@ -13,6 +13,7 @@ ENTRY(microblaze_start)
#define RO_EXCEPTION_TABLE_ALIGN 16
+#include <asm/cache.h>
#include <asm/page.h>
#include <asm-generic/vmlinux.lds.h>
#include <asm/thread_info.h>
@@ -35,7 +36,6 @@ SECTIONS {
EXIT_TEXT
EXIT_CALL
SCHED_TEXT
- CPUIDLE_TEXT
LOCK_TEXT
KPROBES_TEXT
IRQENTRY_TEXT
@@ -44,7 +44,7 @@ SECTIONS {
_etext = . ;
}
- . = ALIGN (4) ;
+ . = ALIGN (8) ;
__fdt_blob : AT(ADDR(__fdt_blob) - LOAD_OFFSET) {
_fdt_start = . ; /* place for fdt blob */
*(__fdt_blob) ; /* Any link-placed DTB */
@@ -89,6 +89,8 @@ SECTIONS {
_KERNEL_SDA_BASE_ = _ssro + (_ssro_size / 2) ;
}
+ PERCPU_SECTION(L1_CACHE_BYTES)
+
. = ALIGN(PAGE_SIZE);
__init_begin = .;