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Diffstat (limited to 'arch/mips/boot/dts/mscc/ocelot.dtsi')
-rw-r--r--arch/mips/boot/dts/mscc/ocelot.dtsi28
1 files changed, 21 insertions, 7 deletions
diff --git a/arch/mips/boot/dts/mscc/ocelot.dtsi b/arch/mips/boot/dts/mscc/ocelot.dtsi
index 797d336db54d..6bd8a1ad94da 100644
--- a/arch/mips/boot/dts/mscc/ocelot.dtsi
+++ b/arch/mips/boot/dts/mscc/ocelot.dtsi
@@ -134,13 +134,16 @@
<0x1280000 0x100>,
<0x1800000 0x80000>,
<0x1880000 0x10000>,
- <0x1060000 0x10000>;
+ <0x1040000 0x10000>,
+ <0x1050000 0x10000>,
+ <0x1060000 0x10000>,
+ <0x1a0 0x1c4>;
reg-names = "sys", "rew", "qs", "ptp", "port0", "port1",
"port2", "port3", "port4", "port5", "port6",
"port7", "port8", "port9", "port10", "qsys",
- "ana", "s2";
- interrupts = <18 21 22>;
- interrupt-names = "ptp_rdy", "xtr", "inj";
+ "ana", "s0", "s1", "s2", "fdma";
+ interrupts = <18 21 22 16>;
+ interrupt-names = "ptp_rdy", "xtr", "inj", "fdma";
ethernet-ports {
#address-cells = <1>;
@@ -148,36 +151,47 @@
port0: port@0 {
reg = <0>;
+ status = "disabled";
};
port1: port@1 {
reg = <1>;
+ status = "disabled";
};
port2: port@2 {
reg = <2>;
+ status = "disabled";
};
port3: port@3 {
reg = <3>;
+ status = "disabled";
};
port4: port@4 {
reg = <4>;
+ status = "disabled";
};
port5: port@5 {
reg = <5>;
+ status = "disabled";
};
port6: port@6 {
reg = <6>;
+ status = "disabled";
};
port7: port@7 {
reg = <7>;
+ status = "disabled";
};
port8: port@8 {
reg = <8>;
+ status = "disabled";
};
port9: port@9 {
reg = <9>;
+ status = "disabled";
};
port10: port@10 {
reg = <10>;
+ status = "disabled";
};
};
};
@@ -212,9 +226,9 @@
function = "uart2";
};
- miim1: miim1 {
+ miim1_pins: miim1-pins {
pins = "GPIO_14", "GPIO_15";
- function = "miim1";
+ function = "miim";
};
};
@@ -248,7 +262,7 @@
reg = <0x10700c0 0x24>;
interrupts = <15>;
pinctrl-names = "default";
- pinctrl-0 = <&miim1>;
+ pinctrl-0 = <&miim1_pins>;
status = "disabled";
};