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Diffstat (limited to 'arch/mips/cavium-octeon/Kconfig')
| -rw-r--r-- | arch/mips/cavium-octeon/Kconfig | 15 |
1 files changed, 14 insertions, 1 deletions
diff --git a/arch/mips/cavium-octeon/Kconfig b/arch/mips/cavium-octeon/Kconfig index 4984e462be30..450e979ef5d9 100644 --- a/arch/mips/cavium-octeon/Kconfig +++ b/arch/mips/cavium-octeon/Kconfig @@ -14,7 +14,8 @@ config CAVIUM_CN63XXP1 config CAVIUM_OCTEON_CVMSEG_SIZE int "Number of L1 cache lines reserved for CVMSEG memory" range 0 54 - default 1 + default 0 if !CAVIUM_OCTEON_SOC + default 1 if CAVIUM_OCTEON_SOC help CVMSEG LM is a segment that accesses portions of the dcache as a local memory; the larger CVMSEG is, the smaller the cache is. @@ -67,6 +68,18 @@ config CAVIUM_OCTEON_LOCK_L2_MEMCPY help Lock the kernel's implementation of memcpy() into L2. +config CAVIUM_RESERVE32 + int "Memory to reserve for user processes shared region (MB)" + range 0 1536 + default "0" + help + Reserve a shared memory region for user processes to use for hardware + memory buffers. This is required for 32bit applications to be able to + send and receive packets directly. Applications access this memory by + memory mapping /dev/mem for the addresses in /proc/octeon_info. For + optimal performance with HugeTLBs, keep this size an even number of + megabytes. + config OCTEON_ILM tristate "Module to measure interrupt latency using Octeon CIU Timer" help |